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Merge pull request #2024 from stolen/rk3326-uboot-fixes

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Rk3326 boot improvements
This commit is contained in:
Danil Zagoskin
2025-11-17 00:41:25 +03:00
committed by GitHub
parent f7a82c6706 ad79cc1b50
commit d4d7b414cb
13 changed files with 590 additions and 15 deletions
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2
projects/ROCKNIX/bootloader/mkimage
View File

@@ -67,6 +67,8 @@ mkimage_dtb() {
case "$DEVICE" in
RK3326)
mcopy "${RELEASE_DIR}/3rdparty/bootloader/device_trees/"*.dtb ::
mcopy "${RELEASE_DIR}/3rdparty/bootloader/stock" ::
mcopy "${RELEASE_DIR}/3rdparty/bootloader/overlays" ::
;;
SM8550|SM8650|SM8250|SDM845)
mcopy -s -o "${RELEASE_DIR}/3rdparty/bootloader/boot" ::

15
projects/ROCKNIX/devices/RK3326/bootloader/update.sh
View File

@@ -55,7 +55,18 @@ if [ ! -f $BOOT_ROOT/extlinux/extlinux.conf ]; then
cp -f $SYSTEM_ROOT/usr/share/bootloader/extlinux/* $BOOT_ROOT/extlinux/
fi
for BOOT_IMAGE in uboot.bin; do
UBOOT_VARIANT=""
CONSOLEDEV=$(grep -l Y /sys/devices/platform/*/*/*/tty/tty*/console | head -1 | xargs -r dirname)
if [ -z "${CONSOLEDEV}" ]; then
log "Cannot find UART console"
elif grep -qi ff178000 "${CONSOLEDEV}/iomem_base"; then
log "Detected UART5 console at ${CONSOLEDEV}"
UBOOT_VARIANT=".uart5"
else
log "Assuming default (UART2) console at ${CONSOLEDEV}"
fi
for BOOT_IMAGE in uboot.bin${UBOOT_VARIANT}; do
if [ -f "$SYSTEM_ROOT/usr/share/bootloader/$BOOT_IMAGE" ]; then
log "Updating $BOOT_IMAGE on $BOOT_DISK..."
# instead of using small bs, read the missing part from target and do a perfectly aligned write
@@ -76,4 +87,4 @@ sync
mount -o remount,ro $BOOT_ROOT
echo "UPDATE" > /storage/.boot.hint
log "DONE"
echo "DONE"

2
projects/ROCKNIX/devices/RK3326/linux/linux.aarch64.conf
View File

@@ -2470,7 +2470,7 @@ CONFIG_SPI_GPIO=y
# CONFIG_SPI_OC_TINY is not set
CONFIG_SPI_PL022=y
CONFIG_SPI_ROCKCHIP=y
# CONFIG_SPI_ROCKCHIP_SFC is not set
CONFIG_SPI_ROCKCHIP_SFC=y
# CONFIG_SPI_SC18IS602 is not set
# CONFIG_SPI_SIFIVE is not set
# CONFIG_SPI_SN_F_OSPI is not set

15
projects/ROCKNIX/devices/RK3326/packages/u-boot/config/extlinux/README.txt Normal file
View File

@@ -0,0 +1,15 @@
extlinux.conf is a file which has a final word when describing how to boot your device.
Usually u-boot runs boot.scr which checks some hardware stuff (ADC voltage, some GPIO levels),
chooses a dtb based on collected data and passes that to extlinux.
Thay may fail if you have a rare device or faulty hardware or something else unexpected.
In this case you can configure extlinux.conf manually.
Main things to edit:
* APPEND -- kernel cmdline. If you have UART soldered you may want to remove 'quiet' option.
Also this parameter can modify kernel behaviour (e.g. disable or configure drivers)
* FDT -- a path to .dtb file to use. Please note that uboot's extlinux has a poor parser,
and even a space after dtb file path breaks the boot.
* FDTOVERLAYS -- dtb overlays to apply. This line can point to non-existing files, that's ok.
Overlays may be used to apply configuration specific to your device
(e.g. joystic axis inversion, display init sequence, etc.)

3
projects/ROCKNIX/devices/RK3326/packages/u-boot/config/extlinux/extlinux.conf
View File

@@ -1,6 +1,7 @@
LABEL ROCKNIX
LINUX /KERNEL
FDTDIR /
# FDT /your-custom-devicetree.dtb ## don't forget the leading slash
## FDT: don't forget the leading slash, remove all symbols after .dtb (including whitespace)
# FDT /your-custom-devicetree.dtb
FDTOVERLAYS /overlays/mipi-panel.dtbo
APPEND boot=${partition_boot} disk=${partition_storage} @EXTRA_CMDLINE@ uboot.hwid_adc=${hwid_adc}

6
projects/ROCKNIX/devices/RK3326/packages/u-boot/config/extlinux/extlinux.conf.rgb20s Normal file
View File

@@ -0,0 +1,6 @@
LABEL ROCKNIX
LINUX /KERNEL
FDTDIR /
FDT /rk3326-powkiddy-rgb20s.dtb
FDTOVERLAYS /overlays/mipi-panel.dtbo
APPEND boot=${partition_boot} disk=${partition_storage} @EXTRA_CMDLINE@ uboot.hwid_adc=${hwid_adc}

12
projects/ROCKNIX/devices/RK3326/packages/u-boot/config/overlays/README.txt Normal file
View File

@@ -0,0 +1,12 @@
Here your device tree overlays live.
Currently only mipi-panel.dtbo is expected which is intended for display driver stuff.
For R36s, rg351*-v2 and maybe other devices you may need to put a proper mipi-panel.dtbo
to make display work.
See https://rocknix.org/devices/unbranded/game-console-r35s-r36s/#new-displays-r36s-of-year-2024
Despite the name, mipi-panel.dtbo is also abused for quite a complex tuning
of EE clones of year 2025, but in this case the overlay is usually generated automatically.
In some cases (something is misdetected) you may want to replace mipi-panel.dtbo
with whatever you need.
See https://rocknix.org/devices/unbranded/EE-clones/#in-case-of-issues-with-displaysoundetc

4
projects/ROCKNIX/devices/RK3326/packages/u-boot/config/stock/README.txt Normal file
View File

@@ -0,0 +1,4 @@
On some devices (EE clones) you can put your stock .dtb file
to this dir if the wizard could not locate it automatically.
See https://rocknix.org/devices/unbranded/EE-clones/ for info

30
projects/ROCKNIX/devices/RK3326/packages/u-boot/package.mk
View File

@@ -2,7 +2,7 @@
# Copyright (C) 2024-present ROCKNIX (https://github.com/ROCKNIX)
PKG_NAME="u-boot"
PKG_VERSION="v2025.04"
PKG_VERSION="v2025.10"
PKG_LICENSE="GPL"
PKG_SITE="https://www.denx.de/wiki/U-Boot"
PKG_URL="https://github.com/u-boot/u-boot/archive/refs/tags/${PKG_VERSION}.tar.gz"
@@ -24,27 +24,33 @@ pre_make_target() {
PKG_MINILOADER="${PKG_RKBIN}/bin/rk33/rk3326_miniloader_v1.40.bin"
PKG_BL31="${PKG_RKBIN}/bin/rk33/rk3326_bl31_v1.34.elf"
PKG_DDR_BIN="${PKG_RKBIN}/bin/rk33/rk3326_ddr_333MHz_v2.11.bin"
if [[ "${BOOTLOADER_UART}" == "5" ]]; then
PKG_DDR_BIN="${PKG_RKBIN}/rk3326_ddr_uart5.bin" # K36 clones use UART5
fi
PKG_DDR_BIN_UART5="${PKG_RKBIN}/rk3326_ddr_uart5.bin"
}
make_target() {
[ "${BUILD_WITH_DEBUG}" = "yes" ] && PKG_DEBUG=1 || PKG_DEBUG=0
setup_pkg_config_host
find_file_path bootloader/rkhelper || exit 4
RKHELPER=${FOUND_PATH}
DEBUG=${PKG_DEBUG} CROSS_COMPILE="${TARGET_KERNEL_PREFIX}" LDFLAGS="" ARCH=arm make mrproper
DEBUG=${PKG_DEBUG} CROSS_COMPILE="${TARGET_KERNEL_PREFIX}" LDFLAGS="" ARCH=arm make ${PKG_UBOOT_CONFIG}
if [[ "${BOOTLOADER_UART}" == "5" ]]; then
./scripts/config --set-val CONFIG_DEBUG_UART_BASE 0xFF178000
./scripts/config --set-str CONFIG_DEVICE_TREE_INCLUDES "rk3326-odroid-go2-emmc.dtsi rk3326-odroid-go2-uart5.dtsi"
fi
DEBUG=${PKG_DEBUG} CROSS_COMPILE="${TARGET_KERNEL_PREFIX}" LDFLAGS="" ARCH=arm \
_python_sysroot="${TOOLCHAIN}" _python_prefix=/ _python_exec_prefix=/ \
make HOSTCC="${HOST_CC}" HOSTLDFLAGS="-L${TOOLCHAIN}/lib" HOSTSTRIP="true" CONFIG_MKIMAGE_DTC_PATH="scripts/dtc/dtc" \
u-boot-dtb.bin
. ${RKHELPER}
mv uboot.bin uboot.bin.default
find_file_path bootloader/rkhelper && . ${FOUND_PATH}
./scripts/config --set-val CONFIG_DEBUG_UART_BASE 0xFF178000
./scripts/config --set-str CONFIG_DEVICE_TREE_INCLUDES "rk3326-odroid-go2-emmc.dtsi rk3326-odroid-go2-uart5.dtsi"
DEBUG=${PKG_DEBUG} CROSS_COMPILE="${TARGET_KERNEL_PREFIX}" LDFLAGS="" ARCH=arm \
_python_sysroot="${TOOLCHAIN}" _python_prefix=/ _python_exec_prefix=/ \
make HOSTCC="${HOST_CC}" HOSTLDFLAGS="-L${TOOLCHAIN}/lib" HOSTSTRIP="true" CONFIG_MKIMAGE_DTC_PATH="scripts/dtc/dtc" \
u-boot-dtb.bin
PKG_DDR_BIN=${PKG_DDR_BIN_UART5} . ${RKHELPER}
mv uboot.bin uboot.bin.uart5
}
makeinstall_target() {
@@ -65,10 +71,14 @@ makeinstall_target() {
fi
done
cp -av uboot.bin "${INSTALL}/usr/share/bootloader/"
cp -av uboot.bin.default "${INSTALL}/usr/share/bootloader/uboot.bin"
cp -av uboot.bin.uart5 "${INSTALL}/usr/share/bootloader/uboot.bin.uart5"
find_dir_path config/extlinux || exit 3
cp -av ${FOUND_PATH} "${INSTALL}/usr/share/bootloader/"
sed -e "s/@EXTRA_CMDLINE@/${EXTRA_CMDLINE}/" \
-i ${INSTALL}/usr/share/bootloader/extlinux/*
find_dir_path config/stock && cp -av ${FOUND_PATH} "${INSTALL}/usr/share/bootloader/"
find_dir_path config/overlays && cp -av ${FOUND_PATH} "${INSTALL}/usr/share/bootloader/"
}

2
projects/ROCKNIX/devices/RK3326/packages/u-boot/patches/0001-add-support-for-k36-clone-with-emmc-rk3326.patch
View File

@@ -221,7 +221,7 @@ index 0000000000..0686824515
+# CONFIG_SPECIFY_CONSOLE_INDEX is not set
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
+CONFIG_SOUND=y
+CONFIG_ROCKCHIP_SFC=y
+CONFIG_SYSRESET=y
+CONFIG_DM_THERMAL=y
+CONFIG_USB=y

457
projects/ROCKNIX/devices/RK3326/packages/u-boot/patches/0002-minimal-generic-rk3326-dts.patch Normal file
View File

@@ -0,0 +1,457 @@
From 6cf248d09ceeedda3578e1233beeb7590312ce72 Mon Sep 17 00:00:00 2001
From: Danil Zagoskin <z@gosk.in>
Date: Sat, 15 Nov 2025 08:12:04 +0300
Subject: [PATCH] minimal generic rk3326 dts
---
arch/arm/dts/rk3326-odroid-go2-emmc.dtsi | 9 +
configs/rk3326-handheld_defconfig | 4 +-
.../arm64/rockchip/rk3326-common-handheld.dts | 390 ++++++++++++++++++
3 files changed, 401 insertions(+), 2 deletions(-)
create mode 100644 dts/upstream/src/arm64/rockchip/rk3326-common-handheld.dts
diff --git a/arch/arm/dts/rk3326-odroid-go2-emmc.dtsi b/arch/arm/dts/rk3326-odroid-go2-emmc.dtsi
index c332c8b14a..b25e54d7bb 100644
--- a/arch/arm/dts/rk3326-odroid-go2-emmc.dtsi
+++ b/arch/arm/dts/rk3326-odroid-go2-emmc.dtsi
@@ -7,6 +7,7 @@
aliases {
mmc0 = &emmc;
mmc1 = &sdmmc;
+ mmc2 = &sdio;
};
};
@@ -17,3 +18,11 @@
u-boot,spl-fifo-mode;
status = "okay";
};
+
+&sdio {
+ bootph-all;
+
+ /* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
+ u-boot,spl-fifo-mode;
+ status = "okay";
+};
diff --git a/configs/rk3326-handheld_defconfig b/configs/rk3326-handheld_defconfig
index 0686824515..d92da1015e 100644
--- a/configs/rk3326-handheld_defconfig
+++ b/configs/rk3326-handheld_defconfig
@@ -5,7 +5,7 @@ CONFIG_ARCH_ROCKCHIP=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_OFFSET=0x4000
-CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3326-odroid-go2"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3326-common-handheld"
CONFIG_DEVICE_TREE_INCLUDES="rk3326-odroid-go2-emmc.dtsi"
CONFIG_LAST_STAGE_INIT=y
CONFIG_DM_RESET=y
@@ -28,7 +28,7 @@ CONFIG_DISTRO_DEFAULTS=y
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_FIT=y
CONFIG_SPL_LOAD_FIT=y
-CONFIG_DEFAULT_FDT_FILE="rockchip/rk3326-odroid-go2.dtb"
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3326-common-handheld.dtb"
# CONFIG_CONSOLE_MUX is not set
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
diff --git a/dts/upstream/src/arm64/rockchip/rk3326-common-handheld.dts b/dts/upstream/src/arm64/rockchip/rk3326-common-handheld.dts
new file mode 100644
index 0000000000..8790ae2387
--- /dev/null
+++ b/dts/upstream/src/arm64/rockchip/rk3326-common-handheld.dts
@@ -0,0 +1,390 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Hardkernel Co., Ltd
+ * Copyright (c) 2020 Theobroma Systems Design und Consulting GmbH
+ * Copyright (c) 2022 Maya Matuszczyk <maccraft123mc@gmail.com>
+ * Copyright (c) 2025 ROCKNIX https://rocknix.org/
+ */
+
+/dts-v1/;
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include "rk3326.dtsi"
+
+/ {
+ model = "Generic RK3326 Handheld";
+ compatible = "generic,rk3326-handheld", "rockchip,rk3326";
+
+ aliases {
+ mmc0 = &sdmmc;
+ };
+
+ chosen {
+ stdout-path = "serial2:1500000n8";
+ };
+
+ vccsys: regulator-vccsys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v8_sys";
+ regulator-always-on;
+ regulator-min-microvolt = <3800000>;
+ regulator-max-microvolt = <3800000>;
+ };
+};
+
+&cpu0 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu1 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu2 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu3 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cru {
+ assigned-clocks = <&cru PLL_NPLL>,
+ <&cru ACLK_BUS_PRE>, <&cru ACLK_PERI_PRE>,
+ <&cru HCLK_BUS_PRE>, <&cru HCLK_PERI_PRE>,
+ <&cru PCLK_BUS_PRE>, <&cru SCLK_GPU>;
+
+ assigned-clock-rates = <1188000000>,
+ <200000000>, <200000000>,
+ <150000000>, <150000000>,
+ <100000000>, <200000000>;
+};
+
+&display_subsystem {
+ status = "okay";
+};
+
+&i2c0 {
+ clock-frequency = <400000>;
+ i2c-scl-falling-time-ns = <16>;
+ i2c-scl-rising-time-ns = <280>;
+ status = "okay";
+
+ rk817: pmic@20 {
+ compatible = "rockchip,rk817";
+ reg = <0x20>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <RK_PB2 IRQ_TYPE_LEVEL_LOW>;
+ clock-output-names = "rk808-clkout1", "xin32k";
+ clock-names = "mclk";
+ clocks = <&cru SCLK_I2S1_OUT>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pmic_int>, <&i2s1_2ch_mclk>;
+ wakeup-source;
+ #clock-cells = <1>;
+ #sound-dai-cells = <0>;
+
+ vcc1-supply = <&vccsys>;
+ vcc2-supply = <&vccsys>;
+ vcc3-supply = <&vccsys>;
+ vcc4-supply = <&vccsys>;
+ vcc5-supply = <&vccsys>;
+ vcc6-supply = <&vccsys>;
+ vcc7-supply = <&vccsys>;
+ vcc8-supply = <&vccsys>;
+
+ regulators {
+ vdd_logic: DCDC_REG1 {
+ regulator-name = "vdd_logic";
+ regulator-min-microvolt = <950000>;
+ regulator-max-microvolt = <1150000>;
+ regulator-ramp-delay = <6001>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <950000>;
+ };
+ };
+
+ vdd_arm: DCDC_REG2 {
+ regulator-name = "vdd_arm";
+ regulator-min-microvolt = <950000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-ramp-delay = <6001>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <950000>;
+ };
+ };
+
+ vcc_ddr: DCDC_REG3 {
+ regulator-name = "vcc_ddr";
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vcc_3v3: DCDC_REG4 {
+ regulator-name = "vcc_3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vcc_1v8: LDO_REG2 {
+ regulator-name = "vcc_1v8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vdd_1v0: LDO_REG3 {
+ regulator-name = "vdd_1v0";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1000000>;
+ };
+ };
+
+ vcc3v3_pmu: LDO_REG4 {
+ regulator-name = "vcc3v3_pmu";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vccio_sd: LDO_REG5 {
+ regulator-name = "vccio_sd";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vcc_sd: LDO_REG6 {
+ regulator-name = "vcc_sd";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vcc_bl: LDO_REG7 {
+ regulator-name = "vcc_bl";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vcc_lcd: LDO_REG8 {
+ regulator-name = "vcc_lcd";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <2800000>;
+ };
+ };
+
+ LDO_REG9 {
+ /* unused */
+ };
+
+ usb_midu: BOOST {
+ regulator-name = "usb_midu";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5400000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+ };
+
+ rk817_charger: charger {
+ rockchip,resistor-sense-micro-ohms = <10000>;
+ rockchip,sleep-enter-current-microamp = <300000>;
+ rockchip,sleep-filter-current-microamp = <100000>;
+ };
+
+ rk817_codec: codec {
+ rockchip,mic-in-differential;
+ };
+ };
+};
+
+/* EXT Header(P2): 7(SCL:GPIO0.C2), 8(SDA:GPIO0.C3) */
+&i2c1 {
+ clock-frequency = <400000>;
+ status = "okay";
+};
+
+&io_domains {
+ vccio1-supply = <&vcc_3v3>;
+ vccio2-supply = <&vccio_sd>;
+ vccio3-supply = <&vcc_3v3>;
+ vccio4-supply = <&vcc_3v3>;
+ vccio5-supply = <&vcc_3v3>;
+ vccio6-supply = <&vcc_3v3>;
+ status = "okay";
+};
+
+&pmu_io_domains {
+ pmuio1-supply = <&vcc3v3_pmu>;
+ pmuio2-supply = <&vcc3v3_pmu>;
+ status = "okay";
+};
+
+&saradc {
+ vref-supply = <&vcc_1v8>;
+ status = "okay";
+};
+
+&sdmmc {
+ cap-sd-highspeed;
+ card-detect-delay = <200>;
+ cd-gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_LOW>; /*[> CD GPIO <]*/
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
+ vmmc-supply = <&vcc_sd>;
+ vqmmc-supply = <&vccio_sd>;
+ status = "okay";
+};
+
+&sdio {
+ cap-sd-highspeed;
+ non-removable;
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
+ vmmc-supply = <&vcc_sd>;
+ vqmmc-supply = <&vccio_sd>;
+ status = "okay";
+};
+
+&sfc {
+ pinctrl-0 = <&sfc_clk &sfc_cs0 &sfc_bus2>;
+ pinctrl-names = "default";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <108000000>;
+ spi-rx-bus-width = <2>;
+ spi-tx-bus-width = <1>;
+ };
+};
+
+&tsadc {
+ status = "okay";
+};
+
+&u2phy {
+ status = "okay";
+
+ u2phy_host: host-port {
+ status = "okay";
+ };
+
+ u2phy_otg: otg-port {
+ status = "disabled";
+ };
+};
+
+&usb20_otg {
+ status = "okay";
+};
+
+/* EXT Header(P2): 2(RXD:GPIO1.C0),3(TXD:.C1),4(CTS:.C2),5(RTS:.C3) */
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_xfer &uart1_cts>;
+ status = "okay";
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2m1_xfer>;
+ status = "okay";
+};
+
+&vopb {
+ status = "okay";
+};
+
+&vopb_mmu {
+ status = "okay";
+};
+
+&pinctrl {
+ pmic {
+ dc_det: dc-det {
+ rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ pmic_int: pmic-int {
+ rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+
+ soc_slppin_gpio: soc_slppin_gpio {
+ rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_output_low>;
+ };
+
+ soc_slppin_rst: soc_slppin_rst {
+ rockchip,pins = <0 RK_PA4 2 &pcfg_pull_none>;
+ };
+
+ soc_slppin_slp: soc_slppin_slp {
+ rockchip,pins = <0 RK_PA4 1 &pcfg_pull_none>;
+ };
+ };
+};
--
2.51.0

3
projects/ROCKNIX/packages/hardware/quirks/devices/Generic EE clone/002-generate_dtbo
View File

@@ -38,6 +38,9 @@ if [ -d "${TMPDIR}/flash" ]; then
rsync -av ${TMPDIR}/flash/ /flash || true
# reinstall bootloader to switch console to UART5
/usr/share/bootloader/update.sh
# Cleanup and reboot
mount -o remount,ro /flash
sync

54
tools/upload_to_filebin Executable file
View File

@@ -0,0 +1,54 @@
#!/bin/bash
if [ -z "$1" ]; then
echo -e "Usage:\n $0 path/to/file path/to/file ...\n" >&2
echo -e "Example:\n $0 release/*.tar\n" >&2
echo -e "The script: will return an URL of created bin, e.g. https://filebin.net/filebin-helper-b1eeb559d" >&2
echo -e "Bin ID is generated from branch name and revision, so new commit = new bin\n" >&2
echo -e "Env vars:" >&2
echo -e " FILEBIN_BIN_ID bin id to upload files to (as in url, 'filebin-helper-b1eeb559d' above)" >&2
echo -e " FILEBIN_CID client id token, used for authorization" >&2
exit 1
fi
BRANCH=$(git rev-parse --abbrev-ref HEAD)
REV=$(git rev-parse --short HEAD)
if [ -z "${FILEBIN_CID}" ]; then
FILEBIN_CID=$(echo $USER $HOSTNAME $BRANCH | md5sum | cut -d" " -f1)
fi
if [ -z "${FILEBIN_BIN_ID}" ]; then
FILEBIN_BIN_ID="${BRANCH//[^a-zA-Z0-9-._]}-${REV}"
fi
BIN_URL="https://filebin.net/${FILEBIN_BIN_ID}"
echo "FILEBIN_CID=${FILEBIN_CID}"
COUNT_TOTAL=0
COUNT_SUCCESS=0
for FILE in "$@"; do
COUNT_TOTAL=$(($COUNT_TOTAL + 1))
if [ ! -s "$FILE" ]; then
echo "${FILE} seems to be broken" >&2
continue
fi
FILE_IN_BIN="$(basename $FILE)"
FILE_IN_BIN="${FILE_IN_BIN//[^a-zA-Z0-9-._]}"
UPLOAD_URL="${BIN_URL}/${FILE_IN_BIN}"
echo "Uploading ${FILE}"
echo "File URL: ${UPLOAD_URL}"
curl --fail --progress-bar ${CURL_EXTRA} \
-H "cid: ${FILEBIN_CID}" -H 'accept: application/json' -H 'Content-Type: application/octet-stream' \
-X POST "${UPLOAD_URL}" -T "${FILE}" > /dev/null
if [[ $? -eq 0 ]]; then
COUNT_SUCCESS=$(($COUNT_SUCCESS + 1))
else
echo -e "Failed: ${FILE}\n" >&2
fi
done
echo "${COUNT_SUCCESS}/${COUNT_TOTAL} file(s) uploaded to ${BIN_URL}"