archr/Arch-R
0
0
Fork 0
mirror of https://github.com/archr-linux/Arch-R.git synced 2026-03-31 14:41:55 -07:00
Code Issues Packages Projects Releases Wiki Activity

linux/sm8650: update

Browse Source
This commit is contained in:
Philippe Simons
2025-12-10 20:58:38 +01:00
parent 9869509d39
commit d13cc1eb59
5 changed files with 356 additions and 137 deletions
Download Patch File Download Diff File Expand all files Collapse all files

BIN
projects/ROCKNIX/devices/SM8650/filesystem/usr/lib/kernel-overlays/base/lib/firmware/ath12k/WCN7850/hw2.0/board-2.bin
View File

Binary file not shown.

132
projects/ROCKNIX/devices/SM8650/patches/linux/0001-add-ayaneo-pocket-s2-dts.patch
View File

@@ -3,7 +3,7 @@ new file mode 100644
index 000000000000..681ded735fe4
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/sm8650-ayaneo-ps2.dts
@@ -0,0 +1,1730 @@
@@ -0,0 +1,1794 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2023, Linaro Limited
@@ -29,6 +29,7 @@ index 000000000000..681ded735fe4
+ model = "AYANEO Pocket S2";
+ compatible = "ayaneo,pocket-s2", "qcom,sm8650";
+ rocknix-u-boot-dt-id = "u-boot-ayaneo-ps2";
+ chassis-type = "handset";
+
+ aliases {
+ serial0 = &uart15;
@@ -50,7 +51,7 @@ index 000000000000..681ded735fe4
+ pinctrl-0 = <&fan0_pwr_active>, <&pwm_fan_ctrl_default>, <&fan0_int_active>;
+ pinctrl-1 = <&fan0_pwr_sleep>;
+ pwms = <&pm8550_pwm 3 40000>;
+ cooling-levels = <0 40 65 75 90 120 150 200>;
+ cooling-levels = <0 30 45 60 70 90 120 150>;
+ };
+
+ gpio-keys {
@@ -123,12 +124,16 @@ index 000000000000..681ded735fe4
+ "SpkrRight IN", "WSA_SPK2 OUT",
+ "IN1_HPHL", "HPHL_OUT",
+ "IN2_HPHR", "HPHR_OUT",
+ "DMIC1", "MIC BIAS1",
+ "DMIC2", "MIC BIAS2",
+ "AMIC1", "MIC BIAS1",
+ "AMIC2", "MIC BIAS2",
+ "AMIC3", "MIC BIAS3",
+ "AMIC4", "MIC BIAS3",
+ "AMIC5", "MIC BIAS4",
+ "TX SWR_INPUT0", "ADC1_OUTPUT",
+ "TX SWR_INPUT1", "ADC2_OUTPUT",
+ "TX SWR_INPUT7", "DMIC1_OUTPUT",
+ "TX SWR_INPUT8", "DMIC2_OUTPUT";
+ "TX SWR_INPUT2", "ADC3_OUTPUT",
+ "TX SWR_INPUT3", "ADC4_OUTPUT",
+ "TX SWR_INPUT8", "DMIC1_OUTPUT";
+
+ wcd-playback-dai-link {
+ link-name = "WCD Playback";
@@ -177,6 +182,38 @@ index 000000000000..681ded735fe4
+ sound-dai = <&q6apm>;
+ };
+ };
+
+ va-dai-link {
+ link-name = "VA Capture";
+
+ cpu {
+ sound-dai = <&q6apmbedai VA_CODEC_DMA_TX_0>;
+ };
+
+ codec {
+ sound-dai = <&lpass_vamacro 0>;
+ };
+
+ platform {
+ sound-dai = <&q6apm>;
+ };
+ };
+
+ dp-dai-link {
+ link-name = "DisplayPort Playback";
+
+ cpu {
+ sound-dai = <&q6apmbedai DISPLAY_PORT_RX>;
+ };
+
+ codec {
+ sound-dai = <&mdss_dp0>;
+ };
+
+ platform {
+ sound-dai = <&q6apm>;
+ };
+ };
+ };
+
+ thermal-zones {
@@ -490,15 +527,6 @@ index 000000000000..681ded735fe4
+ vdd-mic-bias-supply = <&vreg_bob1>;
+
+ #sound-dai-cells = <1>;
+
+ mode-switch;
+ orientation-switch;
+
+ port {
+ wcd_codec_headset_in: endpoint {
+ remote-endpoint = <&wcd_usbss_headset_out>;
+ };
+ };
+ };
+
+ vph_pwr: vph-pwr-regulator {
@@ -959,14 +987,6 @@ index 000000000000..681ded735fe4
+ remote-endpoint = <&pmic_glink_sbu>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ wcd_usbss_headset_out: endpoint {
+ remote-endpoint = <&wcd_codec_headset_in>;
+ };
+ };
+ };
+ };
+};
@@ -1038,24 +1058,26 @@ index 000000000000..681ded735fe4
+
+ /* Screen power */
+ sgm3804: regulator@3e {
+ compatible = "sgmicro,sgm3804";
+ reg = <0x3e>;
+ pinctrl-names = "default";
+ compatible = "sgmicro,sgm3804";
+ pinctrl-0 = <&panel_pwr_active>;
+ pinctrl-1 = <&panel_pwr_sleep>;
+ pinctrl-names = "default", "sleep";
+ regulator-name = "panel-avdd";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ reset-gpios = <&tlmm 59 GPIO_ACTIVE_HIGH>,
+ <&tlmm 58 GPIO_ACTIVE_HIGH>,
+ <&tlmm 163 GPIO_ACTIVE_HIGH>,
+ <&tlmm 164 GPIO_ACTIVE_HIGH>;
+ reset-gpios = <&tlmm 58 GPIO_ACTIVE_HIGH>,
+ <&tlmm 59 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+ };
+
+ /* Backlight */
+ sy7758_bl: sy7758@2e {
+ compatible = "silergy,sy7758";
+ reg = <0x2e>;
+ compatible = "silergy,sy7758";
+ pinctrl-0 = <&backlight_pwr_active>;
+ pinctrl-1 = <&backlight_pwr_sleep>;
+ pinctrl-names = "default", "sleep";
+ status = "okay";
+ };
+};
@@ -1083,6 +1105,22 @@ index 000000000000..681ded735fe4
+ status = "okay";
+};
+
+&lpass_rxmacro {
+ status = "okay";
+};
+
+&lpass_txmacro {
+ status = "okay";
+};
+
+&lpass_vamacro {
+ pinctrl-0 = <&dmic01_default>;
+ pinctrl-names = "default";
+
+ vdd-micb-supply = <&vreg_bob1>;
+ qcom,dmic-sample-rate = <4800000>;
+};
+
+&mdss {
+ status = "okay";
+};
@@ -1099,8 +1137,8 @@ index 000000000000..681ded735fe4
+ compatible = "ayaneo,wt0630-2k";
+ reg = <0>;
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&disp0_reset_n_active>;
+ pinctrl-1 = <&disp0_reset_n_suspend>;
+ pinctrl-0 = <&disp0_reset_n_active>, <&mdp_vsync_active>;
+ pinctrl-1 = <&disp0_reset_n_suspend>, <&mdp_vsync_suspend>;
+
+ vddio-supply = <&vreg_l12b_1p8>;
+ vci-supply = <&vreg_l13b_3p0>;
@@ -1162,6 +1200,10 @@ index 000000000000..681ded735fe4
+ status = "okay";
+};
+
+&mdss_dp0 {
+ status = "okay";
+};
+
+&pcie1 {
+ wake-gpios = <&tlmm 99 GPIO_ACTIVE_HIGH>;
+ perst-gpios = <&tlmm 97 GPIO_ACTIVE_LOW>;
@@ -1294,6 +1336,8 @@ index 000000000000..681ded735fe4
+};
+
+&pmk8550_rtc {
+ qcom,uefi-rtc-info;
+ qcom,no-alarm; /* alarm owned by ADSP */
+ status = "okay";
+};
+
@@ -1491,13 +1535,33 @@ index 000000000000..681ded735fe4
+ };
+
+ panel_pwr_active: panel-pwr-active-state {
+ pins = "gpio58", "gpio59", "gpio164", "gpio163";
+ pins = "gpio58", "gpio59";
+ function = "gpio";
+ drive-strength = <8>;
+ bias-pull-up;
+ bias-pull-disable;
+ output-high;
+ };
+
+ panel_pwr_sleep: panel-pwr-sleep-state {
+ pins = "gpio58", "gpio59";
+ function = "gpio";
+ output-low;
+ };
+
+ backlight_pwr_active: backlight-pwr-active-state {
+ pins = "gpio163", "gpio164";
+ function = "gpio";
+ drive-strength = <8>;
+ bias-pull-disable;
+ output-high;
+ };
+
+ backlight_pwr_sleep: backlight-pwr-sleep-state {
+ pins = "gpio163", "gpio164";
+ function = "gpio";
+ output-low;
+ };
+
+ disp0_reset_n_active: disp0-reset-n-active-state {
+ pins = "gpio133";
+ function = "gpio";

254
projects/ROCKNIX/devices/SM8650/patches/linux/0060-Add-Silergy-SY7758-backlight-driver.patch
View File

@@ -46,31 +46,123 @@ new file mode 100644
index 000000000000..7abad41b9641
--- /dev/null
+++ b/drivers/video/backlight/sy7758.c
@@ -0,0 +1,167 @@
@@ -0,0 +1,317 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Backlight driver for the Silergy sy7758
+ *
+ * Copyright (C) 2025 Kancy Joe <kancy2333@outlook.com>
+ */
+
+#include <linux/backlight.h>
+#include <linux/err.h>
+#include <linux/gpio/consumer.h>
+#include <linux/i2c.h>
+#include <linux/module.h>
+#include <linux/i2c.h>
+#include <linux/of.h>
+#include <linux/err.h>
+#include <linux/bits.h>
+#include <linux/regmap.h>
+#include <linux/bitfield.h>
+#include <linux/gpio/consumer.h>
+#include <linux/regulator/consumer.h>
+
+#define DEFAULT_BRIGHTNESS 1500
+#define DEFAULT_BRIGHTNESS 1024
+#define MAX_BRIGHTNESS 4080
+#define REG_MAX 0xa9
+#define REG_MAX 0xAE
+
+/* reg */
+#define BL_BRT_L 0x10
+#define BL_BRT_H 0x11
+/* registers */
+#define REG_BRT_8BIT 0x00
+#define REG_DEV_CTL 0x01
+#define REG_STATUS 0x02
+#define REG_DEV_ID 0x03
+#define REG_DIRECT_CTL 0x04
+#define REG_STATUS2 0x05
+#define REG_BRT_12BIT_L 0x10
+#define REG_BRT_12BIT_H 0x11
+#define REG_LED_ENABLE 0x16
+
+static DEFINE_MUTEX(sy7758_update_backlight_mutex);
+/* otp memory */
+#define REG_OTP_CFG98 0x98
+#define REG_OTP_CFG9E 0x9E
+#define REG_OTP_CFG0 0xA0
+#define REG_OTP_CFG1 0xA1
+#define REG_OTP_CFG2 0xA2
+#define REG_OTP_CFG3 0xA3
+#define REG_OTP_CFG4 0xA4
+#define REG_OTP_CFG5 0xA5
+#define REG_OTP_CFG6 0xA6
+#define REG_OTP_CFG7 0xA7
+#define REG_OTP_CFG9 0xA9
+#define REG_OTP_CFGA 0xAA
+#define REG_OTP_CFGE 0xAE
+
+/* bit/field define */
+#define BIT_DEV_CTL_FAST BIT(7)
+#define MSK_DEV_CTL_BRT_MODE GENMASK(2, 1)
+#define BIT_DEV_CTL_BL_CTLB BIT(0)
+
+#define BIT_STATUS_OPEN BIT(7)
+#define BIT_STATUS_SHORT BIT(6)
+#define BIT_STATUS_VREF_OK BIT(5)
+#define BIT_STATUS_VBST_OK BIT(4)
+#define BIT_STATUS_OVP BIT(3)
+#define BIT_STATUS_OCP BIT(2)
+#define BIT_STATUS_TSD BIT(1)
+#define BIT_STATUS_UVLO BIT(0)
+
+#define MSK_DIRECT_CTL_OUT GENMASK(5, 0)
+
+#define BIT_STATUS2_OCP50MS_LATCH BIT(0)
+#define BIT_STATUS2_OCP2 BIT(0)
+
+#define MSK_BRT_12BIT_L GENMASK(7, 0)
+#define MSK_BRT_12BIT_H GENMASK(3, 0)
+#define MSK_LED_ENABLE GENMASK(5, 0)
+
+#define BIT_CFG98_IBST_LIM_2X BIT(7)
+#define BIT_CFG98_A0_FSETB BIT(0)
+
+#define BIT_CFG9E_VBST_RANGE BIT(5)
+#define MSK_CFG9E_HEADROOM_OFFSET GENMASK(3, 0)
+
+#define MSK_CFG0_CURRENT_LOW GENMASK(7, 0)
+
+#define BIT_CFG1_PDET_STDBY BIT(7)
+#define MSK_CFG1_CURRENT_MAX GENMASK(6, 4)
+#define MSK_CFG1_CURRENT_HIGH GENMASK(3, 0)
+
+#define BIT_CFG2_UVLO_EN BIT(5)
+#define BIT_CFG2_UVLO_TH BIT(4)
+#define BIT_CFG2_BL_ON BIT(3)
+#define BIT_CFG2_ISET_EN BIT(2)
+#define BIT_CFG2_BST_ESET_EN BIT(1)
+
+#define MSK_CFG3_SLOPE GENMASK(6, 4)
+#define MSK_CFG3_FILTER GENMASK(3, 2)
+#define MSK_CFG3_PWM_INPUT_HYSTERESIS GENMASK(1, 0)
+#define MSK_CFG4_PWM_TO_I_TH GENMASK(7, 4)
+
+#define BIT_CFG5_PWM_DIRECT BIT(7)
+#define MSK_CFG5_PS_MODE GENMASK(6, 4)
+#define MSK_CFG5_PWM_FREQ GENMASK(3, 0)
+
+#define MSK_CFG6_BST_FREQ GENMASK(7, 6)
+#define MSK_CFG6_VBST GENMASK(5, 0)
+
+#define BIT_CFG7_EN_DRV3 BIT(5)
+#define BIT_CFG7_EN_DRV2 BIT(4)
+#define MSK_CFG7_IBST_LIM GENMASK(1, 0)
+
+#define MSK_CFG9_VBST_MAX GENMASK(7, 5)
+#define BIT_CFG9_JUMP_EN BIT(4)
+#define MSK_CFG9_JUMP_TH GENMASK(3, 2)
+#define MSK_CFG9_JUMP_VOLTAGE GENMASK(1, 0)
+
+#define BIT_CFGA_SSCLK_EN BIT(7)
+#define BIT_CFGA_ADAPTIVE BIT(3)
+#define MSK_CFGA_DRIVER_HEADROOM GENMASK(2, 0)
+#define MSK_CFGE_STEP_UP GENMASK(7, 6)
+#define MSK_CFGE_STEP_DN GENMASK(5, 4)
+#define MSK_CFGE_LED_FAULT_TH GENMASK(3, 2)
+#define MSK_CFGE_LED_COMP_HYST GENMASK(1, 0)
+
+struct sy7758 {
+ struct i2c_client *client;
@@ -78,7 +170,7 @@ index 000000000000..7abad41b9641
+ bool led_on;
+};
+
+static void sy7758_init(struct sy7758 *sydev);
+static int sy7758_init(struct sy7758 *sydev);
+
+static const struct regmap_config sy7758_regmap_config = {
+ .reg_bits = 8,
@@ -87,31 +179,46 @@ index 000000000000..7abad41b9641
+};
+
+static int sy7758_write(struct sy7758 *sydev, unsigned int reg,
+ unsigned int val)
+ unsigned int val)
+{
+ return regmap_write(sydev->regmap, reg, val);
+}
+
+static int sy7758_backlight_update_status(struct backlight_device *backlight_dev)
+static int sy7758_read(struct sy7758 *sydev, unsigned int reg,
+ unsigned int *val)
+{
+ return regmap_read(sydev->regmap, reg, val);
+}
+
+static int
+sy7758_backlight_update_status(struct backlight_device *backlight_dev)
+{
+ struct sy7758 *sydev = bl_get_data(backlight_dev);
+ unsigned int brightness = backlight_get_brightness(backlight_dev);
+ mutex_lock(&sy7758_update_backlight_mutex);
+ bool blank = backlight_is_blank(backlight_dev);
+ int ret = 0;
+
+ // Init if not already
+ if (!sydev->led_on && brightness > 0) {
+ // Init
+ sy7758_init(sydev);
+ // Turn on
+ ret = sy7758_init(sydev);
+ if (unlikely(ret < 0))
+ return ret;
+ sydev->led_on = true;
+ } else if (brightness == 0) {
+ } else if (blank || brightness == 0) {
+ // Turn off
+ brightness = 0;
+ sydev->led_on = false;
+ }
+
+ /* Set brightness */
+ sy7758_write(sydev, BL_BRT_L, brightness & 0xf0);
+ sy7758_write(sydev, BL_BRT_H, (brightness >> 8) & 0xf);
+ ret |= sy7758_write(sydev, REG_BRT_12BIT_L,
+ FIELD_PREP(MSK_BRT_12BIT_L, brightness & 0xff));
+ ret |= sy7758_write(sydev, REG_BRT_12BIT_H,
+ FIELD_PREP(MSK_BRT_12BIT_H,
+ (brightness >> 8) & 0xf));
+
+ mutex_unlock(&sy7758_update_backlight_mutex);
+ return 0;
+ return ret;
+}
+
+static const struct backlight_ops sy7758_backlight_ops = {
@@ -119,28 +226,50 @@ index 000000000000..7abad41b9641
+ .update_status = sy7758_backlight_update_status,
+};
+
+static void sy7758_init(struct sy7758 *sydev)
+static struct backlight_device *
+sy7758_register_backlight(struct device *dev,
+ struct sy7758 *sydev,
+ struct backlight_properties *props)
+{
+ sy7758_write(sydev, 0x01, 0x85);
+ sy7758_write(sydev, 0x10, 0x00);
+ sy7758_write(sydev, 0x11, 0x00);
+ sy7758_write(sydev, 0xa5, 0x64);
+ sy7758_write(sydev, 0xa0, 0x55);
+ sy7758_write(sydev, 0xa1, 0x9a);
+ sy7758_write(sydev, 0xa9, 0x80);
+ sy7758_write(sydev, 0xa2, 0x28);
+ /* Wait init done */
+ msleep(10);
+ sy7758_write(sydev, 0x10, 0x40);
+ sy7758_write(sydev, 0x11, 0x01);
+ // Max brightness
+ // 0x10: 0xf0 Low
+ // 0x11: 0x0f High
+ return devm_backlight_device_register(dev, "sy7758-backlight",
+ dev, sydev,
+ &sy7758_backlight_ops, props);
+}
+
+static int sy7758_init(struct sy7758 *sydev)
+{
+ int ret = 0;
+ /* Init seq */
+ ret |= sy7758_write(sydev, REG_DEV_CTL,
+ BIT_DEV_CTL_FAST | BIT_DEV_CTL_BL_CTLB |
+ FIELD_PREP(MSK_DEV_CTL_BRT_MODE, 2));
+ ret |= sy7758_write(sydev, REG_BRT_12BIT_L,
+ FIELD_PREP(MSK_BRT_12BIT_L,
+ DEFAULT_BRIGHTNESS & 0xff));
+ ret |= sy7758_write(sydev, REG_BRT_12BIT_H,
+ FIELD_PREP(MSK_BRT_12BIT_H,
+ (DEFAULT_BRIGHTNESS >> 8)));
+ ret |= sy7758_write(sydev, REG_OTP_CFG5,
+ FIELD_PREP(MSK_CFG5_PS_MODE, 6) |
+ FIELD_PREP(MSK_CFG5_PWM_FREQ, 4));
+ ret |= sy7758_write(sydev, REG_OTP_CFG0,
+ FIELD_PREP(MSK_CFG0_CURRENT_LOW, 85));
+ ret |= sy7758_write(sydev, REG_OTP_CFG1,
+ BIT_CFG1_PDET_STDBY |
+ FIELD_PREP(MSK_CFG1_CURRENT_MAX, 1) |
+ FIELD_PREP(MSK_CFG1_CURRENT_HIGH, 10));
+ ret |= sy7758_write(sydev, REG_OTP_CFG9,
+ FIELD_PREP(MSK_CFG9_VBST_MAX, 4));
+ ret |= sy7758_write(sydev, REG_OTP_CFG2,
+ BIT_CFG2_BL_ON | BIT_CFG2_UVLO_EN);
+
+ if (ret < 0) {
+ sydev->led_on = false;
+ return ret;
+ }
+
+ // Min brightness
+ // 0x10: 0x10 Low
+ // 0x11: 0x00 High
+ sydev->led_on = true;
+ return ret;
+}
+
+static int sy7758_probe(struct i2c_client *client)
@@ -148,15 +277,36 @@ index 000000000000..7abad41b9641
+ struct backlight_device *backlight_dev;
+ struct backlight_properties props;
+ struct sy7758 *sydev;
+ unsigned int dev_id;
+ int ret;
+ struct device *dev = &client->dev;
+
+ sydev = devm_kzalloc(&client->dev, sizeof(*sydev), GFP_KERNEL);
+ sydev = devm_kzalloc(dev, sizeof(*sydev), GFP_KERNEL);
+ if (!sydev)
+ return -ENOMEM;
+
+ ret = devm_regulator_get_enable(dev, "vdd");
+ if (ret)
+ return dev_err_probe(dev, ret,
+ "failed to enable vdd supply\n");
+
+ /* Initialize regmap */
+ sydev->client = client;
+ sydev->regmap = devm_regmap_init_i2c(client, &sy7758_regmap_config);
+ if (IS_ERR(sydev->regmap))
+ return dev_err_probe(&client->dev, PTR_ERR(sydev->regmap), "failed to init regmap\n");
+ return dev_err_probe(dev, PTR_ERR(sydev->regmap),
+ "failed to init regmap\n");
+
+ /* try read and check device id */
+ ret = sy7758_read(sydev, REG_DEV_ID, &dev_id);
+ if (ret < 0) {
+ dev_err_probe(dev, ret, "failed to read device id\n");
+ return -EPROBE_DEFER;
+ }
+ if (dev_id != 0x63) {
+ dev_err(dev, "unexpected device id: 0x%02x\n", dev_id);
+ return -ENODEV;
+ }
+
+ memset(&props, 0, sizeof(props));
+ props.type = BACKLIGHT_RAW;
@@ -164,13 +314,15 @@ index 000000000000..7abad41b9641
+ props.brightness = DEFAULT_BRIGHTNESS;
+ props.scale = BACKLIGHT_SCALE_LINEAR;
+
+ backlight_dev = devm_backlight_device_register(&client->dev, "sy7758-backlight",
+ &client->dev, sydev, &sy7758_backlight_ops, &props);
+ backlight_dev = sy7758_register_backlight(dev, sydev, &props);
+ if (IS_ERR(backlight_dev))
+ return dev_err_probe(&client->dev, PTR_ERR(backlight_dev),
+ "failed to register backlight device\n");
+ return dev_err_probe(dev, PTR_ERR(backlight_dev),
+ "failed to register backlight device\n");
+
+ sy7758_init(sydev);
+ ret = sy7758_init(sydev);
+ if (unlikely(ret < 0))
+ return dev_err_probe(dev, ret,
+ "failed to initialize sy7758\n");
+
+ i2c_set_clientdata(client, backlight_dev);
+ backlight_update_status(backlight_dev);
@@ -181,14 +333,12 @@ index 000000000000..7abad41b9641
+static void sy7758_remove(struct i2c_client *client)
+{
+ struct backlight_device *backlight_dev = i2c_get_clientdata(client);
+
+ backlight_dev->props.brightness = 0;
+ backlight_update_status(backlight_dev);
+}
+
+static const struct i2c_device_id sy7758_ids[] = {
+ { "sy7758" },
+ {}
+};
+static const struct i2c_device_id sy7758_ids[] = { { "sy7758" }, {} };
+MODULE_DEVICE_TABLE(i2c, sy7758_ids);
+
+static const struct of_device_id sy7758_match_table[] = {

28
projects/ROCKNIX/devices/SM8650/patches/linux/0061-regulator-add-sgm3804-i2c-regulator-for-panel-power-.patch
View File

@@ -45,7 +45,7 @@ new file mode 100644
index 000000000000..0002c24e9f2c
--- /dev/null
+++ b/drivers/regulator/sgm3804-regulator.c
@@ -0,0 +1,175 @@
@@ -0,0 +1,159 @@
+#include <linux/err.h>
+#include <linux/i2c.h>
+#include <linux/module.h>
@@ -70,9 +70,7 @@ index 000000000000..0002c24e9f2c
+{
+ struct sgm3804_data *data = rdev_get_drvdata(rdev);
+ struct regmap *regmap = data->regmap;
+ int ret;
+
+ pr_info("sgm3804_enable: called\n");
+ int ret = 0;
+
+ /* Set reset GPIO high to enable the device if available */
+ if (data->reset_gpio[0]) {
@@ -82,25 +80,14 @@ index 000000000000..0002c24e9f2c
+ gpiod_set_value_cansleep(data->reset_gpio[1], 1);
+ }
+
+ ret = regmap_write(regmap, 0x00, 0x0c);
+ ret |= regmap_write(regmap, 0x00, 0x0c);
+ ret |= regmap_write(regmap, 0x01, 0x0c);
+ ret |= regmap_write(regmap, 0x03, 0x03);
+ if (ret) {
+ pr_err("sgm3804_enable: regmap_write 0x00 failed: %d\n", ret);
+ dev_err(rdev->dev.parent, "Failed to enable SGM3804 regulator\n");
+ return ret;
+ }
+
+ ret = regmap_write(regmap, 0x01, 0x0c);
+ if (ret) {
+ pr_err("sgm3804_enable: regmap_write 0x01 failed: %d\n", ret);
+ return ret;
+ }
+
+ ret = regmap_write(regmap, 0x03, 0x03);
+ if (ret) {
+ pr_err("sgm3804_enable: regmap_write 0x03 failed: %d\n", ret);
+ return ret;
+ }
+
+ pr_info("sgm3804_enable: success\n");
+ data->enabled = true;
+ return 0;
+}
@@ -109,8 +96,6 @@ index 000000000000..0002c24e9f2c
+{
+ struct sgm3804_data *data = rdev_get_drvdata(rdev);
+
+ pr_info("sgm3804_disable: called\n");
+
+ if (data->reset_gpio[0]) {
+ gpiod_set_value_cansleep(data->reset_gpio[0], 0);
+ }
@@ -118,7 +103,6 @@ index 000000000000..0002c24e9f2c
+ gpiod_set_value_cansleep(data->reset_gpio[1], 0);
+ }
+
+ pr_info("sgm3804_disable: success\n");
+ data->enabled = false;
+ return 0;
+}

79
projects/ROCKNIX/packages/audio/alsa-ucm-conf/patches/SM8650/0001-AYANEO-Pocket-S2.patch
View File

@@ -22,16 +22,16 @@ new file mode 100644
index 0000000..dc5211e
--- /dev/null
+++ b/ucm2/Qualcomm/sm8650/APS2/HiFi.conf
@@ -0,0 +1,92 @@
@@ -0,0 +1,113 @@
+SectionVerb {
+ EnableSequence [
+ cset "name='DISPLAY_PORT_RX_0 Audio Mixer MultiMedia1' 0"
+ cset "name='RX_CODEC_DMA_RX_0 Audio Mixer MultiMedia1' 1"
+ cset "name='WSA_CODEC_DMA_RX_0 Audio Mixer MultiMedia2' 1"
+ cset "name='MultiMedia3 Mixer TX_CODEC_DMA_TX_3' 1"
+ cset "name='MultiMedia4 Mixer VA_CODEC_DMA_TX_0' 1"
+ ]
+
+
+ Include.wcde.File "/codecs/wcd939x/DefaultEnableSeq.conf"
+ Include.wsae.File "/codecs/wsa884x/two-speakers/DefaultEnableSeq.conf"
+
@@ -52,34 +52,18 @@ index 0000000..dc5211e
+ PlaybackPriority 100
+ PlaybackPCM "hw:${CardId},1"
+ PlaybackMixer "default:${CardId}"
+ PlaybackMixerElem "Speakers"
+ }
+}
+
+
+SectionDevice."Mic" {
+ Comment "Bottom Microphone"
+
+# Include.wcdmice.File "/codecs/wcd939x/DMIC1EnableSeq.conf"
+# Include.wcdmicd.File "/codecs/wcd939x/DMICDisableSeq.conf"
+
+ Include.txmhpe.File "/codecs/qcom-lpass/tx-macro/DMIC0EnableSeq.conf"
+ Include.txmhpe.File "/codecs/qcom-lpass/tx-macro/DMIC0DisableSeq.conf"
+
+# Include.txmhpe.File "/codecs/qcom-lpass/tx-macro/SoundwireMic8EnableSeq.conf"
+# Include.txmhpd.File "/codecs/qcom-lpass/tx-macro/SoundwireMicDisableSeq.conf"
+
+ Value {
+ CaptureChannels 1
+ CapturePriority 200
+ CapturePCM "hw:${CardId},2"
+ CaptureMixerElem "DMIC1"
+ }
+}
+
+
+SectionDevice."Headphones" {
+ Comment "Headphones playback"
+
+ EnableSequence [
+ cset "name='RX_CODEC_DMA_RX_0 Audio Mixer MultiMedia1' 1"
+ cset "name='DISPLAY_PORT_RX_0 Audio Mixer MultiMedia1' 0"
+ ]
+
+ Include.wcdhpe.File "/codecs/wcd939x/HeadphoneEnableSeq.conf"
+ Include.wcdhpd.File "/codecs/wcd939x/HeadphoneDisableSeq.conf"
+ Include.rxmhpe.File "/codecs/qcom-lpass/rx-macro/HeadphoneEnableSeq.conf"
@@ -90,7 +74,7 @@ index 0000000..dc5211e
+ PlaybackPCM "hw:${CardId},0"
+ PlaybackMixer "default:${CardId}"
+ PlaybackMixerElem "HP"
+ JackControl "Headphone Jack"
+ JackControl "Headset Jack"
+ JackHWMute "Speaker"
+ }
+}
@@ -98,9 +82,9 @@ index 0000000..dc5211e
+SectionDevice."Headset" {
+ Comment "Headset microphone"
+
+ ConflictingDevice [
+ "Mic"
+ ]
+ #ConflictingDevice [
+ # "Mic"
+ #]
+
+ Include.wcdmice.File "/codecs/wcd939x/HeadphoneMicEnableSeq.conf"
+ Include.wcdmicd.File "/codecs/wcd939x/HeadphoneMicDisableSeq.conf"
@@ -112,9 +96,46 @@ index 0000000..dc5211e
+ CapturePriority 200
+ CapturePCM "hw:${CardId},2"
+ CaptureMixerElem "ADC2"
+ JackControl "Mic Jack"
+ JackControl "Headset Jack"
+ }
+}
+
+#SectionDevice."Mic" {
+# Comment "Bottom Microphone"
+#
+# Include.txmhpe.File "/codecs/qcom-lpass/tx-macro/SoundwireMic8EnableSeq.conf"
+# Include.txmhpd.File "/codecs/qcom-lpass/tx-macro/SoundwireMicDisableSeq.conf"
+#
+# Value {
+# CaptureChannels 1
+# CapturePriority 100
+# CapturePCM "hw:${CardId},3"
+# CaptureMixerElem "SMIC8"
+# }
+#}
+
+
+SectionDevice."HDMI0" {
+ Comment "DisplayPort 0 playback"
+
+ ConflictingDevice [
+ "Headphones"
+ ]
+
+ EnableSequence [
+ cset "name='DISPLAY_PORT_RX_0 Audio Mixer MultiMedia1' 1"
+ ]
+
+ DisableSequence [
+ cset "name='DISPLAY_PORT_RX_0 Audio Mixer MultiMedia1' 0"
+ ]
+
+ Value {
+ PlaybackPriority 200
+ PlaybackPCM "hw:${CardId},0"
+ JackControl "DP0 Jack"
+ }
+}
diff --git a/ucm2/conf.d/sm8650/SM8650-APS2.conf b/ucm2/conf.d/sm8650/SM8650-APS2.conf
new file mode 120000
index 0000000..414976a