Merge pull request #10050 from chewitt/amlogic-upstream

linux: update kernel and Amlogic patches for Linux 6.14.y

packages/linux/package.mk

@@ -16,8 +16,8 @@ PKG_PATCH_DIRS="${LINUX}"
 
 case "${LINUX}" in
   amlogic)
-    PKG_VERSION="9bc5c94e278f780af15b3f6e13ae08310aeae880" # 6.14.2
-    PKG_SHA256="c031ffd2ce70ffe5f89e8893b9b385169d3f27103af60e2e6b1903c67d3c98cd"
+    PKG_VERSION="e2d3e1fdb530198317501eb7ded4f3a5fb6c881c" # 6.14.6
+    PKG_SHA256="ba423436e51426f26ab4f82b799f92305e228db37610cdb1da9d67eb67661911"
     PKG_URL="https://github.com/torvalds/linux/archive/${PKG_VERSION}.tar.gz"
     PKG_SOURCE_NAME="linux-${LINUX}-${PKG_VERSION}.tar.gz"
     PKG_PATCH_DIRS="default rtlwifi/after-6.14"

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0001-LOCAL-set-meson-gx-cma-pool-to-896MB.patch

@@ -1,7 +1,7 @@
-From 5bb8805228fcb342a09ae2093775d8ca9825eef7 Mon Sep 17 00:00:00 2001
+From a396947aad7b93cbb9af74aa05872432d2ba7077 Mon Sep 17 00:00:00 2001
 From: Christian Hewitt <christianshewitt@gmail.com>
 Date: Sat, 13 Apr 2019 05:41:51 +0000
-Subject: [PATCH 01/51] LOCAL: set meson-gx cma pool to 896MB
+Subject: [PATCH 01/55] LOCAL: set meson-gx cma pool to 896MB
 
 This change sets the CMA pool to a larger 896MB! value for vdec use
 

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0002-LOCAL-set-meson-g12-cma-pool-to-896MB.patch

@@ -1,7 +1,7 @@
-From 61ec51fc6355b44c6a67bd31dfae62d1ef49bde1 Mon Sep 17 00:00:00 2001
+From 6391e61ed787d1ad01caf743570ade3fb08aa219 Mon Sep 17 00:00:00 2001
 From: Christian Hewitt <christianshewitt@gmail.com>
 Date: Wed, 14 Aug 2019 19:58:14 +0000
-Subject: [PATCH 02/51] LOCAL: set meson-g12 cma pool to 896MB
+Subject: [PATCH 02/55] LOCAL: set meson-g12 cma pool to 896MB
 
 This change sets the CMA pool to a larger 896MB! value for vdec use
 

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0003-LOCAL-arm64-fix-Kodi-sysinfo-CPU-information.patch

@@ -1,7 +1,7 @@
-From 8ad1d87fdd6ef19e36698ed3196da4290d539327 Mon Sep 17 00:00:00 2001
+From 2d868721c40d4652d595b5150974451e7a9ac1eb Mon Sep 17 00:00:00 2001
 From: Christian Hewitt <christianshewitt@gmail.com>
 Date: Sat, 13 Apr 2019 05:45:18 +0000
-Subject: [PATCH 03/51] LOCAL: arm64: fix Kodi sysinfo CPU information
+Subject: [PATCH 03/55] LOCAL: arm64: fix Kodi sysinfo CPU information
 
 This allows the CPU information to show in the Kodi sysinfo screen, e.g.
 

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0004-LOCAL-arm64-meson-add-Amlogic-Meson-GX-PM-Suspend.patch

@@ -1,7 +1,7 @@
-From 541a3e64dce42c72d208016abcb91200ae6c893c Mon Sep 17 00:00:00 2001
+From b97bcac935313e7876c320ea28386f1eb8878912 Mon Sep 17 00:00:00 2001
 From: Neil Armstrong <narmstrong@baylibre.com>
 Date: Thu, 3 Nov 2016 15:29:23 +0100
-Subject: [PATCH 04/51] LOCAL: arm64: meson: add Amlogic Meson GX PM Suspend
+Subject: [PATCH 04/55] LOCAL: arm64: meson: add Amlogic Meson GX PM Suspend
 
 The Amlogic Meson GX SoCs uses a non-standard argument to the
 PSCI CPU_SUSPEND call to enter system suspend.

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0005-LOCAL-arm64-dts-meson-add-support-for-GX-PM-and-Virt.patch

@@ -1,7 +1,7 @@
-From f0cd0ee46866bf5c51e5e9ae659bf65a00a52b17 Mon Sep 17 00:00:00 2001
+From a943d0edc42f086d306761830e72203aec47e091 Mon Sep 17 00:00:00 2001
 From: Neil Armstrong <narmstrong@baylibre.com>
 Date: Thu, 3 Nov 2016 15:29:25 +0100
-Subject: [PATCH 05/51] LOCAL: arm64: dts: meson: add support for GX PM and
+Subject: [PATCH 05/55] LOCAL: arm64: dts: meson: add support for GX PM and
  Virtual RTC
 
 Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0006-LOCAL-arm64-dts-meson-add-rtc-vrtc-aliases-to-Khadas.patch

@@ -1,7 +1,7 @@
-From 11f6cc8d5b113befe40a069fcd3b4d14253440d1 Mon Sep 17 00:00:00 2001
+From c5f0f6858c0b816bdfcb57def52f3a9a22519e59 Mon Sep 17 00:00:00 2001
 From: Christian Hewitt <christianshewitt@gmail.com>
 Date: Thu, 21 Jan 2021 01:35:36 +0000
-Subject: [PATCH 06/51] LOCAL: arm64: dts: meson: add rtc/vrtc aliases to
+Subject: [PATCH 06/55] LOCAL: arm64: dts: meson: add rtc/vrtc aliases to
  Khadas VIM
 
 Add aliases to ensure the vrtc time (which normally proves first) is /dev/rtc1

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0007-LOCAL-arm64-dts-meson-add-rtc-vrtc-aliases-to-Khadas.patch

@@ -1,7 +1,7 @@
-From faaef1d48296fd78ad60dc6f8d76a133ed67fb09 Mon Sep 17 00:00:00 2001
+From 3a886a0d0a14b5b6c02c05150cd8bedb0828392a Mon Sep 17 00:00:00 2001
 From: Christian Hewitt <christianshewitt@gmail.com>
 Date: Sat, 6 Nov 2021 13:01:08 +0000
-Subject: [PATCH 07/51] LOCAL: arm64: dts: meson: add rtc/vrtc aliases to
+Subject: [PATCH 07/55] LOCAL: arm64: dts: meson: add rtc/vrtc aliases to
  Khadas VIM2
 
 Add aliases to ensure the vrtc time (which normally proves first) is /dev/rtc1

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0008-LOCAL-arm64-dts-meson-add-rtc-vrtc-aliases-to-Minix-.patch

@@ -1,7 +1,7 @@
-From af394a3409915c1d7d022a779476f65cd6876c39 Mon Sep 17 00:00:00 2001
+From 9029e2f01165e924c404eb75339a81528d1de39c Mon Sep 17 00:00:00 2001
 From: Christian Hewitt <christianshewitt@gmail.com>
 Date: Mon, 1 Feb 2021 19:27:40 +0000
-Subject: [PATCH 08/51] LOCAL: arm64: dts: meson: add rtc/vrtc aliases to Minix
+Subject: [PATCH 08/55] LOCAL: arm64: dts: meson: add rtc/vrtc aliases to Minix
  NEO U9-H
 
 Add node aliases to prevent meson-vrtc from claiming /dev/rtc0

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0009-LOCAL-ASoC-meson-assign-internal-PCM-chmap-ELD-IEC95.patch

@@ -1,7 +1,7 @@
-From 6169c8539c94c04523469ca0c9a0618881eb7163 Mon Sep 17 00:00:00 2001
+From d5b5b93b0911f8efe1f31a66eb7b215ba56e4718 Mon Sep 17 00:00:00 2001
 From: Anssi Hannula <anssi.hannula@iki.fi>
 Date: Sun, 17 Apr 2022 04:37:48 +0000
-Subject: [PATCH 09/51] LOCAL: ASoC: meson: assign internal PCM
+Subject: [PATCH 09/55] LOCAL: ASoC: meson: assign internal PCM
  chmap/ELD/IEC958 kctls to device 0
 
 On SoC sound devices utilizing codec2codec DAI links with an HDMI codec the kctls

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0010-LOCAL-media-meson-vdec-disable-MPEG1-MPEG2-hardware-.patch

@@ -1,7 +1,7 @@
-From b38f002a46b824e6da63514b82fe965af1272d44 Mon Sep 17 00:00:00 2001
+From 5f2d4a3a4724ea99fa2cdd43c1442bdc3eaa58c8 Mon Sep 17 00:00:00 2001
 From: Christian Hewitt <christianshewitt@gmail.com>
 Date: Thu, 5 Jan 2023 15:16:46 +0000
-Subject: [PATCH 10/51] LOCAL: media: meson: vdec: disable MPEG1/MPEG2 hardware
+Subject: [PATCH 10/55] LOCAL: media: meson: vdec: disable MPEG1/MPEG2 hardware
  decoding
 
 The MPEG1/2 decoder is broken and nobody has volunteered to poke

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0011-FROMGIT-6.15-arm64-dts-amlogic-gx-switch-to-the-new-.patch

@@ -0,0 +1,365 @@
+From b2963904dee44fd06600e5fa5fce3355650924b7 Mon Sep 17 00:00:00 2001
+From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
+Date: Fri, 27 Dec 2024 22:25:12 +0100
+Subject: [PATCH 11/55] FROMGIT(6.15): arm64: dts: amlogic: gx: switch to the
+ new PWM controller binding
+
+Use the new PWM controller binding which now relies on passing all
+clock inputs available on the SoC (instead of passing the "wanted"
+clock input for a given board).
+
+Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
+---
+ .../dts/amlogic/meson-gx-libretech-pc.dtsi    |  6 -----
+ .../boot/dts/amlogic/meson-gx-p23x-q20x.dtsi  |  2 --
+ arch/arm64/boot/dts/amlogic/meson-gx.dtsi     |  8 +++---
+ .../boot/dts/amlogic/meson-gxbb-nanopi-k2.dts |  2 --
+ .../dts/amlogic/meson-gxbb-nexbox-a95x.dts    |  2 --
+ .../boot/dts/amlogic/meson-gxbb-p20x.dtsi     |  2 --
+ .../boot/dts/amlogic/meson-gxbb-vega-s95.dtsi |  2 --
+ .../boot/dts/amlogic/meson-gxbb-wetek.dtsi    |  2 --
+ arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi   | 25 +++++++++++++++++++
+ .../boot/dts/amlogic/meson-gxl-s805x-p241.dts |  2 --
+ .../meson-gxl-s905w-jethome-jethub-j80.dts    |  2 --
+ .../meson-gxl-s905x-hwacom-amazetv.dts        |  2 --
+ .../amlogic/meson-gxl-s905x-khadas-vim.dts    |  2 --
+ .../amlogic/meson-gxl-s905x-nexbox-a95x.dts   |  2 --
+ .../dts/amlogic/meson-gxl-s905x-p212.dtsi     |  2 --
+ arch/arm64/boot/dts/amlogic/meson-gxl.dtsi    | 25 +++++++++++++++++++
+ .../dts/amlogic/meson-gxm-khadas-vim2.dts     |  4 ---
+ .../boot/dts/amlogic/meson-gxm-rbox-pro.dts   |  2 --
+ 18 files changed, 54 insertions(+), 40 deletions(-)
+
+diff --git a/arch/arm64/boot/dts/amlogic/meson-gx-libretech-pc.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx-libretech-pc.dtsi
+index d38c3a224fbe..2da49cfbde77 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-gx-libretech-pc.dtsi
++++ b/arch/arm64/boot/dts/amlogic/meson-gx-libretech-pc.dtsi
+@@ -345,24 +345,18 @@ rtc: rtc@51 {
+ &pwm_AO_ab {
+ 	pinctrl-0 = <&pwm_ao_a_3_pins>;
+ 	pinctrl-names = "default";
+-	clocks = <&clkc CLKID_FCLK_DIV4>;
+-	clock-names = "clkin0";
+ 	status = "okay";
+ };
+ 
+ &pwm_ab {
+ 	pinctrl-0 = <&pwm_b_pins>;
+ 	pinctrl-names = "default";
+-	clocks = <&clkc CLKID_FCLK_DIV4>;
+-	clock-names = "clkin0";
+ 	status = "okay";
+ };
+ 
+ &pwm_ef {
+ 	pinctrl-0 = <&pwm_e_pins>, <&pwm_f_clk_pins>;
+ 	pinctrl-names = "default";
+-	clocks = <&clkc CLKID_FCLK_DIV4>;
+-	clock-names = "clkin0";
+ 	status = "okay";
+ };
+ 
+diff --git a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi
+index 45ccddd1aaf0..6da1316d97c6 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi
++++ b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi
+@@ -240,8 +240,6 @@ &pwm_ef {
+ 	status = "okay";
+ 	pinctrl-0 = <&pwm_e_pins>;
+ 	pinctrl-names = "default";
+-	clocks = <&clkc CLKID_FCLK_DIV4>;
+-	clock-names = "clkin0";
+ };
+ 
+ &saradc {
+diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
+index b702a7f7bcf5..260628cf218e 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
++++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
+@@ -333,14 +333,14 @@ i2c_A: i2c@8500 {
+ 			};
+ 
+ 			pwm_ab: pwm@8550 {
+-				compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
++				compatible = "amlogic,meson-gxbb-pwm-v2", "amlogic,meson8-pwm-v2";
+ 				reg = <0x0 0x08550 0x0 0x10>;
+ 				#pwm-cells = <3>;
+ 				status = "disabled";
+ 			};
+ 
+ 			pwm_cd: pwm@8650 {
+-				compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
++				compatible = "amlogic,meson-gxbb-pwm-v2", "amlogic,meson8-pwm-v2";
+ 				reg = <0x0 0x08650 0x0 0x10>;
+ 				#pwm-cells = <3>;
+ 				status = "disabled";
+@@ -355,7 +355,7 @@ saradc: adc@8680 {
+ 			};
+ 
+ 			pwm_ef: pwm@86c0 {
+-				compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
++				compatible = "amlogic,meson-gxbb-pwm-v2", "amlogic,meson8-pwm-v2";
+ 				reg = <0x0 0x086c0 0x0 0x10>;
+ 				#pwm-cells = <3>;
+ 				status = "disabled";
+@@ -507,7 +507,7 @@ i2c_AO: i2c@500 {
+ 			};
+ 
+ 			pwm_AO_ab: pwm@550 {
+-				compatible = "amlogic,meson-gx-ao-pwm", "amlogic,meson-gxbb-ao-pwm";
++				compatible = "amlogic,meson-gxbb-pwm-v2", "amlogic,meson8-pwm-v2";
+ 				reg = <0x0 0x00550 0x0 0x10>;
+ 				#pwm-cells = <3>;
+ 				status = "disabled";
+diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts
+index cf2e2ef81680..2ecc6ebd5a43 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts
++++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts
+@@ -298,8 +298,6 @@ &pwm_ef {
+ 	status = "okay";
+ 	pinctrl-0 = <&pwm_e_pins>;
+ 	pinctrl-names = "default";
+-	clocks = <&clkc CLKID_FCLK_DIV4>;
+-	clock-names = "clkin0";
+ };
+ 
+ &saradc {
+diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts
+index 7d7dde93fff3..c09da40ff7b0 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts
++++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts
+@@ -241,8 +241,6 @@ &pwm_ef {
+ 	status = "okay";
+ 	pinctrl-0 = <&pwm_e_pins>;
+ 	pinctrl-names = "default";
+-	clocks = <&clkc CLKID_FCLK_DIV4>;
+-	clock-names = "clkin0";
+ };
+ 
+ /* Wireless SDIO Module */
+diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi
+index 1736bd2e96e2..6f67364fd63f 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi
++++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi
+@@ -150,8 +150,6 @@ &pwm_ef {
+ 	status = "okay";
+ 	pinctrl-0 = <&pwm_e_pins>;
+ 	pinctrl-names = "default";
+-	clocks = <&clkc CLKID_FCLK_DIV4>;
+-	clock-names = "clkin0";
+ };
+ 
+ /* Wireless SDIO Module */
+diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi
+index 3807a184810b..6ff567225fee 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi
++++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi
+@@ -222,8 +222,6 @@ &pwm_ef {
+ 	status = "okay";
+ 	pinctrl-0 = <&pwm_e_pins>;
+ 	pinctrl-names = "default";
+-	clocks = <&clkc CLKID_FCLK_DIV4>;
+-	clock-names = "clkin0";
+ };
+ 
+ &saradc {
+diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi
+index deb295227189..bfedfc1472ec 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi
++++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi
+@@ -185,8 +185,6 @@ &pwm_ef {
+ 	status = "okay";
+ 	pinctrl-0 = <&pwm_e_pins>;
+ 	pinctrl-names = "default";
+-	clocks = <&clkc CLKID_FCLK_DIV4>;
+-	clock-names = "clkin0";
+ };
+ 
+ &saradc {
+diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
+index ed00e67e6923..8ebce7114a60 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
++++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
+@@ -739,6 +739,31 @@ mux {
+ 	};
+ };
+ 
++&pwm_ab {
++	clocks = <&xtal>,
++		 <>, /* unknown/untested, the datasheet calls it "vid_pll" */
++		 <&clkc CLKID_FCLK_DIV4>,
++		 <&clkc CLKID_FCLK_DIV3>;
++};
++
++&pwm_AO_ab {
++	clocks = <&xtal>, <&clkc CLKID_CLK81>;
++};
++
++&pwm_cd {
++	clocks = <&xtal>,
++		 <>, /* unknown/untested, the datasheet calls it "vid_pll" */
++		 <&clkc CLKID_FCLK_DIV4>,
++		 <&clkc CLKID_FCLK_DIV3>;
++};
++
++&pwm_ef {
++	clocks = <&xtal>,
++		 <>, /* unknown/untested, the datasheet calls it "vid_pll" */
++		 <&clkc CLKID_FCLK_DIV4>,
++		 <&clkc CLKID_FCLK_DIV3>;
++};
++
+ &pwrc {
+ 	resets = <&reset RESET_VIU>,
+ 		 <&reset RESET_VENC>,
+diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s805x-p241.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s805x-p241.dts
+index c5e2306ad7a4..ca7c4e8e7cac 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s805x-p241.dts
++++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s805x-p241.dts
+@@ -280,8 +280,6 @@ &pwm_ef {
+ 	status = "okay";
+ 	pinctrl-0 = <&pwm_e_pins>;
+ 	pinctrl-names = "default";
+-	clocks = <&clkc CLKID_FCLK_DIV4>;
+-	clock-names = "clkin0";
+ };
+ 
+ /* This is connected to the Bluetooth module: */
+diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905w-jethome-jethub-j80.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905w-jethome-jethub-j80.dts
+index 2b94b6e5285e..4ca90ac947b7 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905w-jethome-jethub-j80.dts
++++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905w-jethome-jethub-j80.dts
+@@ -116,8 +116,6 @@ &pwm_ef {
+ 	status = "okay";
+ 	pinctrl-0 = <&pwm_e_pins>;
+ 	pinctrl-names = "default";
+-	clocks = <&clkc CLKID_FCLK_DIV4>;
+-	clock-names = "clkin0";
+ };
+ 
+ &saradc {
+diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-hwacom-amazetv.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-hwacom-amazetv.dts
+index 89fe5110f7a2..62a2da766a00 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-hwacom-amazetv.dts
++++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-hwacom-amazetv.dts
+@@ -115,8 +115,6 @@ &pwm_ef {
+ 	status = "okay";
+ 	pinctrl-0 = <&pwm_e_pins>;
+ 	pinctrl-names = "default";
+-	clocks = <&clkc CLKID_FCLK_DIV4>;
+-	clock-names = "clkin0";
+ };
+ 
+ /* SD card */
+diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts
+index 0741d34945bb..e137ebd48c5e 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts
++++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts
+@@ -213,8 +213,6 @@ &pwm_AO_ab {
+ 	status = "okay";
+ 	pinctrl-0 = <&pwm_ao_a_3_pins>, <&pwm_ao_b_pins>;
+ 	pinctrl-names = "default";
+-	clocks = <&xtal> , <&xtal>;
+-	clock-names = "clkin0", "clkin1" ;
+ };
+ 
+ &pwm_ef {
+diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts
+index c79f9f2099bf..236cedec9f19 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts
++++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts
+@@ -145,8 +145,6 @@ &pwm_ef {
+ 	status = "okay";
+ 	pinctrl-0 = <&pwm_e_pins>;
+ 	pinctrl-names = "default";
+-	clocks = <&clkc CLKID_FCLK_DIV4>;
+-	clock-names = "clkin0";
+ };
+ 
+ /* Wireless SDIO Module */
+diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi
+index b52a830efcce..05a0d4de3ad7 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi
++++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi
+@@ -101,8 +101,6 @@ &pwm_ef {
+ 	status = "okay";
+ 	pinctrl-0 = <&pwm_e_pins>;
+ 	pinctrl-names = "default";
+-	clocks = <&clkc CLKID_FCLK_DIV4>;
+-	clock-names = "clkin0";
+ };
+ 
+ &saradc {
+diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
+index f58d1790de1c..2dc2fdaecf9f 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
++++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
+@@ -809,6 +809,31 @@ internal_phy: ethernet-phy@8 {
+ 	};
+ };
+ 
++&pwm_ab {
++	clocks = <&xtal>,
++		 <>, /* unknown/untested, the datasheet calls it "vid_pll" */
++		 <&clkc CLKID_FCLK_DIV4>,
++		 <&clkc CLKID_FCLK_DIV3>;
++};
++
++&pwm_AO_ab {
++	clocks = <&xtal>, <&clkc CLKID_CLK81>;
++};
++
++&pwm_cd {
++	clocks = <&xtal>,
++		 <>, /* unknown/untested, the datasheet calls it "vid_pll" */
++		 <&clkc CLKID_FCLK_DIV4>,
++		 <&clkc CLKID_FCLK_DIV3>;
++};
++
++&pwm_ef {
++	clocks = <&xtal>,
++		 <>, /* unknown/untested, the datasheet calls it "vid_pll" */
++		 <&clkc CLKID_FCLK_DIV4>,
++		 <&clkc CLKID_FCLK_DIV3>;
++};
++
+ &pwrc {
+ 	resets = <&reset RESET_VIU>,
+ 		 <&reset RESET_VENC>,
+diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts
+index 544c757f8bb7..8a89940869b0 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts
++++ b/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts
+@@ -291,16 +291,12 @@ &pwm_AO_ab {
+ 	status = "okay";
+ 	pinctrl-0 = <&pwm_ao_a_3_pins>, <&pwm_ao_b_pins>;
+ 	pinctrl-names = "default";
+-	clocks = <&clkc CLKID_FCLK_DIV4>;
+-	clock-names = "clkin0";
+ };
+ 
+ &pwm_ef {
+ 	status = "okay";
+ 	pinctrl-0 = <&pwm_e_pins>, <&pwm_f_clk_pins>;
+ 	pinctrl-names = "default";
+-	clocks = <&clkc CLKID_FCLK_DIV4>;
+-	clock-names = "clkin0";
+ };
+ 
+ &sd_emmc_a {
+diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts
+index 7356d3b628b1..ecaf678b23dd 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts
++++ b/arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts
+@@ -192,8 +192,6 @@ &pwm_ef {
+ 	status = "okay";
+ 	pinctrl-0 = <&pwm_e_pins>;
+ 	pinctrl-names = "default";
+-	clocks = <&clkc CLKID_FCLK_DIV4>;
+-	clock-names = "clkin0";
+ };
+ 
+ /* Wireless SDIO Module */
+-- 
+2.34.1
+

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0012-FROMGIT-6.15-arm64-dts-amlogic-axg-switch-to-the-new.patch

@@ -0,0 +1,76 @@
+From 4d8253e3d57b93822f641032c17b1aab8d7c7e8b Mon Sep 17 00:00:00 2001
+From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
+Date: Fri, 27 Dec 2024 22:25:13 +0100
+Subject: [PATCH 12/55] FROMGIT(6.15): arm64: dts: amlogic: axg: switch to the
+ new PWM controller binding
+
+Use the new PWM controller binding which now relies on passing all
+clock inputs available on the SoC (instead of passing the "wanted"
+clock input for a given board).
+
+Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
+---
+ arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 24 ++++++++++++++++++----
+ 1 file changed, 20 insertions(+), 4 deletions(-)
+
+diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
+index e9b22868983d..a6924d246bb1 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
++++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
+@@ -1693,8 +1693,12 @@ sec_AO: ao-secure@140 {
+ 			};
+ 
+ 			pwm_AO_cd: pwm@2000 {
+-				compatible = "amlogic,meson-axg-ao-pwm";
++				compatible = "amlogic,meson-axg-pwm-v2", "amlogic,meson8-pwm-v2";
+ 				reg = <0x0 0x02000  0x0 0x20>;
++				clocks = <&xtal>,
++					 <&clkc_AO CLKID_AO_CLK81>,
++					 <&clkc CLKID_FCLK_DIV4>,
++					 <&clkc CLKID_FCLK_DIV5>;
+ 				#pwm-cells = <3>;
+ 				status = "disabled";
+ 			};
+@@ -1728,8 +1732,12 @@ i2c_AO: i2c@5000 {
+ 			};
+ 
+ 			pwm_AO_ab: pwm@7000 {
+-				compatible = "amlogic,meson-axg-ao-pwm";
++				compatible = "amlogic,meson-axg-pwm-v2", "amlogic,meson8-pwm-v2";
+ 				reg = <0x0 0x07000 0x0 0x20>;
++				clocks = <&xtal>,
++					 <&clkc_AO CLKID_AO_CLK81>,
++					 <&clkc CLKID_FCLK_DIV4>,
++					 <&clkc CLKID_FCLK_DIV5>;
+ 				#pwm-cells = <3>;
+ 				status = "disabled";
+ 			};
+@@ -1806,15 +1814,23 @@ watchdog@f0d0 {
+ 			};
+ 
+ 			pwm_ab: pwm@1b000 {
+-				compatible = "amlogic,meson-axg-ee-pwm";
++				compatible = "amlogic,meson-axg-pwm-v2", "amlogic,meson8-pwm-v2";
+ 				reg = <0x0 0x1b000 0x0 0x20>;
++				clocks = <&xtal>,
++					 <&clkc CLKID_FCLK_DIV5>,
++					 <&clkc CLKID_FCLK_DIV4>,
++					 <&clkc CLKID_FCLK_DIV3>;
+ 				#pwm-cells = <3>;
+ 				status = "disabled";
+ 			};
+ 
+ 			pwm_cd: pwm@1a000 {
+-				compatible = "amlogic,meson-axg-ee-pwm";
++				compatible = "amlogic,meson-axg-pwm-v2", "amlogic,meson8-pwm-v2";
+ 				reg = <0x0 0x1a000 0x0 0x20>;
++				clocks = <&xtal>,
++					 <&clkc CLKID_FCLK_DIV5>,
++					 <&clkc CLKID_FCLK_DIV4>,
++					 <&clkc CLKID_FCLK_DIV3>;
+ 				#pwm-cells = <3>;
+ 				status = "disabled";
+ 			};
+-- 
+2.34.1
+

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0013-FROMGIT-6.15-arm64-dts-amlogic-g12-switch-to-the-new.patch

@@ -0,0 +1,499 @@
+From 46257346eb613ee141712a6ed6ddf97efd249832 Mon Sep 17 00:00:00 2001
+From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
+Date: Fri, 27 Dec 2024 22:25:14 +0100
+Subject: [PATCH 13/55] FROMGIT(6.15): arm64: dts: amlogic: g12: switch to the
+ new PWM controller binding
+
+Use the new PWM controller binding which now relies on passing all
+clock inputs available on the SoC (instead of passing the "wanted"
+clock input for a given board).
+
+Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
+---
+ .../boot/dts/amlogic/meson-g12-common.dtsi    | 33 ++++++++++++++++---
+ .../boot/dts/amlogic/meson-g12a-fbx8am.dts    |  4 ---
+ .../dts/amlogic/meson-g12a-radxa-zero.dts     |  4 ---
+ .../boot/dts/amlogic/meson-g12a-sei510.dts    |  4 ---
+ .../boot/dts/amlogic/meson-g12a-u200.dts      |  2 --
+ .../boot/dts/amlogic/meson-g12a-x96-max.dts   |  4 ---
+ .../amlogic/meson-g12b-a311d-libretech-cc.dts |  2 --
+ .../dts/amlogic/meson-g12b-bananapi-cm4.dtsi  |  4 ---
+ .../boot/dts/amlogic/meson-g12b-bananapi.dtsi |  4 ---
+ .../dts/amlogic/meson-g12b-khadas-vim3.dtsi   |  4 ---
+ .../boot/dts/amlogic/meson-g12b-odroid.dtsi   |  4 ---
+ .../dts/amlogic/meson-g12b-radxa-zero2.dts    |  8 -----
+ .../boot/dts/amlogic/meson-g12b-w400.dtsi     |  6 ----
+ .../amlogic/meson-libretech-cottonwood.dtsi   |  6 ----
+ .../boot/dts/amlogic/meson-sm1-ac2xx.dtsi     |  6 ----
+ .../boot/dts/amlogic/meson-sm1-bananapi.dtsi  |  2 --
+ .../dts/amlogic/meson-sm1-khadas-vim3l.dts    |  2 --
+ .../boot/dts/amlogic/meson-sm1-odroid.dtsi    |  2 --
+ .../boot/dts/amlogic/meson-sm1-sei610.dts     |  6 ----
+ 19 files changed, 28 insertions(+), 79 deletions(-)
+
+diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
+index 2a7f91b2a7cb..9b6593555912 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
++++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
+@@ -2060,8 +2060,11 @@ cecb_AO: cec@280 {
+ 			};
+ 
+ 			pwm_AO_cd: pwm@2000 {
+-				compatible = "amlogic,meson-g12a-ao-pwm-cd";
++				compatible = "amlogic,meson-g12-pwm-v2",
++					     "amlogic,meson8-pwm-v2";
+ 				reg = <0x0 0x2000 0x0 0x20>;
++				clocks = <&xtal>,
++					 <&clkc_AO CLKID_AO_CLK81>;
+ 				#pwm-cells = <3>;
+ 				status = "disabled";
+ 			};
+@@ -2099,8 +2102,13 @@ i2c_AO: i2c@5000 {
+ 			};
+ 
+ 			pwm_AO_ab: pwm@7000 {
+-				compatible = "amlogic,meson-g12a-ao-pwm-ab";
++				compatible = "amlogic,meson-g12-pwm-v2",
++					     "amlogic,meson8-pwm-v2";
+ 				reg = <0x0 0x7000 0x0 0x20>;
++				clocks = <&xtal>,
++					 <&clkc_AO CLKID_AO_CLK81>,
++					 <&clkc CLKID_FCLK_DIV4>,
++					 <&clkc CLKID_FCLK_DIV5>;
+ 				#pwm-cells = <3>;
+ 				status = "disabled";
+ 			};
+@@ -2301,22 +2309,37 @@ spifc: spi@14000 {
+ 			};
+ 
+ 			pwm_ef: pwm@19000 {
+-				compatible = "amlogic,meson-g12a-ee-pwm";
++				compatible = "amlogic,meson-g12-pwm-v2",
++					     "amlogic,meson8-pwm-v2";
+ 				reg = <0x0 0x19000 0x0 0x20>;
++				clocks = <&xtal>,
++					 <>, /* unknown/untested, the datasheet calls it "vid_pll" */
++					 <&clkc CLKID_FCLK_DIV4>,
++					 <&clkc CLKID_FCLK_DIV3>;
+ 				#pwm-cells = <3>;
+ 				status = "disabled";
+ 			};
+ 
+ 			pwm_cd: pwm@1a000 {
+-				compatible = "amlogic,meson-g12a-ee-pwm";
++				compatible = "amlogic,meson-g12-pwm-v2",
++					     "amlogic,meson8-pwm-v2";
+ 				reg = <0x0 0x1a000 0x0 0x20>;
++				clocks = <&xtal>,
++					 <>, /* unknown/untested, the datasheet calls it "vid_pll" */
++					 <&clkc CLKID_FCLK_DIV4>,
++					 <&clkc CLKID_FCLK_DIV3>;
+ 				#pwm-cells = <3>;
+ 				status = "disabled";
+ 			};
+ 
+ 			pwm_ab: pwm@1b000 {
+-				compatible = "amlogic,meson-g12a-ee-pwm";
++				compatible = "amlogic,meson-g12-pwm-v2",
++					     "amlogic,meson8-pwm-v2";
+ 				reg = <0x0 0x1b000 0x0 0x20>;
++				clocks = <&xtal>,
++					 <>, /* unknown/untested, the datasheet calls it "vid_pll" */
++					 <&clkc CLKID_FCLK_DIV4>,
++					 <&clkc CLKID_FCLK_DIV3>;
+ 				#pwm-cells = <3>;
+ 				status = "disabled";
+ 			};
+diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-fbx8am.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-fbx8am.dts
+index a457b3f4397b..9aa36f17ffa2 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-g12a-fbx8am.dts
++++ b/arch/arm64/boot/dts/amlogic/meson-g12a-fbx8am.dts
+@@ -346,8 +346,6 @@ &ir {
+ &pwm_AO_cd {
+ 	pinctrl-0 = <&pwm_ao_d_e_pins>;
+ 	pinctrl-names = "default";
+-	clocks = <&xtal>;
+-	clock-names = "clkin1";
+ 	status = "okay";
+ };
+ 
+@@ -355,8 +353,6 @@ &pwm_ef {
+ 	status = "okay";
+ 	pinctrl-0 = <&pwm_e_pins>;
+ 	pinctrl-names = "default";
+-	clocks = <&xtal>;
+-	clock-names = "clkin0";
+ };
+ 
+ &pdm {
+diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-radxa-zero.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-radxa-zero.dts
+index c779a5da7d1e..952b8d02e5c2 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-g12a-radxa-zero.dts
++++ b/arch/arm64/boot/dts/amlogic/meson-g12a-radxa-zero.dts
+@@ -284,8 +284,6 @@ &ir {
+ &pwm_AO_cd {
+ 	pinctrl-0 = <&pwm_ao_d_e_pins>;
+ 	pinctrl-names = "default";
+-	clocks = <&xtal>;
+-	clock-names = "clkin1";
+ 	status = "okay";
+ };
+ 
+@@ -293,8 +291,6 @@ &pwm_ef {
+ 	status = "okay";
+ 	pinctrl-0 = <&pwm_e_pins>;
+ 	pinctrl-names = "default";
+-	clocks = <&xtal>;
+-	clock-names = "clkin0";
+ };
+ 
+ &saradc {
+diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts
+index ea51341f031b..52fbc5103e45 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts
++++ b/arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts
+@@ -389,8 +389,6 @@ &ir {
+ &pwm_AO_cd {
+ 	pinctrl-0 = <&pwm_ao_d_e_pins>;
+ 	pinctrl-names = "default";
+-	clocks = <&xtal>;
+-	clock-names = "clkin1";
+ 	status = "okay";
+ };
+ 
+@@ -398,8 +396,6 @@ &pwm_ef {
+ 	status = "okay";
+ 	pinctrl-0 = <&pwm_e_pins>;
+ 	pinctrl-names = "default";
+-	clocks = <&xtal>;
+-	clock-names = "clkin0";
+ };
+ 
+ &pdm {
+diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts
+index f70a46967e2b..5407049d2647 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts
++++ b/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts
+@@ -502,8 +502,6 @@ &i2c3 {
+ &pwm_AO_cd {
+ 	pinctrl-0 = <&pwm_ao_d_e_pins>;
+ 	pinctrl-names = "default";
+-	clocks = <&xtal>;
+-	clock-names = "clkin1";
+ 	status = "okay";
+ };
+ 
+diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts
+index 32f98a192494..01da83658ae3 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts
++++ b/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts
+@@ -328,8 +328,6 @@ &ir {
+ &pwm_AO_cd {
+ 	pinctrl-0 = <&pwm_ao_d_e_pins>;
+ 	pinctrl-names = "default";
+-	clocks = <&xtal>;
+-	clock-names = "clkin1";
+ 	status = "okay";
+ };
+ 
+@@ -363,8 +361,6 @@ &pwm_ef {
+ 	status = "okay";
+ 	pinctrl-0 = <&pwm_e_pins>;
+ 	pinctrl-names = "default";
+-	clocks = <&xtal>;
+-	clock-names = "clkin0";
+ };
+ 
+ &uart_A {
+diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-libretech-cc.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-libretech-cc.dts
+index 65b963d794cd..adedc1340c78 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-libretech-cc.dts
++++ b/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-libretech-cc.dts
+@@ -116,6 +116,4 @@ &cpu103 {
+ 
+ &pwm_ab {
+ 	pinctrl-0 = <&pwm_a_e_pins>, <&pwm_b_x7_pins>;
+-	clocks = <&xtal>, <&xtal>;
+-	clock-names = "clkin0", "clkin1";
+ };
+diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4.dtsi
+index 08c33ec7e9f1..92e8b26ecccc 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4.dtsi
++++ b/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4.dtsi
+@@ -257,8 +257,6 @@ &pcie {
+ &pwm_ab {
+ 	pinctrl-0 = <&pwm_a_e_pins>;
+ 	pinctrl-names = "default";
+-	clocks = <&xtal>;
+-	clock-names = "clkin0";
+ 
+ 	status = "okay";
+ };
+@@ -273,8 +271,6 @@ &pwm_ef {
+ &pwm_AO_cd {
+ 	pinctrl-0 = <&pwm_ao_d_e_pins>;
+ 	pinctrl-names = "default";
+-	clocks = <&xtal>;
+-	clock-names = "clkin1";
+ 
+ 	status = "okay";
+ };
+diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi.dtsi
+index d4e1990b5f26..54663c55a20e 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi.dtsi
++++ b/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi.dtsi
+@@ -367,8 +367,6 @@ &pwm_ab {
+ 	status = "okay";
+ 	pinctrl-0 = <&pwm_a_e_pins>;
+ 	pinctrl-names = "default";
+-	clocks = <&xtal>;
+-	clock-names = "clkin0";
+ };
+ 
+ &pwm_ef {
+@@ -380,8 +378,6 @@ &pwm_ef {
+ &pwm_AO_cd {
+ 	pinctrl-0 = <&pwm_ao_d_e_pins>;
+ 	pinctrl-names = "default";
+-	clocks = <&xtal>;
+-	clock-names = "clkin1";
+ 	status = "okay";
+ };
+ 
+diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-khadas-vim3.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-khadas-vim3.dtsi
+index 16dd409051b4..48650bad230d 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-g12b-khadas-vim3.dtsi
++++ b/arch/arm64/boot/dts/amlogic/meson-g12b-khadas-vim3.dtsi
+@@ -92,16 +92,12 @@ &cpu103 {
+ &pwm_ab {
+ 	pinctrl-0 = <&pwm_a_e_pins>;
+ 	pinctrl-names = "default";
+-	clocks = <&xtal>;
+-	clock-names = "clkin0";
+ 	status = "okay";
+ };
+ 
+ &pwm_AO_cd {
+ 	pinctrl-0 = <&pwm_ao_d_e_pins>;
+ 	pinctrl-names = "default";
+-	clocks = <&xtal>;
+-	clock-names = "clkin1";
+ 	status = "okay";
+ };
+ 
+diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi
+index 09d959aefb18..7e8964bacfce 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi
++++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi
+@@ -327,16 +327,12 @@ hdmi_tx_tmds_out: endpoint {
+ &pwm_ab {
+ 	pinctrl-0 = <&pwm_a_e_pins>;
+ 	pinctrl-names = "default";
+-	clocks = <&xtal>;
+-	clock-names = "clkin0";
+ 	status = "okay";
+ };
+ 
+ &pwm_AO_cd {
+ 	pinctrl-0 = <&pwm_ao_d_e_pins>;
+ 	pinctrl-names = "default";
+-	clocks = <&xtal>;
+-	clock-names = "clkin1";
+ 	status = "okay";
+ };
+ 
+diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-radxa-zero2.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-radxa-zero2.dts
+index 39feba7f2d08..fc05ecf90714 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-g12b-radxa-zero2.dts
++++ b/arch/arm64/boot/dts/amlogic/meson-g12b-radxa-zero2.dts
+@@ -379,32 +379,24 @@ &ir {
+ &pwm_ab {
+ 	pinctrl-0 = <&pwm_a_e_pins>;
+ 	pinctrl-names = "default";
+-	clocks = <&xtal>;
+-	clock-names = "clkin0";
+ 	status = "okay";
+ };
+ 
+ &pwm_ef {
+ 	pinctrl-0 = <&pwm_e_pins>;
+ 	pinctrl-names = "default";
+-	clocks = <&xtal>;
+-	clock-names = "clkin0";
+ 	status = "okay";
+ };
+ 
+ &pwm_AO_ab {
+ 	pinctrl-0 = <&pwm_ao_a_pins>;
+ 	pinctrl-names = "default";
+-	clocks = <&xtal>;
+-	clock-names = "clkin0";
+ 	status = "okay";
+ };
+ 
+ &pwm_AO_cd {
+ 	pinctrl-0 = <&pwm_ao_d_e_pins>;
+ 	pinctrl-names = "default";
+-	clocks = <&xtal>;
+-	clock-names = "clkin1";
+ 	status = "okay";
+ };
+ 
+diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-w400.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-w400.dtsi
+index 4cb6930ffb19..a7a0fc264cdc 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-g12b-w400.dtsi
++++ b/arch/arm64/boot/dts/amlogic/meson-g12b-w400.dtsi
+@@ -304,24 +304,18 @@ &ir {
+ &pwm_ab {
+ 	pinctrl-0 = <&pwm_a_e_pins>;
+ 	pinctrl-names = "default";
+-	clocks = <&xtal>;
+-	clock-names = "clkin0";
+ 	status = "okay";
+ };
+ 
+ &pwm_AO_cd {
+ 	pinctrl-0 = <&pwm_ao_d_e_pins>;
+ 	pinctrl-names = "default";
+-	clocks = <&xtal>;
+-	clock-names = "clkin1";
+ 	status = "okay";
+ };
+ 
+ &pwm_ef {
+ 	pinctrl-0 = <&pwm_e_pins>;
+ 	pinctrl-names = "default";
+-	clocks = <&xtal>;
+-	clock-names = "clkin0";
+ 	status = "okay";
+ };
+ 
+diff --git a/arch/arm64/boot/dts/amlogic/meson-libretech-cottonwood.dtsi b/arch/arm64/boot/dts/amlogic/meson-libretech-cottonwood.dtsi
+index 929e4720ae76..ac9c4c2673b1 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-libretech-cottonwood.dtsi
++++ b/arch/arm64/boot/dts/amlogic/meson-libretech-cottonwood.dtsi
+@@ -458,24 +458,18 @@ &pwm_AO_cd {
+ 	status = "okay";
+ 	pinctrl-0 = <&pwm_ao_d_e_pins>;
+ 	pinctrl-names = "default";
+-	clocks = <&xtal>;
+-	clock-names = "clkin1";
+ };
+ 
+ &pwm_ab {
+ 	status = "okay";
+ 	pinctrl-0 = <&pwm_b_x7_pins>;
+ 	pinctrl-names = "default";
+-	clocks = <&xtal>;
+-	clock-names = "clkin1";
+ };
+ 
+ &pwm_cd {
+ 	status = "okay";
+ 	pinctrl-0 = <&pwm_d_x3_pins>;
+ 	pinctrl-names = "default";
+-	clocks = <&xtal>;
+-	clock-names = "clkin1";
+ };
+ 
+ &saradc {
+diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-ac2xx.dtsi b/arch/arm64/boot/dts/amlogic/meson-sm1-ac2xx.dtsi
+index d1fa8b8bf795..a3463149db3d 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-sm1-ac2xx.dtsi
++++ b/arch/arm64/boot/dts/amlogic/meson-sm1-ac2xx.dtsi
+@@ -199,15 +199,11 @@ &pwm_AO_ab {
+ 	status = "okay";
+ 	pinctrl-0 = <&pwm_ao_a_pins>;
+ 	pinctrl-names = "default";
+-	clocks = <&xtal>;
+-	clock-names = "clkin0";
+ };
+ 
+ &pwm_AO_cd {
+ 	pinctrl-0 = <&pwm_ao_d_e_pins>;
+ 	pinctrl-names = "default";
+-	clocks = <&xtal>;
+-	clock-names = "clkin1";
+ 	status = "okay";
+ };
+ 
+@@ -215,8 +211,6 @@ &pwm_ef {
+ 	status = "okay";
+ 	pinctrl-0 = <&pwm_e_pins>;
+ 	pinctrl-names = "default";
+-	clocks = <&xtal>;
+-	clock-names = "clkin0";
+ };
+ 
+ &saradc {
+diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-bananapi.dtsi b/arch/arm64/boot/dts/amlogic/meson-sm1-bananapi.dtsi
+index 81dce862902a..40db95f64636 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-sm1-bananapi.dtsi
++++ b/arch/arm64/boot/dts/amlogic/meson-sm1-bananapi.dtsi
+@@ -367,8 +367,6 @@ &ir {
+ &pwm_AO_cd {
+ 	pinctrl-0 = <&pwm_ao_d_e_pins>;
+ 	pinctrl-names = "default";
+-	clocks = <&xtal>;
+-	clock-names = "clkin1";
+ 	status = "okay";
+ };
+ 
+diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-khadas-vim3l.dts b/arch/arm64/boot/dts/amlogic/meson-sm1-khadas-vim3l.dts
+index 9c0b544e2209..5d75ad3f3e46 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-sm1-khadas-vim3l.dts
++++ b/arch/arm64/boot/dts/amlogic/meson-sm1-khadas-vim3l.dts
+@@ -78,8 +78,6 @@ &cpu3 {
+ &pwm_AO_cd {
+ 	pinctrl-0 = <&pwm_ao_d_e_pins>;
+ 	pinctrl-names = "default";
+-	clocks = <&xtal>;
+-	clock-names = "clkin1";
+ 	status = "okay";
+ };
+ 
+diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-odroid.dtsi b/arch/arm64/boot/dts/amlogic/meson-sm1-odroid.dtsi
+index 7b0e9817a615..ad8d07883760 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-sm1-odroid.dtsi
++++ b/arch/arm64/boot/dts/amlogic/meson-sm1-odroid.dtsi
+@@ -392,8 +392,6 @@ &ir {
+ &pwm_AO_cd {
+ 	pinctrl-0 = <&pwm_ao_d_e_pins>;
+ 	pinctrl-names = "default";
+-	clocks = <&xtal>;
+-	clock-names = "clkin1";
+ 	status = "okay";
+ };
+ 
+diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-sei610.dts b/arch/arm64/boot/dts/amlogic/meson-sm1-sei610.dts
+index 2e3397e55da2..37d7f64b6d5d 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-sm1-sei610.dts
++++ b/arch/arm64/boot/dts/amlogic/meson-sm1-sei610.dts
+@@ -435,15 +435,11 @@ &pwm_AO_ab {
+ 	status = "okay";
+ 	pinctrl-0 = <&pwm_ao_a_pins>;
+ 	pinctrl-names = "default";
+-	clocks = <&xtal>;
+-	clock-names = "clkin0";
+ };
+ 
+ &pwm_AO_cd {
+ 	pinctrl-0 = <&pwm_ao_d_e_pins>;
+ 	pinctrl-names = "default";
+-	clocks = <&xtal>;
+-	clock-names = "clkin1";
+ 	status = "okay";
+ };
+ 
+@@ -451,8 +447,6 @@ &pwm_ef {
+ 	status = "okay";
+ 	pinctrl-0 = <&pwm_e_pins>;
+ 	pinctrl-names = "default";
+-	clocks = <&xtal>;
+-	clock-names = "clkin0";
+ };
+ 
+ &saradc {
+-- 
+2.34.1
+

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0014-FROMGIT-6.15-arm64-dts-amlogic-gx-fix-reference-to-u.patch

@@ -0,0 +1,82 @@
+From bc7b1c3119fd74f4898d547849dffdfefccbcc06 Mon Sep 17 00:00:00 2001
+From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
+Date: Sun, 20 Apr 2025 18:48:00 +0200
+Subject: [PATCH 14/55] FROMGIT(6.15): arm64: dts: amlogic: gx: fix reference
+ to unknown/untested PWM clock
+
+Device-tree expects absent clocks to be specified as <0> (instead of
+using <>). This fixes using the FCLK4/FCLK3 clocks as they are now
+seen at their correct index (while before they were recognized, but at
+the correct index - resulting in the hardware using a different clock
+than what the kernel sees).
+
+Fixes: a526eeef9a81 ("arm64: dts: amlogic: gx: switch to the new PWM controller binding")
+Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
+---
+ arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 6 +++---
+ arch/arm64/boot/dts/amlogic/meson-gxl.dtsi  | 6 +++---
+ 2 files changed, 6 insertions(+), 6 deletions(-)
+
+diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
+index 8ebce7114a60..6c134592c7bb 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
++++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
+@@ -741,7 +741,7 @@ mux {
+ 
+ &pwm_ab {
+ 	clocks = <&xtal>,
+-		 <>, /* unknown/untested, the datasheet calls it "vid_pll" */
++		 <0>, /* unknown/untested, the datasheet calls it "vid_pll" */
+ 		 <&clkc CLKID_FCLK_DIV4>,
+ 		 <&clkc CLKID_FCLK_DIV3>;
+ };
+@@ -752,14 +752,14 @@ &pwm_AO_ab {
+ 
+ &pwm_cd {
+ 	clocks = <&xtal>,
+-		 <>, /* unknown/untested, the datasheet calls it "vid_pll" */
++		 <0>, /* unknown/untested, the datasheet calls it "vid_pll" */
+ 		 <&clkc CLKID_FCLK_DIV4>,
+ 		 <&clkc CLKID_FCLK_DIV3>;
+ };
+ 
+ &pwm_ef {
+ 	clocks = <&xtal>,
+-		 <>, /* unknown/untested, the datasheet calls it "vid_pll" */
++		 <0>, /* unknown/untested, the datasheet calls it "vid_pll" */
+ 		 <&clkc CLKID_FCLK_DIV4>,
+ 		 <&clkc CLKID_FCLK_DIV3>;
+ };
+diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
+index 2dc2fdaecf9f..19b8a39de6a0 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
++++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
+@@ -811,7 +811,7 @@ internal_phy: ethernet-phy@8 {
+ 
+ &pwm_ab {
+ 	clocks = <&xtal>,
+-		 <>, /* unknown/untested, the datasheet calls it "vid_pll" */
++		 <0>, /* unknown/untested, the datasheet calls it "vid_pll" */
+ 		 <&clkc CLKID_FCLK_DIV4>,
+ 		 <&clkc CLKID_FCLK_DIV3>;
+ };
+@@ -822,14 +822,14 @@ &pwm_AO_ab {
+ 
+ &pwm_cd {
+ 	clocks = <&xtal>,
+-		 <>, /* unknown/untested, the datasheet calls it "vid_pll" */
++		 <0>, /* unknown/untested, the datasheet calls it "vid_pll" */
+ 		 <&clkc CLKID_FCLK_DIV4>,
+ 		 <&clkc CLKID_FCLK_DIV3>;
+ };
+ 
+ &pwm_ef {
+ 	clocks = <&xtal>,
+-		 <>, /* unknown/untested, the datasheet calls it "vid_pll" */
++		 <0>, /* unknown/untested, the datasheet calls it "vid_pll" */
+ 		 <&clkc CLKID_FCLK_DIV4>,
+ 		 <&clkc CLKID_FCLK_DIV3>;
+ };
+-- 
+2.34.1
+

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0015-FROMGIT-6.15-arm64-dts-amlogic-g12-fix-reference-to-.patch

@@ -0,0 +1,52 @@
+From d9207b2496fb9ddbcf0b874af6920bcf2371752b Mon Sep 17 00:00:00 2001
+From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
+Date: Sun, 20 Apr 2025 18:48:01 +0200
+Subject: [PATCH 15/55] FROMGIT(6.15): arm64: dts: amlogic: g12: fix reference
+ to unknown/untested PWM clock
+
+Device-tree expects absent clocks to be specified as <0> (instead of
+using <>). This fixes using the FCLK4/FCLK3 clocks as they are now
+seen at their correct index (while before they were recognized, but at
+the correct index - resulting in the hardware using a different clock
+than what the kernel sees).
+
+Fixes: e6884f2e4129 ("arm64: dts: amlogic: g12: switch to the new PWM controller binding")
+Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
+---
+ arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
+index 9b6593555912..4b75b4d07901 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
++++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
+@@ -2313,7 +2313,7 @@ pwm_ef: pwm@19000 {
+ 					     "amlogic,meson8-pwm-v2";
+ 				reg = <0x0 0x19000 0x0 0x20>;
+ 				clocks = <&xtal>,
+-					 <>, /* unknown/untested, the datasheet calls it "vid_pll" */
++					 <0>, /* unknown/untested, the datasheet calls it "vid_pll" */
+ 					 <&clkc CLKID_FCLK_DIV4>,
+ 					 <&clkc CLKID_FCLK_DIV3>;
+ 				#pwm-cells = <3>;
+@@ -2325,7 +2325,7 @@ pwm_cd: pwm@1a000 {
+ 					     "amlogic,meson8-pwm-v2";
+ 				reg = <0x0 0x1a000 0x0 0x20>;
+ 				clocks = <&xtal>,
+-					 <>, /* unknown/untested, the datasheet calls it "vid_pll" */
++					 <0>, /* unknown/untested, the datasheet calls it "vid_pll" */
+ 					 <&clkc CLKID_FCLK_DIV4>,
+ 					 <&clkc CLKID_FCLK_DIV3>;
+ 				#pwm-cells = <3>;
+@@ -2337,7 +2337,7 @@ pwm_ab: pwm@1b000 {
+ 					     "amlogic,meson8-pwm-v2";
+ 				reg = <0x0 0x1b000 0x0 0x20>;
+ 				clocks = <&xtal>,
+-					 <>, /* unknown/untested, the datasheet calls it "vid_pll" */
++					 <0>, /* unknown/untested, the datasheet calls it "vid_pll" */
+ 					 <&clkc CLKID_FCLK_DIV4>,
+ 					 <&clkc CLKID_FCLK_DIV3>;
+ 				#pwm-cells = <3>;
+-- 
+2.34.1
+

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0016-FROMGIT-6.15-arm64-dts-amlogic-dreambox-fix-missing-.patch

@@ -0,0 +1,34 @@
+From f7410af04d5d6099a99a033136688328699c7c75 Mon Sep 17 00:00:00 2001
+From: Christian Hewitt <christianshewitt@gmail.com>
+Date: Wed, 30 Apr 2025 11:51:27 +0000
+Subject: [PATCH 16/55] FROMGIT(6.15): arm64: dts: amlogic: dreambox: fix
+ missing clkc_audio node
+
+Add the clkc_audio node to fix audio support on Dreambox One/Two.
+
+Fixes: 83a6f4c62cb1 ("arm64: dts: meson: add initial support for Dreambox One/Two")
+CC: <stable@vger.kernel.org>
+Suggested-by: Emanuel Strobel <emanuel.strobel@yahoo.com>
+Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
+---
+ arch/arm64/boot/dts/amlogic/meson-g12b-dreambox.dtsi | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-dreambox.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-dreambox.dtsi
+index de35fa2d7a6d..8e3e3354ed67 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-g12b-dreambox.dtsi
++++ b/arch/arm64/boot/dts/amlogic/meson-g12b-dreambox.dtsi
+@@ -116,6 +116,10 @@ &arb {
+ 	status = "okay";
+ };
+ 
++&clkc_audio {
++	status = "okay";
++};
++
+ &frddr_a {
+ 	status = "okay";
+ };
+-- 
+2.34.1
+

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0017-FROMGIT-6.16-arm64-dts-amlogic-gxbb-enable-UART-RX-a.patch

@@ -1,7 +1,7 @@
-From 3eca81d6c8551f3f4ed83e6943ccc86fe1b0130e Mon Sep 17 00:00:00 2001
+From a36ed75aaa253ce71bb995407f28d74548728b50 Mon Sep 17 00:00:00 2001
 From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
 Date: Sat, 29 Mar 2025 19:58:51 +0100
-Subject: [PATCH 11/51] FROMGIT(6.16): arm64: dts: amlogic: gxbb: enable UART
+Subject: [PATCH 17/55] FROMGIT(6.16): arm64: dts: amlogic: gxbb: enable UART
  RX and TX pull up by default
 
 Some boards have noise on the UART RX line when the UART pins are not
@@ -17,7 +17,7 @@ Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
  1 file changed, 5 insertions(+), 5 deletions(-)
 
 diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
-index ed00e67e6923..e45f629bd71a 100644
+index 6c134592c7bb..f69923da07fe 100644
 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
 +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
 @@ -105,7 +105,7 @@ uart_ao_a_pins: uart_ao_a {

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0018-FROMGIT-6.16-arm64-dts-amlogic-gxl-enable-UART-RX-an.patch

@@ -1,7 +1,7 @@
-From f0e1b70a0267605a1dd9f22c9ff7cf59bb837d67 Mon Sep 17 00:00:00 2001
+From dcec0de116607bba150c5d0721f0d711d9cba2f6 Mon Sep 17 00:00:00 2001
 From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
 Date: Sat, 29 Mar 2025 19:58:52 +0100
-Subject: [PATCH 12/51] FROMGIT(6.16): arm64: dts: amlogic: gxl: enable UART RX
+Subject: [PATCH 18/55] FROMGIT(6.16): arm64: dts: amlogic: gxl: enable UART RX
  and TX pull up by default
 
 Some boards have noise on the UART RX line when the UART pins are not
@@ -17,7 +17,7 @@ Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
  1 file changed, 6 insertions(+), 6 deletions(-)
 
 diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
-index f58d1790de1c..d4497dc7d76b 100644
+index 19b8a39de6a0..bc52b9e954b4 100644
 --- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
 +++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
 @@ -163,7 +163,7 @@ uart_ao_a_pins: uart_ao_a {

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0018-FROMLIST-v2-net-mdio-mux-meson-gxl-set-28th-bit-in-e.patch

@@ -1,44 +0,0 @@
-From 2bb51b4f2f12406ee3145127c77523c2602b7ba1 Mon Sep 17 00:00:00 2001
-From: Da Xue <da@libre.computer>
-Date: Fri, 24 May 2024 15:17:37 +0000
-Subject: [PATCH 18/51] FROMLIST(v2): net: mdio: mux-meson-gxl: set 28th bit in
- eth_reg2
-
-This bit is necessary to enable packets on the interface. Without this
-bit set, ethernet behaves as if it is working, but no activity occurs.
-
-The vendor SDK sets this bit along with the PHY_ID bits. U-boot also
-sets this bit, but if u-boot is not compiled with networking support
-the interface will not work.
-
-Fixes: 9a24e1ff4326 ("net: mdio: add amlogic gxl mdio mux support");
-Signed-off-by: Da Xue <da@libre.computer>
-Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
----
- drivers/net/mdio/mdio-mux-meson-gxl.c | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/net/mdio/mdio-mux-meson-gxl.c b/drivers/net/mdio/mdio-mux-meson-gxl.c
-index 00c66240136b..fc5883387718 100644
---- a/drivers/net/mdio/mdio-mux-meson-gxl.c
-+++ b/drivers/net/mdio/mdio-mux-meson-gxl.c
-@@ -17,6 +17,7 @@
- #define  REG2_LEDACT		GENMASK(23, 22)
- #define  REG2_LEDLINK		GENMASK(25, 24)
- #define  REG2_DIV4SEL		BIT(27)
-+#define  REG2_RESERVED_28	BIT(28)
- #define  REG2_ADCBYPASS		BIT(30)
- #define  REG2_CLKINSEL		BIT(31)
- #define ETH_REG3		0x4
-@@ -65,7 +66,7 @@ static void gxl_enable_internal_mdio(struct gxl_mdio_mux *priv)
- 	 * The only constraint is that it must match the one in
- 	 * drivers/net/phy/meson-gxl.c to properly match the PHY.
- 	 */
--	writel(FIELD_PREP(REG2_PHYID, EPHY_GXL_ID),
-+	writel(REG2_RESERVED_28 | FIELD_PREP(REG2_PHYID, EPHY_GXL_ID),
- 	       priv->regs + ETH_REG2);
- 
- 	/* Enable the internal phy */
--- 
-2.34.1
-