Rockchip: linux: rkvdec: implement HW reset, fix HEVC decoding

projects/Rockchip/patches/linux/default/linux-1003-for-libreelec.patch

@@ -149,30 +149,6 @@ index b54ff9055e5f..2fae7fa6b000 100644
  
  	h265e_mmu: iommu@ff330200 {
 
-From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
-From: Alex Bee <knaerzche@gmail.com>
-Date: Wed, 2 Sep 2020 21:22:31 +0200
-Subject: [PATCH] arm64: dts: rockchip: add rockchip,disable-mmu-reset for vdec
- iommu
-
-Signed-off-by: Alex Bee <knaerzche@gmail.com>
----
- arch/arm64/boot/dts/rockchip/rk3328.dtsi | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
-index 2fae7fa6b000..3d933d74c2b3 100644
---- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
-+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
-@@ -731,6 +731,7 @@ rkvdec_mmu: iommu@ff360480 {
- 		clock-names = "aclk", "iface";
- 		#iommu-cells = <0>;
- 		power-domains = <&power RK3328_PD_VIDEO>;
-+		rockchip,disable-mmu-reset;
- 	};
- 
- 	vop: vop@ff370000 {
-
 From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
 From: Alex Bee <knaerzche@gmail.com>
 Date: Mon, 10 Feb 2020 19:22:41 +0100
@@ -258,30 +234,6 @@ index 713f55e143c6..2420d8e1c66f 100644
  	status = "okay";
  
 
-From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
-From: Alex Bee <knaerzche@gmail.com>
-Date: Fri, 1 Jan 2021 12:11:12 +0200
-Subject: [PATCH] arm64: dts: rockchip: fix RK3399 vdec register witdh
-
-Signed-off-by: Alex Bee <knaerzche@gmail.com>
----
- arch/arm64/boot/dts/rockchip/rk3399.dtsi | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
-index 418d16b0b648..4d5004c9c778 100644
---- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
-+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
-@@ -1276,7 +1276,7 @@ vpu_mmu: iommu@ff650800 {
- 
- 	vdec: video-codec@ff660000 {
- 		compatible = "rockchip,rk3399-vdec";
--		reg = <0x0 0xff660000 0x0 0x400>;
-+		reg = <0x0 0xff660000 0x0 0x480>;
- 		interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH 0>;
- 		interrupt-names = "vdpu";
- 		clocks = <&cru ACLK_VDU>, <&cru HCLK_VDU>,
-
 From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
 From: Alex Bee <knaerzche@gmail.com>
 Date: Wed, 10 Feb 2021 18:44:56 +0200