Allwinner: Update HDMI audio patches

projects/Allwinner/devices/H6/patches/linux/05-sound-hack.patch

@@ -6,7 +6,6 @@ Subject: [PATCH] AW H6 I2S WIP
 Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
 ---
  arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 31 ++++++++++++++++++++
- sound/soc/sunxi/sun4i-i2s.c                  | 12 ++++----
  3 files changed, 41 insertions(+), 10 deletions(-)
 
 diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
@@ -43,7 +42,7 @@ index 62a0eae77639..f1c53aec6523 100644
  
 +		i2s1: i2s@5091000 {
 +			#sound-dai-cells = <0>;
-+			compatible = "allwinner,sun8i-h3-i2s";
++			compatible = "allwinner,sun50i-h6-i2s";
 +			reg = <0x05091000 0x1000>;
 +			interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 +			clocks = <&ccu CLK_BUS_I2S1>, <&ccu CLK_I2S1>;
@@ -65,37 +64,5 @@ index 62a0eae77639..f1c53aec6523 100644
  			compatible = "allwinner,sun50i-h6-dw-hdmi";
  			reg = <0x06000000 0x10000>;
  			reg-io-width = <1>;
-diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c
-index d5ec1a20499d..f286b8bfcfb3 100644
---- a/sound/soc/sunxi/sun4i-i2s.c
-+++ b/sound/soc/sunxi/sun4i-i2s.c
-@@ -108,12 +108,12 @@
- #define SUN8I_I2S_CHAN_CFG_TX_SLOT_NUM_MASK	GENMASK(2, 0)
- #define SUN8I_I2S_CHAN_CFG_TX_SLOT_NUM(chan)	(chan - 1)
- 
--#define SUN8I_I2S_TX_CHAN_MAP_REG	0x44
-+#define SUN8I_I2S_TX_CHAN_MAP_REG	0x48
- #define SUN8I_I2S_TX_CHAN_SEL_REG	0x34
--#define SUN8I_I2S_TX_CHAN_OFFSET_MASK		GENMASK(13, 12)
--#define SUN8I_I2S_TX_CHAN_OFFSET(offset)	(offset << 12)
--#define SUN8I_I2S_TX_CHAN_EN_MASK		GENMASK(11, 4)
--#define SUN8I_I2S_TX_CHAN_EN(num_chan)		(((1 << num_chan) - 1) << 4)
-+#define SUN8I_I2S_TX_CHAN_OFFSET_MASK		GENMASK(21, 20)
-+#define SUN8I_I2S_TX_CHAN_OFFSET(offset)	(offset << 20)
-+#define SUN8I_I2S_TX_CHAN_EN_MASK		GENMASK(15, 0)
-+#define SUN8I_I2S_TX_CHAN_EN(num_chan)		(((1 << num_chan) - 1) << 0)
- 
- #define SUN8I_I2S_RX_CHAN_SEL_REG	0x54
- #define SUN8I_I2S_RX_CHAN_MAP_REG	0x58
-@@ -946,7 +946,7 @@ static const struct sun4i_i2s_quirks sun8i_h3_i2s_quirks = {
- 	.field_fmt_mode		= REG_FIELD(SUN4I_I2S_CTRL_REG, 4, 5),
- 	.field_txchanmap	= REG_FIELD(SUN8I_I2S_TX_CHAN_MAP_REG, 0, 31),
- 	.field_rxchanmap	= REG_FIELD(SUN8I_I2S_RX_CHAN_MAP_REG, 0, 31),
--	.field_txchansel	= REG_FIELD(SUN8I_I2S_TX_CHAN_SEL_REG, 0, 2),
-+	.field_txchansel	= REG_FIELD(SUN8I_I2S_TX_CHAN_SEL_REG, 16, 19),
- 	.field_rxchansel	= REG_FIELD(SUN8I_I2S_RX_CHAN_SEL_REG, 0, 2),
- };
- 
 -- 
 2.21.0
-

projects/Allwinner/devices/H6/patches/linux/16-clk-sunxi-ng-h6-Use-sigma-delta-modulation-for-audio.patch

@@ -0,0 +1,77 @@
+From ab099efa81230670679a0aa8ad6aa9cb2ac748b4 Mon Sep 17 00:00:00 2001
+From: Jernej Skrabec <jernej.skrabec@siol.net>
+Date: Sat, 14 Sep 2019 15:33:14 +0200
+Subject: [PATCH] clk: sunxi-ng: h6: Use sigma-delta modulation for audio PLL
+
+Audio devices needs exact clock rates in order to correctly reproduce
+the sound. Until now, only integer factors were used to configure H6
+audio PLL which resulted in inexact rates. Fix that by adding support
+for fractional factors using sigma-delta modulation look-up table. It
+contains values for two most commonly used audio base frequencies.
+
+Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
+---
+ drivers/clk/sunxi-ng/ccu-sun50i-h6.c | 21 +++++++++++++++------
+ 1 file changed, 15 insertions(+), 6 deletions(-)
+
+diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-h6.c b/drivers/clk/sunxi-ng/ccu-sun50i-h6.c
+index d89353a3cdec..ed6338d74474 100644
+--- a/drivers/clk/sunxi-ng/ccu-sun50i-h6.c
++++ b/drivers/clk/sunxi-ng/ccu-sun50i-h6.c
+@@ -203,12 +203,21 @@ static struct ccu_nkmp pll_hsic_clk = {
+  * hardcode it to match with the clock names.
+  */
+ #define SUN50I_H6_PLL_AUDIO_REG		0x078
++
++static struct ccu_sdm_setting pll_audio_sdm_table[] = {
++	{ .rate = 541900800, .pattern = 0xc001288d, .m = 1, .n = 22 },
++	{ .rate = 589824000, .pattern = 0xc00126e9, .m = 1, .n = 24 },
++};
++
+ static struct ccu_nm pll_audio_base_clk = {
+ 	.enable		= BIT(31),
+ 	.lock		= BIT(28),
+ 	.n		= _SUNXI_CCU_MULT_MIN(8, 8, 12),
+ 	.m		= _SUNXI_CCU_DIV(1, 1), /* input divider */
++	.sdm		= _SUNXI_CCU_SDM(pll_audio_sdm_table,
++					 BIT(24), 0x178, BIT(31)),
+ 	.common		= {
++		.features	= CCU_FEATURE_SIGMA_DELTA_MOD,
+ 		.reg		= 0x078,
+ 		.hw.init	= CLK_HW_INIT("pll-audio-base", "osc24M",
+ 					      &ccu_nm_ops,
+@@ -753,12 +762,12 @@ static const struct clk_hw *clk_parent_pll_audio[] = {
+ };
+ 
+ /*
+- * The divider of pll-audio is fixed to 8 now, as pll-audio-4x has a
+- * fixed post-divider 2.
++ * The divider of pll-audio is fixed to 24 for now, so 24576000 and 22579200
++ * rates can be set exactly in conjunction with sigma-delta modulation.
+  */
+ static CLK_FIXED_FACTOR_HWS(pll_audio_clk, "pll-audio",
+ 			    clk_parent_pll_audio,
+-			    8, 1, CLK_SET_RATE_PARENT);
++			    24, 1, CLK_SET_RATE_PARENT);
+ static CLK_FIXED_FACTOR_HWS(pll_audio_2x_clk, "pll-audio-2x",
+ 			    clk_parent_pll_audio,
+ 			    4, 1, CLK_SET_RATE_PARENT);
+@@ -1215,12 +1224,12 @@ static int sun50i_h6_ccu_probe(struct platform_device *pdev)
+ 	}
+ 
+ 	/*
+-	 * Force the post-divider of pll-audio to 8 and the output divider
+-	 * of it to 1, to make the clock name represents the real frequency.
++	 * Force the post-divider of pll-audio to 12 and the output divider
++	 * of it to 2, so 24576000 and 22579200 rates can be set exactly.
+ 	 */
+ 	val = readl(reg + SUN50I_H6_PLL_AUDIO_REG);
+ 	val &= ~(GENMASK(21, 16) | BIT(0));
+-	writel(val | (7 << 16), reg + SUN50I_H6_PLL_AUDIO_REG);
++	writel(val | (11 << 16) | BIT(0), reg + SUN50I_H6_PLL_AUDIO_REG);
+ 
+ 	/*
+ 	 * First clock parent (osc32K) is unusable for CEC. But since there
+-- 
+2.23.0
+

projects/Allwinner/patches/linux/0002-backport-from-5.5.patch

@@ -0,0 +1,157 @@
+From c41784b042ac9cf97f2e871aceef3e06eff14140 Mon Sep 17 00:00:00 2001
+From: Cheng-Yi Chiang <cychiang@chromium.org>
+Date: Mon, 2 Sep 2019 11:54:35 +0800
+Subject: [PATCH] drm: dw-hdmi-i2s: enable audio clock in audio_startup
+
+In the designware databook, the sequence of enabling audio clock and
+setting format is not clearly specified.
+Currently, audio clock is enabled in the end of hw_param ops after
+setting format.
+
+On some monitors, there is a possibility that audio does not come out.
+Fix this by enabling audio clock in audio_startup ops
+before hw_param ops setting format.
+
+Signed-off-by: Cheng-Yi Chiang <cychiang@chromium.org>
+Reviewed-by: Douglas Anderson <dianders@chromium.org>
+Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
+Tested-by: Douglas Anderson <dianders@chromium.org>
+Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/20190902035435.44463-1-cychiang@chromium.org
+---
+ drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c | 9 +++++++++
+ 1 file changed, 9 insertions(+)
+
+diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c
+index 1d15cf9b6821..34d8e837555f 100644
+--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c
++++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c
+@@ -109,6 +109,14 @@ static int dw_hdmi_i2s_hw_params(struct device *dev, void *data,
+ 	hdmi_write(audio, conf0, HDMI_AUD_CONF0);
+ 	hdmi_write(audio, conf1, HDMI_AUD_CONF1);
+ 
++	return 0;
++}
++
++static int dw_hdmi_i2s_audio_startup(struct device *dev, void *data)
++{
++	struct dw_hdmi_i2s_audio_data *audio = data;
++	struct dw_hdmi *hdmi = audio->hdmi;
++
+ 	dw_hdmi_audio_enable(hdmi);
+ 
+ 	return 0;
+@@ -153,6 +161,7 @@ static int dw_hdmi_i2s_get_dai_id(struct snd_soc_component *component,
+ 
+ static struct hdmi_codec_ops dw_hdmi_i2s_ops = {
+ 	.hw_params	= dw_hdmi_i2s_hw_params,
++	.audio_startup  = dw_hdmi_i2s_audio_startup,
+ 	.audio_shutdown	= dw_hdmi_i2s_audio_shutdown,
+ 	.get_eld	= dw_hdmi_i2s_get_eld,
+ 	.get_dai_id	= dw_hdmi_i2s_get_dai_id,
+-- 
+2.23.0
+
+From 3250cdf938dce5447cf4f895bb3ec3b929a95e09 Mon Sep 17 00:00:00 2001
+From: Yakir Yang <ykk@rock-chips.com>
+Date: Wed, 11 Sep 2019 16:26:46 +0800
+Subject: [PATCH] drm: bridge/dw_hdmi: add audio sample channel status setting
+
+When transmitting IEC60985 linear PCM audio, we configure the
+Aduio Sample Channel Status information in the IEC60958 frame.
+The status bit is already available in iec.status of hdmi_codec_params.
+
+This fix the issue that audio does not come out on some monitors
+(e.g. LG 22CV241)
+
+Note that these registers are only for interfaces:
+I2S audio interface, General Purpose Audio (GPA), or AHB audio DMA
+(AHBAUDDMA).
+For S/PDIF interface this information comes from the stream.
+
+Currently this function dw_hdmi_set_channel_status is only called
+from dw-hdmi-i2s-audio in I2S setup.
+
+Signed-off-by: Yakir Yang <ykk@rock-chips.com>
+Signed-off-by: Cheng-Yi Chiang <cychiang@chromium.org>
+Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
+Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/20190911082646.134347-1-cychiang@chromium.org
+---
+ .../drm/bridge/synopsys/dw-hdmi-i2s-audio.c   |  1 +
+ drivers/gpu/drm/bridge/synopsys/dw-hdmi.c     | 20 +++++++++++++++++++
+ drivers/gpu/drm/bridge/synopsys/dw-hdmi.h     |  2 ++
+ include/drm/bridge/dw_hdmi.h                  |  1 +
+ 4 files changed, 24 insertions(+)
+
+diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c
+index 34d8e837555f..20f4f92dd866 100644
+--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c
++++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c
+@@ -102,6 +102,7 @@ static int dw_hdmi_i2s_hw_params(struct device *dev, void *data,
+ 	}
+ 
+ 	dw_hdmi_set_sample_rate(hdmi, hparms->sample_rate);
++	dw_hdmi_set_channel_status(hdmi, hparms->iec.status);
+ 	dw_hdmi_set_channel_count(hdmi, hparms->channels);
+ 	dw_hdmi_set_channel_allocation(hdmi, hparms->cea.channel_allocation);
+ 
+diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
+index bd65d0479683..aa7efd4da1c8 100644
+--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
++++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
+@@ -582,6 +582,26 @@ static unsigned int hdmi_compute_n(unsigned int freq, unsigned long pixel_clk)
+ 	return n;
+ }
+ 
++/*
++ * When transmitting IEC60958 linear PCM audio, these registers allow to
++ * configure the channel status information of all the channel status
++ * bits in the IEC60958 frame. For the moment this configuration is only
++ * used when the I2S audio interface, General Purpose Audio (GPA),
++ * or AHB audio DMA (AHBAUDDMA) interface is active
++ * (for S/PDIF interface this information comes from the stream).
++ */
++void dw_hdmi_set_channel_status(struct dw_hdmi *hdmi,
++				u8 *channel_status)
++{
++	/*
++	 * Set channel status register for frequency and word length.
++	 * Use default values for other registers.
++	 */
++	hdmi_writeb(hdmi, channel_status[3], HDMI_FC_AUDSCHNLS7);
++	hdmi_writeb(hdmi, channel_status[4], HDMI_FC_AUDSCHNLS8);
++}
++EXPORT_SYMBOL_GPL(dw_hdmi_set_channel_status);
++
+ static void hdmi_set_clk_regenerator(struct dw_hdmi *hdmi,
+ 	unsigned long pixel_clk, unsigned int sample_rate)
+ {
+diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.h b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.h
+index 6988f12d89d9..fcff5059db24 100644
+--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.h
++++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.h
+@@ -158,6 +158,8 @@
+ #define HDMI_FC_SPDDEVICEINF                    0x1062
+ #define HDMI_FC_AUDSCONF                        0x1063
+ #define HDMI_FC_AUDSSTAT                        0x1064
++#define HDMI_FC_AUDSCHNLS7                      0x106e
++#define HDMI_FC_AUDSCHNLS8                      0x106f
+ #define HDMI_FC_DATACH0FILL                     0x1070
+ #define HDMI_FC_DATACH1FILL                     0x1071
+ #define HDMI_FC_DATACH2FILL                     0x1072
+diff --git a/include/drm/bridge/dw_hdmi.h b/include/drm/bridge/dw_hdmi.h
+index cf528c289857..4b3e863c4f8a 100644
+--- a/include/drm/bridge/dw_hdmi.h
++++ b/include/drm/bridge/dw_hdmi.h
+@@ -156,6 +156,7 @@ void dw_hdmi_setup_rx_sense(struct dw_hdmi *hdmi, bool hpd, bool rx_sense);
+ 
+ void dw_hdmi_set_sample_rate(struct dw_hdmi *hdmi, unsigned int rate);
+ void dw_hdmi_set_channel_count(struct dw_hdmi *hdmi, unsigned int cnt);
++void dw_hdmi_set_channel_status(struct dw_hdmi *hdmi, u8 *channel_status);
+ void dw_hdmi_set_channel_allocation(struct dw_hdmi *hdmi, unsigned int ca);
+ void dw_hdmi_audio_enable(struct dw_hdmi *hdmi);
+ void dw_hdmi_audio_disable(struct dw_hdmi *hdmi);
+-- 
+2.23.0
+