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sm8650/linux: udpdate cooling maps

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Philippe Simons
2025-11-24 23:18:05 +01:00
parent 11988cbba9
commit 6802c1047a
2 changed files with 310 additions and 243 deletions
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436
projects/ROCKNIX/devices/SM8650/patches/linux/0001-add-ayaneo-pocket-s2-dts.patch
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117
projects/ROCKNIX/devices/SM8650/patches/linux/20250729_neil_armstrong_arm64_dts_qcom_sm8650_add_acd_levels_for_gpu.patch Normal file
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@@ -0,0 +1,117 @@
From git@z Thu Jan 1 00:00:00 1970
Subject: [PATCH] arm64: dts: qcom: sm8650: Add ACD levels for GPU
From: Neil Armstrong <neil.armstrong@linaro.org>
Date: Tue, 29 Jul 2025 16:40:53 +0200
Message-Id: <20250729-topic-sm8650-upstream-gpu-acd-level-v1-1-258090038a41@linaro.org>
MIME-Version: 1.0
Content-Type: text/plain; charset="utf-8"
Content-Transfer-Encoding: 7bit
Update GPU node to include acd level values.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Akhil P Oommen <akhilpo@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/sm8650.dtsi | 14 +++++++++++++-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi
index 495ea9bfd008500dd2c9f46ceca94cf5f972beca..4cd933219ce008bd1c603c87778e210b6332e29c 100644
--- a/arch/arm64/boot/dts/qcom/sm8650.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi
@@ -4127,72 +4127,84 @@ zap-shader {
/* Speedbin needs more work on A740+, keep only lower freqs */
gpu_opp_table: opp-table {
- compatible = "operating-points-v2";
+ compatible = "operating-points-v2-adreno",
+ "operating-points-v2";
opp-231000000 {
opp-hz = /bits/ 64 <231000000>;
opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS_D2>;
opp-peak-kBps = <2136718>;
+ qcom,opp-acd-level = <0xc82f5ffd>;
};
opp-310000000 {
opp-hz = /bits/ 64 <310000000>;
opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS_D1>;
opp-peak-kBps = <2136718>;
+ qcom,opp-acd-level = <0xc82c5ffd>;
};
opp-366000000 {
opp-hz = /bits/ 64 <366000000>;
opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS_D0>;
opp-peak-kBps = <6074218>;
+ qcom,opp-acd-level = <0xc02e5ffd>;
};
opp-422000000 {
opp-hz = /bits/ 64 <422000000>;
opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
opp-peak-kBps = <8171875>;
+ qcom,opp-acd-level = <0xc02d5ffd>;
};
opp-500000000 {
opp-hz = /bits/ 64 <500000000>;
opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS_L1>;
opp-peak-kBps = <8171875>;
+ qcom,opp-acd-level = <0xc02a5ffd>;
};
opp-578000000 {
opp-hz = /bits/ 64 <578000000>;
opp-level = <RPMH_REGULATOR_LEVEL_SVS>;
opp-peak-kBps = <8171875>;
+ qcom,opp-acd-level = <0x882c5ffd>;
};
opp-629000000 {
opp-hz = /bits/ 64 <629000000>;
opp-level = <RPMH_REGULATOR_LEVEL_SVS_L0>;
opp-peak-kBps = <10687500>;
+ qcom,opp-acd-level = <0x882a5ffd>;
};
opp-680000000 {
opp-hz = /bits/ 64 <680000000>;
opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
opp-peak-kBps = <12449218>;
+ qcom,opp-acd-level = <0x882a5ffd>;
};
opp-720000000 {
opp-hz = /bits/ 64 <720000000>;
opp-level = <RPMH_REGULATOR_LEVEL_SVS_L2>;
opp-peak-kBps = <12449218>;
+ qcom,opp-acd-level = <0x882a5ffd>;
};
opp-770000000 {
opp-hz = /bits/ 64 <770000000>;
opp-level = <RPMH_REGULATOR_LEVEL_NOM>;
opp-peak-kBps = <12449218>;
+ qcom,opp-acd-level = <0x882a5ffd>;
};
opp-834000000 {
opp-hz = /bits/ 64 <834000000>;
opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>;
opp-peak-kBps = <14398437>;
+ qcom,opp-acd-level = <0x882a5ffd>;
};
};
};
---
base-commit: 038d61fd642278bab63ee8ef722c50d10ab01e8f
change-id: 20250729-topic-sm8650-upstream-gpu-acd-level-1c430e7f158f
Best regards,
--
Neil Armstrong <neil.armstrong@linaro.org>