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Merge pull request #2284 from loki666/sm8550-patches

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sm8550/linux: update patches
This commit is contained in:
Philippe Simons
2026-02-04 22:28:44 +01:00
committed by GitHub
parent 281de1be24 1fb0d2835c
commit 601e14949d
3 changed files with 129 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

25
projects/ROCKNIX/devices/SM8550/patches/linux/0032-rmi4-silence-spam-irq-errors.patch Normal file
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@@ -0,0 +1,25 @@
From 95440d92bc884d831117f634234d7efe5050c7ab Mon Sep 17 00:00:00 2001
From: Philippe Simons <simons.philippe@gmail.com>
Date: Wed, 4 Feb 2026 22:19:25 +0100
Subject: [PATCH] rmi4: silence spam irq errors
---
drivers/input/rmi4/rmi_driver.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/input/rmi4/rmi_driver.c b/drivers/input/rmi4/rmi_driver.c
index ccd9338a44db..3c964c87d427 100644
--- a/drivers/input/rmi4/rmi_driver.c
+++ b/drivers/input/rmi4/rmi_driver.c
@@ -141,7 +141,7 @@ static int rmi_process_interrupt_requests(struct rmi_device *rmi_dev)
data->f01_container->fd.data_base_addr + 1,
data->irq_status, data->num_of_irq_regs);
if (error < 0) {
- dev_err(dev, "Failed to read irqs, code=%d\n", error);
+ // dev_err(dev, "Failed to read irqs, code=%d\n", error);
return error;
}
}
--
2.52.0

0
projects/ROCKNIX/devices/SM8550/patches/linux/0042_mmc--sdhci-msm--Toggle-the-FIFO-write-clock-after-.patch → projects/ROCKNIX/devices/SM8550/patches/linux/0042_mmc--sdhci-msm--Toggle-the-FIFO-write-clock-after-.patch.disabled
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104
projects/ROCKNIX/devices/SM8550/patches/linux/20251124_vladimir_zapolskiy_clk_qcom_gcc_sm8x50_use_floor_ops_for_sdcc_rcgs.patch Normal file
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@@ -0,0 +1,104 @@
From git@z Thu Jan 1 00:00:00 1970
Subject: [PATCH 1/2] clk: qcom: gcc-sm8550: Use floor ops for SDCC RCGs
From: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Date: Mon, 24 Nov 2025 23:20:11 +0200
Message-Id: <20251124212012.3660189-2-vladimir.zapolskiy@linaro.org>
MIME-Version: 1.0
Content-Type: text/plain; charset="utf-8"
Content-Transfer-Encoding: 7bit
In line with commit a27ac3806b0a ("clk: qcom: gcc-sm8450: Use floor ops
for SDCC RCGs") done to fix issues with overclocked SD cards on SM8450
powered boards set floor clock operations for SDCC RCGs on SM8550.
This change fixes initialization of some SD cards, where the problem
is manifested by the SDHC driver:
mmc0: Card appears overclocked; req 50000000 Hz, actual 100000000 Hz
mmc0: error -110 whilst initialising SD card
Fixes: 955f2ea3b9e9 ("clk: qcom: Add GCC driver for SM8550")
Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Taniya Das <taniya.das@oss.qualcomm.com>
---
drivers/clk/qcom/gcc-sm8550.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/qcom/gcc-sm8550.c b/drivers/clk/qcom/gcc-sm8550.c
index 862a9bf73bcb..36a5b7de5b55 100644
--- a/drivers/clk/qcom/gcc-sm8550.c
+++ b/drivers/clk/qcom/gcc-sm8550.c
@@ -1025,7 +1025,7 @@ static struct clk_rcg2 gcc_sdcc2_apps_clk_src = {
.parent_data = gcc_parent_data_9,
.num_parents = ARRAY_SIZE(gcc_parent_data_9),
.flags = CLK_SET_RATE_PARENT,
- .ops = &clk_rcg2_shared_ops,
+ .ops = &clk_rcg2_shared_floor_ops,
},
};
@@ -1048,7 +1048,7 @@ static struct clk_rcg2 gcc_sdcc4_apps_clk_src = {
.parent_data = gcc_parent_data_0,
.num_parents = ARRAY_SIZE(gcc_parent_data_0),
.flags = CLK_SET_RATE_PARENT,
- .ops = &clk_rcg2_shared_ops,
+ .ops = &clk_rcg2_shared_floor_ops,
},
};
--
2.49.0
From git@z Thu Jan 1 00:00:00 1970
Subject: [PATCH 2/2] clk: qcom: gcc-sm8650: Use floor ops for SDCC RCGs
From: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Date: Mon, 24 Nov 2025 23:20:12 +0200
Message-Id: <20251124212012.3660189-3-vladimir.zapolskiy@linaro.org>
MIME-Version: 1.0
Content-Type: text/plain; charset="utf-8"
Content-Transfer-Encoding: 7bit
In line with commit a27ac3806b0a ("clk: qcom: gcc-sm8450: Use floor ops
for SDCC RCGs") done to fix issues with overclocked SD cards on SM8450
powered boards set floor clock operations for SDCC RCGs on SM8650.
This change fixes initialization of some SD cards, where the problem
is manifested by the SDHC driver:
mmc0: Card appears overclocked; req 50000000 Hz, actual 100000000 Hz
mmc0: error -110 whilst initialising SD card
Fixes: c58225b7e3d7 ("clk: qcom: add the SM8650 Global Clock Controller driver, part 1")
Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Taniya Das <taniya.das@oss.qualcomm.com>
---
drivers/clk/qcom/gcc-sm8650.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/qcom/gcc-sm8650.c b/drivers/clk/qcom/gcc-sm8650.c
index 24f98062b9dd..2dd6444ce036 100644
--- a/drivers/clk/qcom/gcc-sm8650.c
+++ b/drivers/clk/qcom/gcc-sm8650.c
@@ -1257,7 +1257,7 @@ static struct clk_rcg2 gcc_sdcc2_apps_clk_src = {
.parent_data = gcc_parent_data_11,
.num_parents = ARRAY_SIZE(gcc_parent_data_11),
.flags = CLK_SET_RATE_PARENT,
- .ops = &clk_rcg2_shared_ops,
+ .ops = &clk_rcg2_shared_floor_ops,
},
};
@@ -1279,7 +1279,7 @@ static struct clk_rcg2 gcc_sdcc4_apps_clk_src = {
.parent_data = gcc_parent_data_0,
.num_parents = ARRAY_SIZE(gcc_parent_data_0),
.flags = CLK_SET_RATE_PARENT,
- .ops = &clk_rcg2_shared_ops,
+ .ops = &clk_rcg2_shared_floor_ops,
},
};
--
2.49.0