Merge pull request #8231 from HiassofT/le12-rpi5-mesa1

RPi5: sync mesa patches with RPiOS 23.2.1-0+rpt2 version
This commit is contained in:
Rudi Heitbaum
2023-10-21 11:42:43 +11:00
committed by GitHub
142 changed files with 386 additions and 139 deletions

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From f62aa2640f92796ff5216da0a5d3c8f46a2855b4 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Alejandro=20Pi=C3=B1eiro?= <apinheiro@igalia.com>
Date: Mon, 26 Apr 2021 00:02:21 +0200
Subject: [PATCH 001/139] broadcom(cle,clif,common,simulator): add 7.1 version
Subject: [PATCH 001/142] broadcom(cle,clif,common,simulator): add 7.1 version
on the list of versions to build
This adds 7.1 to the list of available V3D_VERSION, and first changes

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@@ -1,7 +1,7 @@
From 9e85edd1b347b0e779b393f463f42044a720bcff Mon Sep 17 00:00:00 2001
From: Iago Toral Quiroga <itoral@igalia.com>
Date: Tue, 28 Sep 2021 13:16:49 +0200
Subject: [PATCH 002/139] broadcom/simulator: reset CFG7 for compute dispatch
Subject: [PATCH 002/142] broadcom/simulator: reset CFG7 for compute dispatch
in v71
This register is new in 7.x, it doesn't seem that we need to

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@@ -1,7 +1,7 @@
From 6f744bc4bec98f9769486d427e8e2d4e314ae056 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Alejandro=20Pi=C3=B1eiro?= <apinheiro@igalia.com>
Date: Tue, 29 Jun 2021 12:03:24 +0200
Subject: [PATCH 003/139] broadcom/cle: update the packet definitions for new
Subject: [PATCH 003/142] broadcom/cle: update the packet definitions for new
generation v71
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8

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From 569cbe4229df737ce5915c4be2cad534707fb4f7 Mon Sep 17 00:00:00 2001
From: Iago Toral Quiroga <itoral@igalia.com>
Date: Tue, 9 Nov 2021 08:50:51 +0100
Subject: [PATCH 004/139] broadcom/common: retrieve V3D revision number
Subject: [PATCH 004/142] broadcom/common: retrieve V3D revision number
The subrev field from the hub ident3 register is bumped with every
hardware revision doing backwards incompatible changes so we want to

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@@ -1,7 +1,7 @@
From c260843c882d25bd31e308566b45d4517fda0fa2 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Alejandro=20Pi=C3=B1eiro?= <apinheiro@igalia.com>
Date: Wed, 17 Nov 2021 14:40:47 +0100
Subject: [PATCH 005/139] broadcom/common: add some common v71 helpers
Subject: [PATCH 005/142] broadcom/common: add some common v71 helpers
---
src/broadcom/common/v3d_util.c | 27 +++++++++++++++++++++++++++

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@@ -1,7 +1,7 @@
From a5211a4d71acc53183d2a90eb1694d8cce6eb44f Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Alejandro=20Pi=C3=B1eiro?= <apinheiro@igalia.com>
Date: Thu, 5 Aug 2021 01:03:11 +0200
Subject: [PATCH 006/139] broadcom/qpu: add comments on waddr not used on V3D
Subject: [PATCH 006/142] broadcom/qpu: add comments on waddr not used on V3D
7.x
---

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@@ -1,7 +1,7 @@
From 0ccf3043e4a584e5592bb7fad737d5d98ed23db0 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Alejandro=20Pi=C3=B1eiro?= <apinheiro@igalia.com>
Date: Thu, 5 Aug 2021 01:00:47 +0200
Subject: [PATCH 007/139] broadcom/qpu: set V3D 7.x names for some waddr
Subject: [PATCH 007/142] broadcom/qpu: set V3D 7.x names for some waddr
aliasing
V3D 7.x got rid of the accumulator, but still uses the values for

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@@ -1,7 +1,7 @@
From 18de3cc85cf8bbe294e044f7a12abe14e554de0a Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Alejandro=20Pi=C3=B1eiro?= <apinheiro@igalia.com>
Date: Sun, 19 Sep 2021 03:20:18 +0200
Subject: [PATCH 008/139] broadcom/compiler: rename small_imm to small_imm_b
Subject: [PATCH 008/142] broadcom/compiler: rename small_imm to small_imm_b
Current small_imm is associated with the "B" read address.

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@@ -1,7 +1,7 @@
From 0e87405fe73694c173b7ce14c3d60611f241922c Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Alejandro=20Pi=C3=B1eiro?= <apinheiro@igalia.com>
Date: Thu, 5 Aug 2021 00:50:12 +0200
Subject: [PATCH 009/139] broadcom/compiler: add small_imm a/c/d on v3d_qpu_sig
Subject: [PATCH 009/142] broadcom/compiler: add small_imm a/c/d on v3d_qpu_sig
small_imm_a, small_imm_c and small_imm_d added on top of the already
existing small_imm_b, as V3D 7.1 defines 4 small immediates, tied to

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@@ -1,7 +1,7 @@
From eca19c911d9af3b0ab3b563ea65dc455e3d27987 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Alejandro=20Pi=C3=B1eiro?= <apinheiro@igalia.com>
Date: Wed, 4 Aug 2021 01:11:16 +0200
Subject: [PATCH 010/139] broadcom/qpu: add v71 signal map
Subject: [PATCH 010/142] broadcom/qpu: add v71 signal map
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

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@@ -1,7 +1,7 @@
From d10e67a396d713ec81fb133f3516e09fe1e067b6 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Alejandro=20Pi=C3=B1eiro?= <apinheiro@igalia.com>
Date: Fri, 6 Aug 2021 01:22:31 +0200
Subject: [PATCH 011/139] broadcom/qpu: define v3d_qpu_input, use on
Subject: [PATCH 011/142] broadcom/qpu: define v3d_qpu_input, use on
v3d_qpu_alu_instr
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8

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@@ -1,7 +1,7 @@
From 52ea09792ff8a438ccdecac47b8415657be90098 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Alejandro=20Pi=C3=B1eiro?= <apinheiro@igalia.com>
Date: Fri, 6 Aug 2021 01:33:32 +0200
Subject: [PATCH 012/139] broadcom/qpu: add raddr on v3d_qpu_input
Subject: [PATCH 012/142] broadcom/qpu: add raddr on v3d_qpu_input
On V3D 7.x mux are not used, and raddr_a/b/c/d are used instead

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@@ -1,7 +1,7 @@
From 3e5ad0881c2789619cdf65f40a44d5481e28e800 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Alejandro=20Pi=C3=B1eiro?= <apinheiro@igalia.com>
Date: Thu, 12 Aug 2021 02:24:02 +0200
Subject: [PATCH 013/139] broadcom/qpu: defining shift/mask for raddr_c/d
Subject: [PATCH 013/142] broadcom/qpu: defining shift/mask for raddr_c/d
On V3D 7.x it replaces mul_a/b and add_a/b
---

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@@ -1,7 +1,7 @@
From 81febf14fe05ad26e992275b911e8bc1e1416ebc Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Alejandro=20Pi=C3=B1eiro?= <apinheiro@igalia.com>
Date: Fri, 17 Sep 2021 01:04:31 +0200
Subject: [PATCH 014/139] broadcom/commmon: add has_accumulators field on
Subject: [PATCH 014/142] broadcom/commmon: add has_accumulators field on
v3d_device_info
Even if we can just check for the version on the code, checking for

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@@ -1,7 +1,7 @@
From 7d42eca87b6e144697810405308d99d200dca62a Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Alejandro=20Pi=C3=B1eiro?= <apinheiro@igalia.com>
Date: Wed, 15 Sep 2021 10:56:43 +0200
Subject: [PATCH 015/139] broadcom/qpu: add qpu_writes_rf0_implicitly helper
Subject: [PATCH 015/142] broadcom/qpu: add qpu_writes_rf0_implicitly helper
On v71 rf0 replaces r5 as the register that gets updated implicitly
with uniform loads, and gets the C coefficient with ldvary. This

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@@ -1,7 +1,7 @@
From f0859613bd59e14fb21571e7978bb5c5d5e9c6d7 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Alejandro=20Pi=C3=B1eiro?= <apinheiro@igalia.com>
Date: Sat, 7 Aug 2021 02:20:39 +0200
Subject: [PATCH 016/139] broadcom/qpu: add pack/unpack support for v71
Subject: [PATCH 016/142] broadcom/qpu: add pack/unpack support for v71
Note that we provide new v71 alu pack/unpack methods. As there are a
lot that it is equivalent, initially we tried to use existing methods

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@@ -1,7 +1,7 @@
From ebba9019461083687f6afd23ff0d4646c1a667cb Mon Sep 17 00:00:00 2001
From: Iago Toral Quiroga <itoral@igalia.com>
Date: Sun, 29 Jan 2023 00:27:11 +0100
Subject: [PATCH 017/139] broadcom/compiler: update node/temp translation for
Subject: [PATCH 017/142] broadcom/compiler: update node/temp translation for
v71
As the offset applied needs to take into account if we have

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@@ -1,7 +1,7 @@
From 9b2dfe0286212aba3687a06023cc5b4ce9944ee0 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Alejandro=20Pi=C3=B1eiro?= <apinheiro@igalia.com>
Date: Mon, 23 Aug 2021 02:18:43 +0200
Subject: [PATCH 018/139] broadcom/compiler: phys index depends on hw version
Subject: [PATCH 018/142] broadcom/compiler: phys index depends on hw version
For 7.1 there are not accumulators. So we replace the macro with a
function call.

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@@ -1,7 +1,7 @@
From da0a3deadf86a46c8323267d3f6a49e442835608 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Alejandro=20Pi=C3=B1eiro?= <apinheiro@igalia.com>
Date: Fri, 17 Sep 2021 01:07:06 +0200
Subject: [PATCH 019/139] broadcom/compiler: don't favor/select accum registers
Subject: [PATCH 019/142] broadcom/compiler: don't favor/select accum registers
for hw not supporting it
Note that what we do is to just return false on the favor/select accum

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@@ -1,7 +1,7 @@
From 6c04d7c917da6b38f8b2b4306ab03ed2ab7e6ce0 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Alejandro=20Pi=C3=B1eiro?= <apinheiro@igalia.com>
Date: Thu, 9 Sep 2021 00:28:53 +0200
Subject: [PATCH 020/139] broadcom/vir: implement is_no_op_mov for v71
Subject: [PATCH 020/142] broadcom/vir: implement is_no_op_mov for v71
Did some refactoring/splitting.
---

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