Merge pull request #7365 from heitbaum/u-boot

u-boot: update to 2023.10
This commit is contained in:
Jernej Škrabec
2023-11-05 07:13:54 +01:00
committed by GitHub
35 changed files with 51 additions and 4423 deletions

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@@ -0,0 +1,16 @@
# SPDX-License-Identifier: GPL-2.0-only
# Copyright (C) 2023-present Team LibreELEC (https://libreelec.tv)
PKG_NAME="pyelftools"
PKG_VERSION="0.29"
PKG_SHA256="591c2b5150f180937c60714a1ae288365b1a3d6ae68aaaa4503dd5ecf5e3c299"
PKG_LICENSE="Unlicense"
PKG_SITE="https://github.com/eliben/pyelftools"
PKG_URL="https://github.com/eliben/pyelftools/archive/refs/tags/v${PKG_VERSION}.tar.gz"
PKG_DEPENDS_HOST="Python3:host setuptools:host"
PKG_LONGDESC="Library for analyzing ELF files and DWARF debugging information"
PKG_TOOLCHAIN="manual"
makeinstall_host() {
exec_thread_safe python3 setup.py install --prefix=${TOOLCHAIN}
}

View File

@@ -3,13 +3,13 @@
# Copyright (C) 2017-present Team LibreELEC (https://libreelec.tv)
PKG_NAME="u-boot"
PKG_VERSION="2022.10"
PKG_SHA256="50b4482a505bc281ba8470c399a3c26e145e29b23500bc35c50debd7fa46bdf8"
PKG_VERSION="2023.10"
PKG_SHA256="e00e6c6f014e046101739d08d06f328811cebcf5ae101348f409cbbd55ce6900"
PKG_ARCH="arm aarch64"
PKG_LICENSE="GPL"
PKG_SITE="https://www.denx.de/wiki/U-Boot"
PKG_URL="https://ftp.denx.de/pub/u-boot/${PKG_NAME}-${PKG_VERSION}.tar.bz2"
PKG_DEPENDS_TARGET="toolchain openssl:host pkg-config:host Python3:host swig:host"
PKG_DEPENDS_TARGET="toolchain openssl:host pkg-config:host Python3:host swig:host pyelftools:host"
PKG_LONGDESC="Das U-Boot is a cross-platform bootloader for embedded systems."
PKG_STAMP="${UBOOT_SYSTEM} ${UBOOT_TARGET}"

View File

@@ -1,29 +0,0 @@
From 7b4ff873927b131df05449df873cdf91958517a8 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel@sholland.org>
Date: Sat, 9 Oct 2021 10:40:45 -0500
Subject: [PATCH 01/13] Kconfig: Remove an impossible condition
ARCH_SUNXI selects BINMAN, so the condition "!BINMAN && ARCH_SUNXI"
is impossible.
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Kconfig b/Kconfig
index 931a22806e4e..ede20d74c948 100644
--- a/Kconfig
+++ b/Kconfig
@@ -359,7 +359,7 @@ config BUILD_TARGET
default "u-boot-spl.kwb" if ARCH_MVEBU && SPL
default "u-boot-elf.srec" if RCAR_GEN3
default "u-boot.itb" if !BINMAN && SPL_LOAD_FIT && (ARCH_ROCKCHIP || \
- ARCH_SUNXI || RISCV || ARCH_ZYNQMP)
+ RISCV || ARCH_ZYNQMP)
default "u-boot.kwb" if ARCH_KIRKWOOD
default "u-boot-with-spl.bin" if ARCH_AT91 && SPL_NAND_SUPPORT
default "u-boot-with-spl.imx" if ARCH_MX6 && SPL
--
2.33.0

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@@ -22,11 +22,14 @@ diff --git a/tools/binman/entry.py b/tools/binman/entry.py
index 70222718ea93..61822eb5e44f 100644
--- a/tools/binman/entry.py
+++ b/tools/binman/entry.py
@@ -404,7 +404,9 @@ class Entry(object):
@@ -404,10 +404,9 @@ class Entry(object):
if self.offset_unset:
self.Raise('No offset set with offset-unset: should another '
'entry provide this correct offset?')
- self.offset = tools.align(offset, self.align)
- elif self.offset_from_elf:
- self.offset = self.lookup_offset()
- else:
- self.offset = tools.align(offset, self.align)
+ elif self.offset > offset:
+ offset = self.offset
+ self.offset = tools.align(offset, self.align)

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@@ -90,8 +90,8 @@ index 4a6ed3a7dd5c..ad1f97632979 100644
- arch = "arm64";
+ arch = ARCH;
compression = "none";
load = <CONFIG_SYS_TEXT_BASE>;
+ entry = <CONFIG_SYS_TEXT_BASE>;
load = <CONFIG_TEXT_BASE>;
+ entry = <CONFIG_TEXT_BASE>;
u-boot-nodtb {
};
@@ -115,7 +115,7 @@ index 4a6ed3a7dd5c..ad1f97632979 100644
#ifdef SCP_ADDR
scp {
@@ -91,19 +101,23 @@
@@ -91,18 +101,23 @@
@config-SEQ {
description = "NAME";
@@ -138,7 +138,6 @@ index 4a6ed3a7dd5c..ad1f97632979 100644
};
#else
u-boot-img {
- offset = <CONFIG_SPL_PAD_TO>;
+ offset = <32768>;
};
#endif

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@@ -12,17 +12,16 @@ definitions:
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
arch/arm/cpu/armv7/Kconfig | 3 +++
arch/arm/cpu/armv8/fwcall.c | 2 +-
arch/arm/include/asm/psci.h | 9 +++++++--
arch/arm/include/asm/psci.h | 1 +
arch/arm/include/asm/system.h | 14 +++++++++-----
arch/arm/lib/psci-dt.c | 2 ++
5 files changed, 22 insertions(+), 8 deletions(-)
4 files changed, 20 insertions(+), 5 deletions(-)
diff --git a/arch/arm/cpu/armv7/Kconfig b/arch/arm/cpu/armv7/Kconfig
index 60bb0a9e1ec4..06b477619334 100644
--- a/arch/arm/cpu/armv7/Kconfig
+++ b/arch/arm/cpu/armv7/Kconfig
@@ -49,6 +49,9 @@ choice
@@ -80,6 +80,9 @@ choice
help
Select the supported PSCI version.
@@ -32,59 +31,23 @@ index 60bb0a9e1ec4..06b477619334 100644
config ARMV7_PSCI_1_0
bool "PSCI V1.0"
diff --git a/arch/arm/cpu/armv8/fwcall.c b/arch/arm/cpu/armv8/fwcall.c
index 16914dc1eed6..87de09979b18 100644
--- a/arch/arm/cpu/armv8/fwcall.c
+++ b/arch/arm/cpu/armv8/fwcall.c
@@ -103,7 +103,7 @@ void __noreturn psci_system_reset2(u32 reset_level, u32 cookie)
{
struct pt_regs regs;
- regs.regs[0] = ARM_PSCI_0_2_FN64_SYSTEM_RESET2;
+ regs.regs[0] = ARM_PSCI_1_1_FN64_SYSTEM_RESET2;
regs.regs[1] = PSCI_RESET2_TYPE_VENDOR | reset_level;
regs.regs[2] = cookie;
if (use_smc_for_psci)
diff --git a/arch/arm/include/asm/psci.h b/arch/arm/include/asm/psci.h
index 67e9234066b0..aa351867eee7 100644
--- a/arch/arm/include/asm/psci.h
+++ b/arch/arm/include/asm/psci.h
@@ -22,8 +22,9 @@
#include <linux/bitops.h>
#endif
-#define ARM_PSCI_VER_1_0 (0x00010000)
#define ARM_PSCI_VER_0_2 (0x00000002)
+#define ARM_PSCI_VER_1_0 (0x00010000)
+#define ARM_PSCI_VER_1_1 (0x00010001)
/* PSCI 0.1 interface */
#define ARM_PSCI_FN_BASE 0x95c1ba5e
@@ -68,7 +69,6 @@
#define ARM_PSCI_0_2_FN64_AFFINITY_INFO ARM_PSCI_0_2_FN64(4)
#define ARM_PSCI_0_2_FN64_MIGRATE ARM_PSCI_0_2_FN64(5)
#define ARM_PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU ARM_PSCI_0_2_FN64(7)
-#define ARM_PSCI_0_2_FN64_SYSTEM_RESET2 ARM_PSCI_0_2_FN64(18)
/* PSCI 1.0 interface */
#define ARM_PSCI_1_0_FN_PSCI_FEATURES ARM_PSCI_0_2_FN(10)
@@ -86,6 +86,11 @@
#define ARM_PSCI_1_0_FN64_STAT_RESIDENCY ARM_PSCI_0_2_FN64(16)
@@ -87,6 +87,7 @@
#define ARM_PSCI_1_0_FN64_STAT_COUNT ARM_PSCI_0_2_FN64(17)
+/* PSCI 1.1 interface */
/* PSCI 1.1 interface */
+#define ARM_PSCI_1_1_FN_SYSTEM_RESET2 ARM_PSCI_0_2_FN(18)
+
+#define ARM_PSCI_1_1_FN64_SYSTEM_RESET2 ARM_PSCI_0_2_FN64(18)
+
#define ARM_PSCI_1_1_FN64_SYSTEM_RESET2 ARM_PSCI_0_2_FN64(18)
/* 1KB stack per core */
#define ARM_PSCI_STACK_SHIFT 10
#define ARM_PSCI_STACK_SIZE (1 << ARM_PSCI_STACK_SHIFT)
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index f75eea16b36c..02effcc6cc38 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -556,17 +556,21 @@ void mmu_page_table_flush(unsigned long start, unsigned long stop);
@@ -557,17 +557,21 @@ void mmu_page_table_flush(unsigned long start, unsigned long stop);
#ifdef CONFIG_ARMV7_PSCI
void psci_arch_cpu_entry(void);
void psci_arch_init(void);

View File

@@ -4,7 +4,7 @@ Date: Fri, 13 Nov 2020 02:09:36 +0000
Subject: [PATCH 01/22] LOCAL: configs: meson64: prevent stdout/stderr on
videoconsole
Several devices have CONFIG_DM_VIDEO enabled which causes stdout/stderr
Several devices have CONFIG_VIDEO enabled which causes stdout/stderr
to appear on videoconsole, so remove videoconsole from STDOUT so that
early u-boot boot remains silent unless using the uart/serial console.
@@ -20,7 +20,7 @@ index 40803ee9da..05b1fcb9fd 100644
@@ -18,7 +18,7 @@
/* For splashscreen */
#ifdef CONFIG_DM_VIDEO
#ifdef CONFIG_VIDEO
-#define STDOUT_CFG "vidconsole,serial"
+#define STDOUT_CFG "serial"
#else

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@@ -1,38 +0,0 @@
From 7d8355053316d3f760a5ac14156e77e27aa5f6d5 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Tue, 25 Oct 2022 14:24:21 +0000
Subject: [PATCH 04/22] BACKPORT: arm64: dts: meson: nanopi-k2: readd PHY reset
properties
The sync of device-tree/bindings in 11a48a5a18c6 ("Linux 5.6-rc2") causes
Ethernet to break on some GXBB boards; the PHY seems to need proper reset
timing to function in u-boot and Linux. Re-add the old PHY reset binding
for dwmac until we support new bindings in the PHY node. This borrows the
same fix applied to the Odroid C2 board [0].
[0] https://lists.denx.de/pipermail/u-boot/2021-April/446658.html
Fixes: dd5f2351e99a ("arm64: dts: meson: sync dt and bindings from v5.6-rc2")
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
arch/arm/dts/meson-gxbb-nanopi-k2-u-boot.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/dts/meson-gxbb-nanopi-k2-u-boot.dtsi b/arch/arm/dts/meson-gxbb-nanopi-k2-u-boot.dtsi
index c35158d7e9..2a245bbe7f 100644
--- a/arch/arm/dts/meson-gxbb-nanopi-k2-u-boot.dtsi
+++ b/arch/arm/dts/meson-gxbb-nanopi-k2-u-boot.dtsi
@@ -5,3 +5,10 @@
*/
#include "meson-gx-u-boot.dtsi"
+
+&ethmac {
+ snps,reset-gpio = <&gpio GPIOZ_14 0>;
+ snps,reset-delays-us = <0 10000 1000000>;
+ snps,reset-active-low;
+};
+
--
2.34.1

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@@ -1,52 +0,0 @@
From 4df4197e1eb7e257d0c4dda60a7ff427fbd47c6f Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Tue, 20 Apr 2021 05:29:19 +0000
Subject: [PATCH 06/22] WIP: ARM: dts: use snps,reset on WeTek devices to fix
Ethernet
The sync of the device tree and dt-bindings from Linux v5.6-rc2
11a48a5a18c6 ("Linux 5.6-rc2") causes Ethernet to break on both
WeTek devices. The PHY seems to need proper reset timing to be
functional in U-Boot and Linux afterwards. Re-add the old PHY
reset bindings for dwmac until we support the new bindings in
the PHY node.
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
arch/arm/dts/meson-gxbb-wetek-hub-u-boot.dtsi | 7 +++++++
arch/arm/dts/meson-gxbb-wetek-play2-u-boot.dtsi | 7 +++++++
2 files changed, 14 insertions(+)
diff --git a/arch/arm/dts/meson-gxbb-wetek-hub-u-boot.dtsi b/arch/arm/dts/meson-gxbb-wetek-hub-u-boot.dtsi
index c35158d7e9..2a245bbe7f 100644
--- a/arch/arm/dts/meson-gxbb-wetek-hub-u-boot.dtsi
+++ b/arch/arm/dts/meson-gxbb-wetek-hub-u-boot.dtsi
@@ -5,3 +5,10 @@
*/
#include "meson-gx-u-boot.dtsi"
+
+&ethmac {
+ snps,reset-gpio = <&gpio GPIOZ_14 0>;
+ snps,reset-delays-us = <0 10000 1000000>;
+ snps,reset-active-low;
+};
+
diff --git a/arch/arm/dts/meson-gxbb-wetek-play2-u-boot.dtsi b/arch/arm/dts/meson-gxbb-wetek-play2-u-boot.dtsi
index c35158d7e9..2a245bbe7f 100644
--- a/arch/arm/dts/meson-gxbb-wetek-play2-u-boot.dtsi
+++ b/arch/arm/dts/meson-gxbb-wetek-play2-u-boot.dtsi
@@ -5,3 +5,10 @@
*/
#include "meson-gx-u-boot.dtsi"
+
+&ethmac {
+ snps,reset-gpio = <&gpio GPIOZ_14 0>;
+ snps,reset-delays-us = <0 10000 1000000>;
+ snps,reset-active-low;
+};
+
--
2.34.1

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@@ -1,91 +0,0 @@
From 8b7dfec310b69a5b7cafacbe11a3ca36b497c78c Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Sat, 27 Feb 2021 06:03:00 +0000
Subject: [PATCH 08/22] WIP: boards: amlogic: add WeTek Hub defconfig
Signed-of-by: Christian Hewitt <christianshewitt@gmail.com>
---
configs/wetek-hub_defconfig | 71 +++++++++++++++++++++++++++++++++++++
1 file changed, 71 insertions(+)
create mode 100644 configs/wetek-hub_defconfig
diff --git a/configs/wetek-hub_defconfig b/configs/wetek-hub_defconfig
new file mode 100644
index 0000000000..9ad263ca2c
--- /dev/null
+++ b/configs/wetek-hub_defconfig
@@ -0,0 +1,71 @@
+CONFIG_ARM=y
+CONFIG_SYS_BOARD="wetek-gxbb"
+CONFIG_ARCH_MESON=y
+CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_SYS_LOAD_ADDR=0x1000000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_ENV_SIZE=0x2000
+CONFIG_DM_GPIO=y
+CONFIG_DEBUG_UART_BASE=0xc81004c0
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_IDENT_STRING=" wetek-hub"
+CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-wetek-hub"
+CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
+CONFIG_OF_BOARD_SETUP=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_MISC_INIT_R=y
+# CONFIG_CMD_BDI is not set
+# CONFIG_CMD_IMI is not set
+CONFIG_CMD_ADC=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_REGULATOR=y
+CONFIG_OF_CONTROL=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SARADC_MESON=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_MESON=y
+CONFIG_DM_MMC=y
+CONFIG_MMC_MESON_GX=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE_MESON8B=y
+CONFIG_PHY=y
+CONFIG_MESON_GXBB_USB_PHY=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_MESON_GXBB=y
+CONFIG_POWER_DOMAIN=y
+CONFIG_MESON_EE_POWER_DOMAIN=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_DM_RESET=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_MESON_SERIAL=y
+CONFIG_SYSINFO=y
+CONFIG_SYSINFO_SMBIOS=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_DWC2=y
+CONFIG_USB_KEYBOARD=y
+CONFIG_DM_VIDEO=y
+# CONFIG_VIDEO_BPP8 is not set
+# CONFIG_VIDEO_BPP16 is not set
+CONFIG_SYS_WHITE_ON_BLACK=y
+CONFIG_VIDEO_MESON=y
+CONFIG_VIDEO_DT_SIMPLEFB=y
+CONFIG_SPLASH_SCREEN=y
+CONFIG_SPLASH_SCREEN_ALIGN=y
+CONFIG_VIDEO_BMP_RLE8=y
+CONFIG_BMP_16BPP=y
+CONFIG_BMP_24BPP=y
+CONFIG_BMP_32BPP=y
+CONFIG_OF_LIBFDT_OVERLAY=y
--
2.34.1

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@@ -1,91 +0,0 @@
From e45b57304c28592eae3ad386559abb6dd3a7a802 Mon Sep 17 00:00:00 2001
From: chewitt <christianshewitt@gmail.com>
Date: Sat, 27 Feb 2021 06:04:00 +0000
Subject: [PATCH 09/22] WIP: boards: amlogic: add WeTek Play2 defconfig
Signed-off-by: Christian Hewittt <christianshewitt@gmail.com>
---
configs/wetek-play2_defconfig | 71 +++++++++++++++++++++++++++++++++++
1 file changed, 71 insertions(+)
create mode 100644 configs/wetek-play2_defconfig
diff --git a/configs/wetek-play2_defconfig b/configs/wetek-play2_defconfig
new file mode 100644
index 0000000000..624679f90c
--- /dev/null
+++ b/configs/wetek-play2_defconfig
@@ -0,0 +1,71 @@
+CONFIG_ARM=y
+CONFIG_SYS_BOARD="wetek-gxbb"
+CONFIG_ARCH_MESON=y
+CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_SYS_LOAD_ADDR=0x1000000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_ENV_SIZE=0x2000
+CONFIG_DM_GPIO=y
+CONFIG_DEBUG_UART_BASE=0xc81004c0
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_IDENT_STRING=" wetek-play2"
+CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-wetek-play2"
+CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
+CONFIG_OF_BOARD_SETUP=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_MISC_INIT_R=y
+# CONFIG_CMD_BDI is not set
+# CONFIG_CMD_IMI is not set
+CONFIG_CMD_ADC=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_REGULATOR=y
+CONFIG_OF_CONTROL=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SARADC_MESON=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_MESON=y
+CONFIG_DM_MMC=y
+CONFIG_MMC_MESON_GX=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE_MESON8B=y
+CONFIG_PHY=y
+CONFIG_MESON_GXBB_USB_PHY=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_MESON_GXBB=y
+CONFIG_POWER_DOMAIN=y
+CONFIG_MESON_EE_POWER_DOMAIN=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_DM_RESET=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_MESON_SERIAL=y
+CONFIG_SYSINFO=y
+CONFIG_SYSINFO_SMBIOS=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_DWC2=y
+CONFIG_USB_KEYBOARD=y
+CONFIG_DM_VIDEO=y
+# CONFIG_VIDEO_BPP8 is not set
+# CONFIG_VIDEO_BPP16 is not set
+CONFIG_SYS_WHITE_ON_BLACK=y
+CONFIG_VIDEO_MESON=y
+CONFIG_VIDEO_DT_SIMPLEFB=y
+CONFIG_SPLASH_SCREEN=y
+CONFIG_SPLASH_SCREEN_ALIGN=y
+CONFIG_VIDEO_BMP_RLE8=y
+CONFIG_BMP_16BPP=y
+CONFIG_BMP_24BPP=y
+CONFIG_BMP_32BPP=y
+CONFIG_OF_LIBFDT_OVERLAY=y
--
2.34.1

View File

@@ -1,110 +0,0 @@
From e7babbfd6c66c20e81e9d728a6a4384a9a5885dd Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Sat, 15 Jan 2022 06:23:29 +0000
Subject: [PATCH 11/22] WIP: boards: amlogic: add Radxa Zero2 defconfig
Add a defconfig for the Radxa Zero2 SBC, using an Amlogic A311D chip.
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
board/amlogic/w400/MAINTAINERS | 1 +
configs/radxa-zero2_defconfig | 77 ++++++++++++++++++++++++++++++++++
2 files changed, 78 insertions(+)
create mode 100644 configs/radxa-zero2_defconfig
diff --git a/board/amlogic/w400/MAINTAINERS b/board/amlogic/w400/MAINTAINERS
index 96ccda2001..caad41577d 100644
--- a/board/amlogic/w400/MAINTAINERS
+++ b/board/amlogic/w400/MAINTAINERS
@@ -3,4 +3,5 @@ M: Neil Armstrong <neil.armstrong@linaro.org>
S: Maintained
L: u-boot-amlogic@groups.io
F: board/amlogic/w400/
+F: configs/radxa-zero2_defconfig
F: doc/board/amlogic/w400.rst
diff --git a/configs/radxa-zero2_defconfig b/configs/radxa-zero2_defconfig
new file mode 100644
index 0000000000..3ef3c9c143
--- /dev/null
+++ b/configs/radxa-zero2_defconfig
@@ -0,0 +1,77 @@
+CONFIG_ARM=y
+CONFIG_ARCH_MESON=y
+CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_ENV_SIZE=0x2000
+CONFIG_DM_GPIO=y
+CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-radxa-zero2"
+CONFIG_MESON_G12A=y
+CONFIG_DEBUG_UART_BASE=0xff803000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_IDENT_STRING=" radxa-zero2"
+CONFIG_SYS_LOAD_ADDR=0x1000000
+CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
+CONFIG_REMAKE_ELF=y
+CONFIG_OF_BOARD_SETUP=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_MISC_INIT_R=y
+CONFIG_SYS_MAXARGS=32
+# CONFIG_CMD_BDI is not set
+# CONFIG_CMD_IMI is not set
+CONFIG_CMD_GPIO=y
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_REGULATOR=y
+CONFIG_OF_CONTROL=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_MMC_MESON_GX=y
+CONFIG_MTD=y
+CONFIG_DM_MTD=y
+# CONFIG_PHY_REALTEK is not set
+CONFIG_DM_MDIO=y
+CONFIG_DM_MDIO_MUX=y
+# CONFIG_ETH_DESIGNWARE_MESON8B is not set
+CONFIG_MDIO_MUX_MESON_G12A=y
+CONFIG_MESON_G12A_USB_PHY=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_MESON_G12A=y
+CONFIG_POWER_DOMAIN=y
+CONFIG_MESON_EE_POWER_DOMAIN=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_RESET=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_MESON_SERIAL=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_DWC3=y
+# CONFIG_USB_DWC3_GADGET is not set
+CONFIG_USB_DWC3_MESON_G12A=y
+CONFIG_USB_KEYBOARD=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_VENDOR_NUM=0x1b8e
+CONFIG_USB_GADGET_PRODUCT_NUM=0xfada
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_DM_VIDEO=y
+# CONFIG_VIDEO_BPP8 is not set
+# CONFIG_VIDEO_BPP16 is not set
+CONFIG_SYS_WHITE_ON_BLACK=y
+CONFIG_VIDEO_MESON=y
+CONFIG_VIDEO_DT_SIMPLEFB=y
+CONFIG_SPLASH_SCREEN=y
+CONFIG_SPLASH_SCREEN_ALIGN=y
+CONFIG_VIDEO_BMP_RLE8=y
+CONFIG_BMP_16BPP=y
+CONFIG_BMP_24BPP=y
+CONFIG_BMP_32BPP=y
+CONFIG_OF_LIBFDT_OVERLAY=y
--
2.34.1

View File

@@ -1,123 +0,0 @@
From 2fc65ac09a5698b9e2060890de1cd3310a237658 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Sat, 15 Jan 2022 06:35:47 +0000
Subject: [PATCH 12/22] WIP: doc: boards: amlogic: update for Radxa Zero2
Add documentation bits for the Radxa Zero2
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
board/amlogic/w400/MAINTAINERS | 1 +
doc/board/amlogic/index.rst | 3 +-
.../{radxa-zero.rst => radxa-zero2.rst} | 29 ++++++++++---------
3 files changed, 18 insertions(+), 15 deletions(-)
rename doc/board/amlogic/{radxa-zero.rst => radxa-zero2.rst} (76%)
diff --git a/board/amlogic/w400/MAINTAINERS b/board/amlogic/w400/MAINTAINERS
index caad41577d..6e1ef9b8b8 100644
--- a/board/amlogic/w400/MAINTAINERS
+++ b/board/amlogic/w400/MAINTAINERS
@@ -5,3 +5,4 @@ L: u-boot-amlogic@groups.io
F: board/amlogic/w400/
F: configs/radxa-zero2_defconfig
F: doc/board/amlogic/w400.rst
+F: doc/board/amlogic/radxa-zero2.rst
diff --git a/doc/board/amlogic/index.rst b/doc/board/amlogic/index.rst
index 4d407f9362..f0b92e4209 100644
--- a/doc/board/amlogic/index.rst
+++ b/doc/board/amlogic/index.rst
@@ -19,7 +19,7 @@ This matrix concerns the actual source code version.
| | Nanopi-K2 | Khadas-VIM | Libretech-PC | JetHub J100 | SEI510 | Khadas-VIM3 | Khadas-VIM3L |
| | P200 | LibreTech-CC v1 | WeTek Core2 | | Radxa Zero | GT-King/Pro | Odroid-C4 |
| | P201 | LibreTech-AC v2 | | | | GSKing-X | Odroid-HC4 |
-| | | JetHub J80 | | | | | BananaPi-M5 |
+| | | JetHub J80 | | | | Radxa Zero2 | BananaPi-M5 |
+-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+
| UART | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
+-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+
@@ -110,6 +110,7 @@ Board Documentation
p212
q200
radxa-zero
+ radxa-zero2
s400
sei510
sei610
diff --git a/doc/board/amlogic/radxa-zero.rst b/doc/board/amlogic/radxa-zero2.rst
similarity index 76%
rename from doc/board/amlogic/radxa-zero.rst
rename to doc/board/amlogic/radxa-zero2.rst
index f5611f52ec..95a42a05d0 100644
--- a/doc/board/amlogic/radxa-zero.rst
+++ b/doc/board/amlogic/radxa-zero2.rst
@@ -1,18 +1,17 @@
.. SPDX-License-Identifier: GPL-2.0+
-U-Boot for Radxa Zero
-=====================
+U-Boot for Radxa Zero2
+======================
-Radxa Zero is a small form factor SBC based on the Amlogic S905Y2
-chipset that ships in a number of RAM/eMMC configurations:
+Radxa Zero2 is a small form factor SBC based on the Amlogic A311D
+chipset that ships in a number of eMMC configurations:
-Boards with 512MB/1GB LPDDR4 RAM have no eMMC storage and BCM43436
-wireless (2.4GHz b/g/n) while 2GB/4GB boards have 8/16/32/64/128GB
-eMMC storage and BCM4345 wireless (2.4/5GHz a/b/g/n/ac).
-
-- Amlogic S905Y2 quad-core Cortex-A53
-- Mali G31-MP2 GPU
+- Amlogic A311D (Quad A73 + Dual A53) CPU
+- 4GB LPDDR4 RAM
+- 32/64/128GB eMMC
+- Mali G52-MP4 GPU
- HDMI 2.1 output (micro)
+- BCM4345 WiFi (2.4/5GHz a/b/g/n/ac) and BT 5.0
- 1x USB 2.0 port - Type C (OTG)
- 1x USB 3.0 port - Type C (Host)
- 1x micro SD Card slot
@@ -20,6 +19,7 @@ eMMC storage and BCM4345 wireless (2.4/5GHz a/b/g/n/ac).
Schematics are available on the manufacturer website:
+** TO-DO ** (provide updated URL)
https://dl.radxa.com/zero/docs/hw/RADAX_ZERO_V13_SCH_20210309.pdf
U-Boot compilation
@@ -28,7 +28,7 @@ U-Boot compilation
.. code-block:: bash
$ export CROSS_COMPILE=aarch64-none-elf-
- $ make radxa-zero_defconfig
+ $ make radxa-zero2_defconfig
$ make
Image creation
@@ -42,6 +42,7 @@ git trees published by the board vendor:
.. code-block:: bash
+ ** TO-DO ** UPDATE URLs
$ git clone -b radxa-zero-v2021.07 https://github.com/radxa/u-boot.git
$ git clone https://github.com/radxa/fip.git
@@ -54,11 +55,11 @@ git trees published by the board vendor:
$ export CROSS_COMPILE=/opt/gcc-arm-10.2-2020.11-x86_64-aarch64-none-elf/bin/aarch64-none-elf-
$ export ARCH=arm
$ cd u-boot
- $ make radxa-zero_defconfig
+ $ make radxa-zero2_defconfig
$ make
- $ cp u-boot.bin ../fip/radxa-zero/bl33.bin
- $ cd ../fip/radxa-zero
+ $ cp u-boot.bin ../fip/radxa-zero2/bl33.bin
+ $ cd ../fip/radxa-zero2
$ make
This will generate:
--
2.34.1

View File

@@ -1,128 +0,0 @@
From 7ce3779954032f9ac2591a02df06282115032cb3 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Thu, 7 Jul 2022 10:24:03 +0000
Subject: [PATCH 13/22] WIP: ARM: dts: import Beelink GT1 DT from Linux 5.21
Import the Beelink GT1 device-tree.
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
.../dts/meson-gxm-gt1-ultimate-u-boot.dtsi | 7 ++
arch/arm/dts/meson-gxm-gt1-ultimate.dts | 91 +++++++++++++++++++
2 files changed, 98 insertions(+)
create mode 100644 arch/arm/dts/meson-gxm-gt1-ultimate-u-boot.dtsi
create mode 100644 arch/arm/dts/meson-gxm-gt1-ultimate.dts
diff --git a/arch/arm/dts/meson-gxm-gt1-ultimate-u-boot.dtsi b/arch/arm/dts/meson-gxm-gt1-ultimate-u-boot.dtsi
new file mode 100644
index 0000000000..39270ea71c
--- /dev/null
+++ b/arch/arm/dts/meson-gxm-gt1-ultimate-u-boot.dtsi
@@ -0,0 +1,7 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 BayLibre, SAS.
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
+ */
+
+#include "meson-gxl-u-boot.dtsi"
diff --git a/arch/arm/dts/meson-gxm-gt1-ultimate.dts b/arch/arm/dts/meson-gxm-gt1-ultimate.dts
new file mode 100644
index 0000000000..2c267884cc
--- /dev/null
+++ b/arch/arm/dts/meson-gxm-gt1-ultimate.dts
@@ -0,0 +1,91 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) Christian Hewitt <christianshewitt@gmail.com>
+ */
+
+/dts-v1/;
+
+#include "meson-gxm.dtsi"
+#include "meson-gx-p23x-q20x.dtsi"
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+
+/ {
+ compatible = "azw,gt1-ultimate", "amlogic,s912", "amlogic,meson-gxm";
+ model = "Beelink GT1 Ultimate";
+
+ leds {
+ compatible = "gpio-leds";
+
+ led-white {
+ color = <LED_COLOR_ID_WHITE>;
+ function = LED_FUNCTION_POWER;
+ gpios = <&gpio_ao GPIOAO_9 GPIO_ACTIVE_HIGH>;
+ default-state = "on";
+ panic-indicator;
+ };
+ };
+
+ adc-keys {
+ compatible = "adc-keys";
+ io-channels = <&saradc 0>;
+ io-channel-names = "buttons";
+ keyup-threshold-microvolt = <1710000>;
+
+ button-function {
+ label = "update";
+ linux,code = <KEY_VENDOR>;
+ press-threshold-microvolt = <10000>;
+ };
+ };
+};
+
+&ethmac {
+ pinctrl-0 = <&eth_pins>;
+ pinctrl-names = "default";
+ phy-handle = <&external_phy>;
+ amlogic,tx-delay-ns = <2>;
+ phy-mode = "rgmii";
+};
+
+&external_mdio {
+ external_phy: ethernet-phy@0 {
+ /* Realtek RTL8211F (0x001cc916) */
+ reg = <0>;
+ max-speed = <1000>;
+
+ reset-assert-us = <10000>;
+ reset-deassert-us = <80000>;
+ reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
+
+ interrupt-parent = <&gpio_intc>;
+ /* MAC_INTR on GPIOZ_15 */
+ interrupts = <25 IRQ_TYPE_LEVEL_LOW>;
+ };
+};
+
+&ir {
+ linux,rc-map-name = "rc-beelink-gs1";
+};
+
+&sd_emmc_a {
+ brcmf: wifi@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ };
+};
+
+&uart_A {
+ status = "okay";
+ pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
+ pinctrl-names = "default";
+ uart-has-rtscts;
+
+ bluetooth {
+ compatible = "brcm,bcm43438-bt";
+ shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
+ max-speed = <2000000>;
+ clocks = <&wifi32k>;
+ clock-names = "lpo";
+ };
+};
--
2.34.1

View File

@@ -19,7 +19,7 @@ index 0000000000..77ffc9aa49
@@ -0,0 +1,71 @@
+CONFIG_ARM=y
+CONFIG_ARCH_MESON=y
+CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_TEXT_BASE=0x01000000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_ENV_SIZE=0x2000
+CONFIG_DM_GPIO=y
@@ -81,7 +81,7 @@ index 0000000000..77ffc9aa49
+CONFIG_USB_GADGET_PRODUCT_NUM=0xfada
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_DM_VIDEO=y
+CONFIG_VIDEO=y
+# CONFIG_VIDEO_BPP8 is not set
+# CONFIG_VIDEO_BPP16 is not set
+CONFIG_SYS_WHITE_ON_BLACK=y

View File

@@ -1,165 +0,0 @@
From 5c21b65a0efdae590e0d0ecd1191078725e4abf4 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Thu, 14 Jul 2022 19:38:41 +0000
Subject: [PATCH 15/22] WIP: doc: boards: amlogic: update for Beelink GT1
Add documentation bits for the Beelink GT1 and GT1-Ultimate
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
board/amlogic/q200/MAINTAINERS | 2 +
doc/board/amlogic/beelink-gt1.rst | 98 +++++++++++++++++++++++++++++++
doc/board/amlogic/index.rst | 9 +--
3 files changed, 105 insertions(+), 4 deletions(-)
create mode 100644 doc/board/amlogic/beelink-gt1.rst
diff --git a/board/amlogic/q200/MAINTAINERS b/board/amlogic/q200/MAINTAINERS
index 9c84cca27e..46beffe17f 100644
--- a/board/amlogic/q200/MAINTAINERS
+++ b/board/amlogic/q200/MAINTAINERS
@@ -4,9 +4,11 @@ S: Maintained
L: u-boot-amlogic@groups.io
F: board/amlogic/q200/
F: include/configs/q200.h
+F: configs/beelink-gt1_defconfig
F: configs/khadas-vim2_defconfig
F: configs/libretech-s905d-pc_defconfig
F: configs/libretech-s912-pc_defconfig
F: configs/wetek-core2_defconfig
+F: doc/board/amlogic/beelink-gt1.rst
F: doc/board/amlogic/khadas-vim2.rst
F: doc/board/amlogic/wetek-core2.rst
diff --git a/doc/board/amlogic/beelink-gt1.rst b/doc/board/amlogic/beelink-gt1.rst
new file mode 100644
index 0000000000..28a7c4366f
--- /dev/null
+++ b/doc/board/amlogic/beelink-gt1.rst
@@ -0,0 +1,98 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot for Beelink GT1/GT1-Ultimate
+===================================
+
+The Shenzen AZW (Beelink) GT1 and GT1-Ultimate are based on the Amlogic
+Q200 reference board with an S912 chip.
+
+- 2GB or 3GB DDR3 RAM
+- 32GB eMMC
+- HDMI 2.1 video
+- S/PDIF optical output
+- 10/100/1000 Ethernet
+- AP6356S Wireless (802.11 a/b/g/n/ac, BT 4.2)
+- 3x USB 2.0 ports
+- IR receiver
+- 1x micro SD card slot
+- 1x Power LED (white)
+- 1x Reset button (internal)
+
+Beelink do not provide public schematics, but have been willing
+to share them with known distro developers on request.
+
+U-Boot compilation
+------------------
+
+.. code-block:: bash
+
+ $ export CROSS_COMPILE=aarch64-none-elf-
+ $ make beelink-gt1_defconfig
+ $ make
+
+Image creation
+--------------
+
+Amlogic does not provide sources for the firmware and for tools needed
+to create the bootloader image. Beelink have provided the Amlogic SDK
+u-boot sources to known distro developers on-request, allowing FIPs to
+be generated. The GT1 (2GB) and GT1-Ultimate (3GB) models differ in
+RAM size and original Beelink devices use the same spec RAM chips and
+can share the same boot FIPs:
+
+https://github.com/LibreELEC/amlogic-boot-fip/tree/master/beelink-gt1
+
+For simplified usage, pleaser refer to :doc:`pre-generated-fip` with codename `beelink-gt1`
+
+.. code-block:: bash
+
+ $ wget https://github.com/LibreELEC/amlogic-boot-fip/archive/master.zip
+ $ unzip master.zip
+ $ export FIPDIR=$PWD/amlogic-boot-fip/beelink-gt1
+
+Go back to the mainline U-Boot source tree then:
+
+.. code-block:: bash
+
+ $ mkdir fip
+ $ cp $FIPDIR/* fip/
+ $ cp u-boot.bin fip/bl33.bin
+
+ $ sh fip/blx_fix.sh \
+ fip/bl30.bin \
+ fip/zero_tmp \
+ fip/bl30_zero.bin \
+ fip/bl301.bin \
+ fip/bl301_zero.bin \
+ fip/bl30_new.bin \
+ bl30
+
+ $ python fip/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0
+
+ $ sh fip/blx_fix.sh \
+ fip/bl2_acs.bin \
+ fip/zero_tmp \
+ fip/bl2_zero.bin \
+ fip/bl21.bin \
+ fip/bl21_zero.bin \
+ fip/bl2_new.bin \
+ bl2
+
+ $ fip/gxl/aml_encrypt_gxl --bl3enc --input fip/bl30_new.bin
+ $ fip/gxl/aml_encrypt_gxl --bl3enc --input fip/bl31.img
+ $ fip/gxl/aml_encrypt_gxl --bl3enc --input fip/bl33.bin
+ $ fip/gxl/aml_encrypt_gxl --bl2sig --input fip/bl2_new.bin --output fip/bl2.n.bin.sig
+ $ fip/gxl/aml_encrypt_gxl --bootmk \
+ --output fip/u-boot.bin \
+ --bl2 fip/bl2.n.bin.sig \
+ --bl30 fip/bl30_new.bin.enc \
+ --bl31 fip/bl31.img.enc \
+ --bl33 fip/bl33.bin.enc
+
+And then write the image to SD or eMMC with:
+
+.. code-block:: bash
+
+ $ DEV=/dev/your_sd_device
+ $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
+ $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=440
diff --git a/doc/board/amlogic/index.rst b/doc/board/amlogic/index.rst
index f0b92e4209..b8b6f9b98a 100644
--- a/doc/board/amlogic/index.rst
+++ b/doc/board/amlogic/index.rst
@@ -15,10 +15,10 @@ This matrix concerns the actual source code version.
| | | S805X | S905D | | S905D2 | A311D | S905D3 |
| | | S905W | | | S905Y2 | | |
+===============================+===========+=================+==============+=============+============+=============+==============+
-| Boards | Odroid-C2 | P212 | Khadas VIM2 | S400 | U200 | Odroid-N2 | SEI610 |
-| | Nanopi-K2 | Khadas-VIM | Libretech-PC | JetHub J100 | SEI510 | Khadas-VIM3 | Khadas-VIM3L |
-| | P200 | LibreTech-CC v1 | WeTek Core2 | | Radxa Zero | GT-King/Pro | Odroid-C4 |
-| | P201 | LibreTech-AC v2 | | | | GSKing-X | Odroid-HC4 |
+| Boards | Odroid-C2 | P212 | Beelink GT1 | S400 | U200 | Odroid-N2 | SEI610 |
+| | Nanopi-K2 | Khadas-VIM | Khadas VIM2 | JetHub J100 | SEI510 | Khadas-VIM3 | Khadas-VIM3L |
+| | P200 | LibreTech-CC v1 | Libretech-PC | | Radxa Zero | GT-King/Pro | Odroid-C4 |
+| | P201 | LibreTech-AC v2 | WeTek Core2 | | | GSKing-X | Odroid-HC4 |
| | | JetHub J80 | | | | Radxa Zero2 | BananaPi-M5 |
+-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+
| UART | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
@@ -93,6 +93,7 @@ Board Documentation
beelink-gtking
beelink-gtkingpro
+ beelink-gt1
jethub-j100
jethub-j80
khadas-vim2
--
2.34.1

View File

@@ -1,152 +0,0 @@
From dbf80e3d843cb58b9098d7c0e24c9ab1208003a7 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Fri, 17 Feb 2023 05:38:46 +0000
Subject: [PATCH 17/22] WIP: ARM: dts: add support for BananaPi M2-Pro
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
arch/arm/dts/Makefile | 1 +
.../dts/meson-sm1-bananapi-m2-pro-u-boot.dtsi | 13 +++
arch/arm/dts/meson-sm1-bananapi-m2-pro.dts | 98 +++++++++++++++++++
3 files changed, 112 insertions(+)
create mode 100644 arch/arm/dts/meson-sm1-bananapi-m2-pro-u-boot.dtsi
create mode 100644 arch/arm/dts/meson-sm1-bananapi-m2-pro.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 926ae0aae4..4e9fa81e18 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -203,6 +203,7 @@ dtb-$(CONFIG_ARCH_MESON) += \
meson-g12b-odroid-n2.dtb \
meson-g12b-odroid-n2-plus.dtb \
meson-g12b-radxa-zero2.dtb \
+ meson-sm1-bananapi-m2-pro.dtb \
meson-sm1-bananapi-m5.dtb \
meson-sm1-khadas-vim3l.dtb \
meson-sm1-odroid-c4.dtb \
diff --git a/arch/arm/dts/meson-sm1-bananapi-m2-pro-u-boot.dtsi b/arch/arm/dts/meson-sm1-bananapi-m2-pro-u-boot.dtsi
new file mode 100644
index 0000000000..a86fdb5668
--- /dev/null
+++ b/arch/arm/dts/meson-sm1-bananapi-m2-pro-u-boot.dtsi
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2021 BayLibre, SAS
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
+ */
+
+#include "meson-sm1-u-boot.dtsi"
+
+&ethmac {
+ snps,reset-gpio = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
+ snps,reset-delays-us = <0 10000 1000000>;
+ snps,reset-active-low;
+};
diff --git a/arch/arm/dts/meson-sm1-bananapi-m2-pro.dts b/arch/arm/dts/meson-sm1-bananapi-m2-pro.dts
new file mode 100644
index 0000000000..4890d5d9a4
--- /dev/null
+++ b/arch/arm/dts/meson-sm1-bananapi-m2-pro.dts
@@ -0,0 +1,98 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2021 BayLibre SAS
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
+ */
+
+/dts-v1/;
+
+#include "meson-sm1-bananapi.dtsi"
+#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
+
+/ {
+ compatible = "bananapi,bpi-m2-pro", "amlogic,sm1";
+ model = "Banana Pi BPI-M2-PRO";
+
+ sound {
+ compatible = "amlogic,axg-sound-card";
+ model = "BPI-M2-PRO";
+ audio-aux-devs = <&tdmout_b>;
+ audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
+ "TDMOUT_B IN 1", "FRDDR_B OUT 1",
+ "TDMOUT_B IN 2", "FRDDR_C OUT 1",
+ "TDM_B Playback", "TDMOUT_B OUT";
+
+ assigned-clocks = <&clkc CLKID_MPLL2>,
+ <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>;
+ assigned-clock-parents = <0>, <0>, <0>;
+ assigned-clock-rates = <294912000>,
+ <270950400>,
+ <393216000>;
+ status = "okay";
+
+ dai-link-0 {
+ sound-dai = <&frddr_a>;
+ };
+
+ dai-link-1 {
+ sound-dai = <&frddr_b>;
+ };
+
+ dai-link-2 {
+ sound-dai = <&frddr_c>;
+ };
+
+ /* 8ch hdmi interface */
+ dai-link-3 {
+ sound-dai = <&tdmif_b>;
+ dai-format = "i2s";
+ dai-tdm-slot-tx-mask-0 = <1 1>;
+ dai-tdm-slot-tx-mask-1 = <1 1>;
+ dai-tdm-slot-tx-mask-2 = <1 1>;
+ dai-tdm-slot-tx-mask-3 = <1 1>;
+ mclk-fs = <256>;
+
+ codec {
+ sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
+ };
+ };
+
+ /* hdmi glue */
+ dai-link-4 {
+ sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
+
+ codec {
+ sound-dai = <&hdmi_tx>;
+ };
+ };
+ };
+};
+
+&clkc_audio {
+ status = "okay";
+};
+
+&frddr_a {
+ status = "okay";
+};
+
+&frddr_b {
+ status = "okay";
+};
+
+&frddr_c {
+ status = "okay";
+};
+
+&tdmif_b {
+ status = "okay";
+};
+
+&tdmout_b {
+ status = "okay";
+};
+
+&tohdmitx {
+ status = "okay";
+};
--
2.34.1

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