This patch adds a helper function for searching DAPM widgets by name.
This allows to streamline functions which operate on widgets by name.
It also allows to get rid of copy'n'pasted code which was added to fallback to
widgets from other contexts if the widget was not found in the current context.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Liam Girdwood <lrg@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Since we can now support multiple platforms allow machines to not specify
a platform in a DAI link. Since the rest of the code requires that we have
a struct device for all objects we do this by substituting in a dummy
device that we register automatically.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Jassi Brar <jassisinghbrar@gmail.com>
Acked-by: Liam Girdwood <lrg@ti.com>
When bringing up audio low power modes boards may configure SYSCLK before
they actually start the FLL as we do much of the clocking setup prior to
the power up sequence.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Liam Girdwood <lrg@ti.com>
DMIC support is automatically disabled when none of the GPIOs are set up
to bring out the DMICCLK and DMICDAT pins at startup.
Note that there's no support for controlling DMIC routing except the power
control so the board DAPM configuration will need to manage DMIC enable and
disable if analogue mics (eg, a headset) also exist.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Liam Girdwood <lrg@ti.com>
The current davinci_mcasp_set_dai_fmt() sets bits ACLKX and ACLKR in the PDIR
register for the codec clock-master/frame-slave mode; however, this results in
the ACLKX and ACLKR pins being outputs according to SPRUFM1 [1] which
conflicts with "codec is clock master."
Similarly to the previous patch in this series, "fix _CBM_CFS hw_params" --
For codec clock-master/frame-slave mode (_CMB_CFS), clear bits ACLKX and ACLKR
in the PDIR register to set the pins as inputs and hence allow externally
sourced bit-clocks.
[1] http://www.ti.com/litv/pdf/sprufm1
Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
Reviewed-by: James Nuss <jamesnuss@nanometrics.ca>
Acked-by: Liam Girdwood <lrg@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
The current davinci_mcasp_set_dai_fmt() sets bits ACLKXE and ACLKRE (CLKXM
and CLKRM as they are reffered to in SPRUFM1 [1]) for codec clock-slave/
frame-slave mode (_CBS_CFS) which selects internally generated bit-clock and
frame-sync signals; however, it does the same thing again for codec
clock-master/frame-slave mode (_CBM_CFS) in the very next case statement which
is incorrectly selecting internally generated bit-clocks in this mode.
For codec clock-master/frame-slave mode (_CBM_CFS), clear bits ACLKXE and
ACLKRE to select externally-generated bit-clocks.
[1] http://www.ti.com/litv/pdf/sprufm1
Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
Reviewed-by: James Nuss <jamesnuss@nanometrics.ca>
Acked-by: Liam Girdwood <lrg@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
The current driver creates value for set/clr of PDIR using (x<<26) instead
of the #defines that are convieniently made available.
Update the driver to use the bitfield definitions of PDIR. There is no
functional change introduced by this patch.
Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
Reviewed-by: James Nuss <jamesnuss@nanometrics.ca>
Acked-by: Liam Girdwood <lrg@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
The current check for the number of tdm-slots specified by platform data is
always true (x >= 2 || x <= 32); therefore the else branch that warns of an
incorrect number of slots can never be taken.
Check that the number of tdm slots specified by platform data is between 2
and 32, inclusive.
Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
Reviewed-by: James Nuss <jamesnuss@nanometrics.ca>
Acked-by: Liam Girdwood <lrg@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
The FIFO of each port were always working though it was not used
in current FSI driver.
This patch add module/port clock control function for fixing it.
This patch is also caring suspend/resume.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Reviewed-by: Simon Horman <simon@horms.net>
Acked-by: Liam Girdwood <lrg@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Current FSI driver sets important settings when probing.
And it are not set again as long as driver is not bind again.
This mean FSI driver will lost it from register
if suspend/resume are happen.
This patch save important settings for suspend/resume.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Reviewed-by: Simon Horman <simon@horms.net>
Acked-by: Liam Girdwood <lrg@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
If FSI port is clock master, it use set_rate function
which is callback from platform,
and it is not necessary to call it if FSI port is clock slave.
Current FSI driver called this callback if platform provide it.
This patch modify it.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Reviewed-by: Simon Horman <simon@horms.net>
Acked-by: Liam Girdwood <lrg@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
CONFIG_SND_SOC_TEGRA_WM8903 is useful for many Tegra boards. To avoid the
ASoC tegra/Kconfig enumerating them all, instead have the Tegra machine
Kconfig select MACH_HAS_SND_SOC_TEGRA_WM8903 where appropriate, and have
SND_SOC_TEGRA_WM8903 depend on this.
[Redid ASoC diff so it applies. -- broonie]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Olof Johansson <olof@lixom.net>
Acked-by: Liam Girdwood <lrg@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
In addition to the currently supported analog capture path, the WM8903
also supports digital mics.
The analog and digital capture paths are exclusive; a mux is present to
select the capture source.
Logically, the mux exists to select the decimator's input, from either
the ADC or DMIC block outputs. However, the ADC power domain also
includes the DMIC interface. Consequently, this change represents the
mux as existing immediately before the ADC, and selecting between the
Input PGA and DMIC block outputs.
An alternative might be to represent the mux in its correct location,
and associate the ADC power enable controls with both the real ADC, and
a fake ADC for the DMIC?
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Liam Girdwood <lrg@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Mark Brown
Lars-Peter Clausen
Ben Gardiner
Kuninori Morimoto
Stephen Warren
Peter Hsiang