Thomas Gleixner
f5dbdd429f
tile/pci_gx: Prepare trio_handle_level_irq for irq argument removal
...
The irq argument of most interrupt flow handlers is unused or merily
used instead of a local variable. The handlers which need the irq
argument can retrieve the irq number from the irq descriptor.
Search and update was done with coccinelle and the invaluable help of
Julia Lawall.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de >
Cc: Julia Lawall <Julia.Lawall@lip6.fr >
Cc: Chris Metcalf <cmetcalf@ezchip.com >
2015-08-01 08:07:22 +02:00
Thomas Gleixner
625b86ad26
m68k/irq: Prepare irq handlers for irq argument removal
...
The irq argument of most interrupt flow handlers is unused or merily
used instead of a local variable. The handlers which need the irq
argument can retrieve the irq number from the irq descriptor.
Search and update was done with coccinelle and the invaluable help of
Julia Lawall.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de >
Cc: Julia Lawall <Julia.Lawall@lip6.fr >
Cc: Geert Uytterhoeven <geert@linux-m68k.org >
Cc: linux-m68k@lists.linux-m68k.org
2015-08-01 08:07:22 +02:00
Thomas Gleixner
88bd64628f
C6X/megamode-pic: Prepare megamod_irq_cascade for irq argument removal
...
The irq argument of most interrupt flow handlers is unused or merily
used instead of a local variable. The handlers which need the irq
argument can retrieve the irq number from the irq descriptor.
Search and update was done with coccinelle and the invaluable help of
Julia Lawall.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de >
Cc: Julia Lawall <Julia.Lawall@lip6.fr >
Cc: Mark Salter <msalter@redhat.com >
Cc: linux-c6x-dev@linux-c6x.org
2015-07-31 22:20:05 +02:00
Thomas Gleixner
2b501769c4
blackfin: Prepare irq handlers for irq argument removal
...
The irq argument of most interrupt flow handlers is unused or merily
used instead of a local variable. The handlers which need the irq
argument can retrieve the irq number from the irq descriptor.
Search and update was done with coccinelle and the invaluable help of
Julia Lawall.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de >
Cc: Julia Lawall <Julia.Lawall@lip6.fr >
Cc: Steven Miao <realmz6@gmail.com >
Cc: adi-buildroot-devel@lists.sourceforge.net
2015-07-31 22:20:05 +02:00
Thomas Gleixner
badae6bc94
arc/irq: Prepare idu_cascade_isr for irq argument removal
...
The irq argument of most interrupt flow handlers is unused or merily
used instead of a local variable. The handlers which need the irq
argument can retrieve the irq number from the irq descriptor.
Search and update was done with coccinelle and the invaluable help of
Julia Lawall.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de >
Cc: Julia Lawall <Julia.Lawall@lip6.fr >
Cc: Vineet Gupta <vgupta@synopsys.com >
2015-07-31 22:20:05 +02:00
Jiang Liu
d7185a98d5
sparc/irq: Use access helper irq_data_get_affinity_mask()
...
This is a preparatory patch for moving irq_data struct members.
Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com >
Cc: David S. Miller <davem@davemloft.net >
Link: http://lkml.kernel.org/r/1433145945-789-27-git-send-email-jiang.liu@linux.intel.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de >
2015-07-31 22:20:05 +02:00
Jiang Liu
6a4a5b34c3
sparc/irq: Use helper irq_data_get_irq_handler_data()
...
Use helper function irq_data_get_irq_handler_data() to hide irq_desc
implementation details. This allows to move irq_data->handler_data to
irq_data_common, once all usage sites are converted.
Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com >
Cc: David S. Miller <davem@davemloft.net >
Link: http://lkml.kernel.org/r/1433145945-789-9-git-send-email-jiang.liu@linux.intel.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de >
2015-07-31 22:20:05 +02:00
Jiang Liu
d2109a1219
parisc/irq: Use access helper irq_data_get_affinity_mask()
...
Use access helper irq_data_get_affinity_mask() to hide implementation
details of struct irq_desc.
Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com >
Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com >
Cc: Tony Luck <tony.luck@intel.com >
Cc: Bjorn Helgaas <bhelgaas@google.com >
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org >
Cc: Randy Dunlap <rdunlap@infradead.org >
Cc: Yinghai Lu <yinghai@kernel.org >
Cc: Borislav Petkov <bp@alien8.de >
Cc: James E.J. Bottomley <jejb@parisc-linux.org >
Cc: Helge Deller <deller@gmx.de >
Link: http://lkml.kernel.org/r/1433145945-789-24-git-send-email-jiang.liu@linux.intel.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de >
2015-07-31 22:20:04 +02:00
Jiang Liu
9d03e784bc
mn10300/irq: Use access helper irq_data_get_affinity_mask()
...
Use access helper irq_data_get_affinity_mask() to hide implementation
details of struct irq_desc.
Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com >
Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com >
Cc: Tony Luck <tony.luck@intel.com >
Cc: linux-am33-list@redhat.com
Cc: Bjorn Helgaas <bhelgaas@google.com >
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org >
Cc: Randy Dunlap <rdunlap@infradead.org >
Cc: Yinghai Lu <yinghai@kernel.org >
Cc: Borislav Petkov <bp@alien8.de >
Cc: David Howells <dhowells@redhat.com >
Cc: Koichi Yasutake <yasutake.koichi@jp.panasonic.com >
Link: http://lkml.kernel.org/r/1433145945-789-23-git-send-email-jiang.liu@linux.intel.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de >
2015-07-31 22:20:04 +02:00
Thomas Gleixner
4ba375016f
irqchip/i8259: Prepare i8259_irq_dispatch for irq argument removal
...
Make irq a local variable and retrieve domain from the irq descriptor
which avoid a redundant lookup.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de >
Cc: Ralf Baechle <ralf@linux-mips.org >
2015-07-31 22:20:04 +02:00
Ralf Baechle
0509cfde03
MIPS/irqchip: Move i8259 irqchip driver to drivers/irqchip
...
Signed-off-by: Ralf Baechle <ralf@linux-mips.org >
Signed-off-by: Thomas Gleixner <tglx@linutronix.de >
2015-07-31 22:04:49 +02:00
Joel Porquet
0b73670170
irqchip: Remove header drivers/irqchip/irqchip.h
...
All drivers using the macro IRQCHIP_DECLARE have been converted to using global
header include/linux/irqchip.h. Local header drivers/irqchip/irqchip.h is now
useless and can be removed.
Signed-off-by: Joel Porquet <joel@porquet.org >
Cc: vgupta@synopsys.com
Cc: monstr@monstr.eu
Cc: ralf@linux-mips.org
Cc: jason@lakedaemon.net
Link: http://lkml.kernel.org/r/2818400.nekF4hg2Ig@joel-zenbook
Signed-off-by: Thomas Gleixner <tglx@linutronix.de >
2015-07-31 20:51:22 +02:00
Joel Porquet
0a271c2a34
mips/irq: prepare for drivers/irqchip/irqchip.h removal
...
The IRQCHIP_DECLARE macro migrated to 'include/linux/irqchip.h'.
See commit 91e20b5040
("irqchip: Move IRQCHIP_DECLARE macro to include/linux/irqchip.h").
This patch removes inclusions of private header 'drivers/irqchip/irqchip.h'and
replaces them with the inclusion of 'include/linux/irqchip.h'.
Signed-off-by: Joel Porquet <joel@porquet.org >
Cc: vgupta@synopsys.com
Cc: monstr@monstr.eu
Cc: ralf@linux-mips.org
Cc: jason@lakedaemon.net
Link: http://lkml.kernel.org/r/3357968.0IznKtY3Q9@joel-zenbook
Signed-off-by: Thomas Gleixner <tglx@linutronix.de >
2015-07-31 20:51:21 +02:00
Joel Porquet
fd4b267b3d
microblaze/irq: prepare for drivers/irqchip/irqchip.h removal
...
The IRQCHIP_DECLARE macro migrated to 'include/linux/irqchip.h'.
See commit 91e20b5040
("irqchip: Move IRQCHIP_DECLARE macro to include/linux/irqchip.h").
This patch removes the inclusion of private header 'drivers/irqchip/irqchip.h'
and replaces it with the inclusion of 'include/linux/irqchip.h'.
Signed-off-by: Joel Porquet <joel@porquet.org >
Cc: vgupta@synopsys.com
Cc: monstr@monstr.eu
Cc: ralf@linux-mips.org
Cc: jason@lakedaemon.net
Link: http://lkml.kernel.org/r/12384045.pHnZrl3CFY@joel-zenbook
Signed-off-by: Thomas Gleixner <tglx@linutronix.de >
2015-07-31 20:51:21 +02:00
Marc Zyngier
f075915ac0
PCI/MSI: Drop domain field from msi_controller
...
The only three users of that field are not using the msi_controller
structure anymore, so drop it altogether.
Acked-by: Bjorn Helgaas <bhelgaas@google.com >
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com >
Cc: <linux-arm-kernel@lists.infradead.org >
Cc: Yijing Wang <wangyijing@huawei.com >
Cc: Ma Jun <majun258@huawei.com >
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com >
Cc: Duc Dang <dhdang@apm.com >
Cc: Hanjun Guo <hanjun.guo@linaro.org >
Cc: Jiang Liu <jiang.liu@linux.intel.com >
Cc: Jason Cooper <jason@lakedaemon.net >
Link: http://lkml.kernel.org/r/1438091186-10244-20-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de >
2015-07-30 00:14:39 +02:00
Marc Zyngier
8d63bc7bea
PCI/MSI: pci-xgene-msi: Get rid of struct msi_controller
...
The X-Gene MSI driver only uses the msi_controller structure as
a way to match the host bridge with its MSI HW, and thus the
msi_domain.
But now that we can directly associate an msi_domain with a device,
there is no use keeping this msi_controller around.
Just remove all traces of msi_controller from the driver.
Tested-by: Duc Dang <dhdang@apm.com >
Acked-by: Bjorn Helgaas <bhelgaas@google.com >
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com >
Cc: <linux-arm-kernel@lists.infradead.org >
Cc: Yijing Wang <wangyijing@huawei.com >
Cc: Ma Jun <majun258@huawei.com >
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com >
Cc: Hanjun Guo <hanjun.guo@linaro.org >
Cc: Jiang Liu <jiang.liu@linux.intel.com >
Cc: Jason Cooper <jason@lakedaemon.net >
Link: http://lkml.kernel.org/r/1438091186-10244-19-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de >
2015-07-30 00:14:39 +02:00
Marc Zyngier
ef50645aa3
irqchip/GICv2m: Add platform MSI support
...
In order to support non-PCI MSI with GICv2m, add the minimal
required entry points for the MSI domain, which is actually almost
nothing (we just use the defaults provided by the core code).
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com >
Cc: <linux-arm-kernel@lists.infradead.org >
Cc: Yijing Wang <wangyijing@huawei.com >
Cc: Ma Jun <majun258@huawei.com >
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com >
Cc: Duc Dang <dhdang@apm.com >
Cc: Hanjun Guo <hanjun.guo@linaro.org >
Cc: Bjorn Helgaas <bhelgaas@google.com >
Cc: Jiang Liu <jiang.liu@linux.intel.com >
Cc: Jason Cooper <jason@lakedaemon.net >
Link: http://lkml.kernel.org/r/1438091186-10244-18-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de >
2015-07-30 00:14:39 +02:00
Marc Zyngier
5cedceb37c
irqchip/GICv2m: Get rid of struct msi_controller
...
GICv2m only uses the msi_controller structure as a way to match
the host bridge with its MSI HW, and thus the msi_domain.
But now that we can directly associate an msi_domain with a device,
there is no use keeping this msi_controller around.
Just remove all traces of msi_controller from the driver. Also
tag the inner (non-PCI) domain with DOMAIN_BUS_NEXUS.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com >
Cc: <linux-arm-kernel@lists.infradead.org >
Cc: Yijing Wang <wangyijing@huawei.com >
Cc: Ma Jun <majun258@huawei.com >
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com >
Cc: Duc Dang <dhdang@apm.com >
Cc: Hanjun Guo <hanjun.guo@linaro.org >
Cc: Bjorn Helgaas <bhelgaas@google.com >
Cc: Jiang Liu <jiang.liu@linux.intel.com >
Cc: Jason Cooper <jason@lakedaemon.net >
Link: http://lkml.kernel.org/r/1438091186-10244-17-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de >
2015-07-30 00:14:39 +02:00
Marc Zyngier
1e6db00048
irqchip/gicv3-its: Add platform MSI support
...
In order to support non-PCI MSI with the GICv3 ITS, add the minimal
required entry points for the MSI domain (an msi_prepare implementation).
The rest is only boilerplate code to find the raw ITS domain.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com >
Cc: <linux-arm-kernel@lists.infradead.org >
Cc: Yijing Wang <wangyijing@huawei.com >
Cc: Ma Jun <majun258@huawei.com >
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com >
Cc: Duc Dang <dhdang@apm.com >
Cc: Hanjun Guo <hanjun.guo@linaro.org >
Cc: Bjorn Helgaas <bhelgaas@google.com >
Cc: Jiang Liu <jiang.liu@linux.intel.com >
Cc: Jason Cooper <jason@lakedaemon.net >
Link: http://lkml.kernel.org/r/1438091186-10244-16-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de >
2015-07-30 00:14:38 +02:00
Marc Zyngier
54456db9a2
irqchip/gicv3-its: Make the PCI/MSI code standalone
...
We can now lookup the base ITS domain, making it possible to
initialize the PCI/MSI code independently from the main ITS
subsystem.
This allows us to remove all the previously add hooks.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com >
Cc: <linux-arm-kernel@lists.infradead.org >
Cc: Yijing Wang <wangyijing@huawei.com >
Cc: Ma Jun <majun258@huawei.com >
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com >
Cc: Duc Dang <dhdang@apm.com >
Cc: Hanjun Guo <hanjun.guo@linaro.org >
Cc: Bjorn Helgaas <bhelgaas@google.com >
Cc: Jiang Liu <jiang.liu@linux.intel.com >
Cc: Jason Cooper <jason@lakedaemon.net >
Link: http://lkml.kernel.org/r/1438091186-10244-15-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de >
2015-07-30 00:14:38 +02:00
Marc Zyngier
841514ab41
irqchip/gicv3-its: Get rid of struct msi_controller
...
The GICv3 ITS only uses the msi_controller structure as a way
to match the host bridge with its MSI HW, and thus the msi_domain.
But now that we can directly associate an msi_domain with a device,
there is no use keeping this msi_controller around.
Just remove all traces of msi_controller from the driver.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com >
Cc: <linux-arm-kernel@lists.infradead.org >
Cc: Yijing Wang <wangyijing@huawei.com >
Cc: Ma Jun <majun258@huawei.com >
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com >
Cc: Duc Dang <dhdang@apm.com >
Cc: Hanjun Guo <hanjun.guo@linaro.org >
Cc: Bjorn Helgaas <bhelgaas@google.com >
Cc: Jiang Liu <jiang.liu@linux.intel.com >
Cc: Jason Cooper <jason@lakedaemon.net >
Link: http://lkml.kernel.org/r/1438091186-10244-14-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de >
2015-07-30 00:14:38 +02:00
Marc Zyngier
e55dcd4d8b
irqchip/gicv3-its: Register irq domain with NEXUS token
...
Now that we can distinguish between multiple domains carrying the
same device_node, tag the raw ITS domain with DOMAIN_BUS_NEXUS.
This will allow MSI providers built on top of the raw ITS domain
to identify it.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com >
Cc: <linux-arm-kernel@lists.infradead.org >
Cc: Yijing Wang <wangyijing@huawei.com >
Cc: Ma Jun <majun258@huawei.com >
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com >
Cc: Duc Dang <dhdang@apm.com >
Cc: Hanjun Guo <hanjun.guo@linaro.org >
Cc: Bjorn Helgaas <bhelgaas@google.com >
Cc: Jiang Liu <jiang.liu@linux.intel.com >
Cc: Jason Cooper <jason@lakedaemon.net >
Link: http://lkml.kernel.org/r/1438091186-10244-13-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de >
2015-07-30 00:14:38 +02:00
Marc Zyngier
f130420e51
irqchip/gicv3-its: Split PCI/MSI code from the core ITS driver
...
It is becoming obvious that having the PCI/MSI code in the same
file as the the core ITS code is giving people implementing non-PCI
MSI support the wrong kind of idea.
In order to make things a bit clearer, let's move the PCI/MSI code
out to its own file. Hopefully it will make it clear that whoever
thinks of hooking into the core ITS better have a very strong point.
We use a temporary entry point that will get removed in a subsequent
patch, once the proper infrastructure is added.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com >
Cc: <linux-arm-kernel@lists.infradead.org >
Cc: Yijing Wang <wangyijing@huawei.com >
Cc: Ma Jun <majun258@huawei.com >
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com >
Cc: Duc Dang <dhdang@apm.com >
Cc: Hanjun Guo <hanjun.guo@linaro.org >
Cc: Bjorn Helgaas <bhelgaas@google.com >
Cc: Jiang Liu <jiang.liu@linux.intel.com >
Cc: Jason Cooper <jason@lakedaemon.net >
Link: http://lkml.kernel.org/r/1438091186-10244-12-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de >
2015-07-30 00:14:38 +02:00
Marc Zyngier
a5716070d8
genirq: Add DOMAIN_BUS_NEXUS irqdomain property
...
Some IRQ domains are not designed to directly provide interrupts
to devices, but strictly to be used by other domains. An example
of this is the GICv3 ITS, which is completely bus agnostic, and
on which it is possible to implement a PCI/MSI domain.
Just introduce the irq_domain_bus_token property for now.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com >
Cc: <linux-arm-kernel@lists.infradead.org >
Cc: Yijing Wang <wangyijing@huawei.com >
Cc: Ma Jun <majun258@huawei.com >
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com >
Cc: Duc Dang <dhdang@apm.com >
Cc: Hanjun Guo <hanjun.guo@linaro.org >
Cc: Bjorn Helgaas <bhelgaas@google.com >
Cc: Jiang Liu <jiang.liu@linux.intel.com >
Cc: Jason Cooper <jason@lakedaemon.net >
Link: http://lkml.kernel.org/r/1438091186-10244-11-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de >
2015-07-30 00:14:38 +02:00
Marc Zyngier
c09fcc4b2b
drivers/base: Add MSI domain support for non-PCI devices
...
With the msi_list and the msi_domain properties now being at the
generic device level, it is starting to be relatively easy to offer
a generic way of providing non-PCI MSIs.
The two major hurdles with this idea are:
- Lack of global ID that identifies a device: this is worked around by
having a global ID allocator for each device that gets enrolled in
the platform MSI subsystem
- Lack of standard way to write the message in the generating device.
This is solved by mandating driver code to provide a write_msg
callback, so that everyone can have their own square wheel
Apart from that, the API is fairly straightforward:
- platform_msi_create_irq_domain creates an MSI domain that gets
tagged with DOMAIN_BUS_PLATFORM_MSI
- platform_msi_domain_alloc_irqs allocate MSIs for a given device,
populating the msi_list
- platform_msi_domain_free_irqs does what is written on the tin
[ tglx: Created a seperate struct platform_msi_desc and added
kerneldoc entries ]
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com >
Cc: <linux-arm-kernel@lists.infradead.org >
Cc: Yijing Wang <wangyijing@huawei.com >
Cc: Ma Jun <majun258@huawei.com >
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com >
Cc: Duc Dang <dhdang@apm.com >
Cc: Hanjun Guo <hanjun.guo@linaro.org >
Cc: Bjorn Helgaas <bhelgaas@google.com >
Cc: Jiang Liu <jiang.liu@linux.intel.com >
Cc: Jason Cooper <jason@lakedaemon.net >
Link: http://lkml.kernel.org/r/1438091186-10244-10-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de >
2015-07-30 00:14:38 +02:00