f58a1acc7e
drm/i915: Bail out of pipe config compute loop on LPT
...
LPT is pch, so might run into the fdi bandwidth constraint (especially
since it has only 2 lanes). But right now we just force pipe_bpp back
to 24, resulting in a nice loop (which we bail out with a loud
WARN_ON). Fix this.
Cc: Chris Wilson <chris@chris-wilson.co.uk >
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com >
References: https://bugs.freedesktop.org/show_bug.cgi?id=93477
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com >
Tested-by: Chris Wilson <chris@chris-wilson.co.uk >
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com >
Cc: stable@vger.kernel.org
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch >
Link: http://patchwork.freedesktop.org/patch/msgid/1462264381-7573-1-git-send-email-daniel.vetter@ffwll.ch
2016-05-04 17:15:43 +02:00
e96b7e575b
drm/i915: remove i915_gem_object_ggtt_unbind
...
Only has one user and is nothing more than a shim on top of
i915_vma_unbind, so let's just get rid of it.
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com >
Suggested-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com >
Signed-off-by: Matthew Auld <matthew.auld@intel.com >
Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com >
Link: http://patchwork.freedesktop.org/patch/msgid/1461842691-27575-1-git-send-email-matthew.auld@intel.com
2016-05-04 13:10:10 +03:00
7d99373975
drm/i915: Simplify intel_mark_busy/idle
...
They use dev_priv exclusively so pass it in instead of dev
for smaller source and binary.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com >
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk >
Link: http://patchwork.freedesktop.org/patch/msgid/1461844620-35360-1-git-send-email-tvrtko.ursulin@linux.intel.com
2016-05-04 10:13:48 +01:00
5a8f97ea04
Revert "drm/i915: start adding dp mst audio"
...
Right now MST audio is causing too many kernel panics to really keep
around in the kernel. On top of that, even after fixing said panics it's
still basically non-functional (at least on all the setups I've tested
it on). Revert until we have a proper solution for this.
This reverts commit 3d52ccf52fcpaul@redhat.com >
Fixes: 3d52ccf52fstable@vger.kernel.org
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch >
Link: http://patchwork.freedesktop.org/patch/msgid/1462287692-28570-1-git-send-email-cpaul@redhat.com
2016-05-03 22:28:26 +02:00
3543995a71
mfd: intel_soc_pmic_core: Terminate panel control GPIO lookup table correctly
...
GPIO lookup tables are supposed to be zero terminated. Let's do that
and avoid accidentally walking off the end.
Cc: Shobhit Kumar <shobhit.kumar@intel.com >
Cc: Samuel Ortiz <sameo@linux.intel.com >
Cc: Linus Walleij <linus.walleij@linaro.org >
Cc: Alexandre Courbot <gnurou@gmail.com >
Cc: Thierry Reding <thierry.reding@gmail.com >
Cc: Lee Jones <lee.jones@linaro.org >
Cc: stable@vger.kernel.org
Fixes: 61dd2ca2d4ville.syrjala@linux.intel.com >
Reviewed-by: Jani Nikula <jani.nikula@intel.com >
Reviewed-by: Thierry Reding <treding@nvidia.com >
Acked-by: Linus Walleij <linus.walleij@linaro.org >
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch >
Link: http://patchwork.freedesktop.org/patch/msgid/1461353935-8078-1-git-send-email-ville.syrjala@linux.intel.com
2016-05-03 22:28:26 +02:00
450174fe9c
drm/i915/chv: Tune L3 SQC credits based on actual latencies
...
While browsing BSpec I bumped into a note saying we need to tune these
values based on actual measurements done after initial enabling. I've
checked that it indeed improves things on BXT. I haven't checked this on
CHV, but here it is if someone wants to give it a go.
v2:
- Add note about the discrepancy wrt. to the spec in the formula
calculating the credit encodings. (Mika, Ville)
- Move the WA comment to the new function. (Ville)
v3:
- Keep the comment about the SQC WA in the caller. (Ville)
CC: Ville Syrjälä <ville.syrjala@linux.intel.com >
CC: Mika Kuoppala <mika.kuoppala@intel.com >
Signed-off-by: Imre Deak <imre.deak@intel.com >
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: http://patchwork.freedesktop.org/patch/msgid/1462280061-1457-4-git-send-email-imre.deak@intel.com
2016-05-03 16:49:19 +03:00
36579cb63b
drm/i915: Clean up L3 SQC register field definitions
...
No need for hard-coding the register value, the corresponding fields are
defined properly in BSpec.
No functional change.
v2:
- Rebased on BXT L3 SQC tuning patch merged meanwhile.
CC: Ville Syrjälä <ville.syrjala@linux.intel.com >
Signed-off-by: Imre Deak <imre.deak@intel.com >
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com > (v1)
Link: http://patchwork.freedesktop.org/patch/msgid/1462280061-1457-3-git-send-email-imre.deak@intel.com
2016-05-03 16:49:15 +03:00
48e5d68d28
drm/i915/bdw: Add missing delay during L3 SQC credit programming
...
BSpec requires us to wait ~100 clocks before re-enabling clock gating,
so make sure we do this.
CC: stable@vger.kernel.org
CC: Ville Syrjälä <ville.syrjala@linux.intel.com >
Signed-off-by: Imre Deak <imre.deak@intel.com >
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: http://patchwork.freedesktop.org/patch/msgid/1462280061-1457-2-git-send-email-imre.deak@intel.com
2016-05-03 16:49:09 +03:00
9a41e17de3
drm/i915: Parse LFP brightness control field in VBT
...
These fields in VBT indicates the PWM source which
is used and also the controller number.
v2 by Jani: check for out of bounds access, some renames, change default
type, etc.
v3 by Jani: s/INTEL_BACKLIGHT_CABC/INTEL_BACKLIGHT_DSI_DCS/
Signed-off-by: Deepak M <m.deepak@intel.com >
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Link: http://patchwork.freedesktop.org/patch/msgid/eee2f7b683a081f006a7df1ddad9b20fbf53c48c.1461676337.git.jani.nikula@intel.com
2016-05-02 16:17:38 +03:00
ea9d9768a4
drm/i915: Add rpm get/put in oom and vmap notifier
...
i915_gem_shrink() will scan the bound list only if device is not
suspended but in OOM failure scenario it becomes absolutely necessary
to release as much memory as possible. Also in allocation failure from
vmap address space, it is incumbent on the Driver to reap all its
vmaps. So, adding rpm get/put in i915_gem_shrinker_oom() and
i915_gem_shrinker_vmap() to ensure shrinking of bound objects as well.
Signed-off-by: Praveen Paneri <praveen.paneri@intel.com >
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk >
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Link: http://patchwork.freedesktop.org/patch/msgid/1462178429-13449-2-git-send-email-praveen.paneri@intel.com
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
2016-05-02 14:02:27 +01:00
178a30c90a
drm/i915: Unbind objects in shrinker only if device is runtime active
...
When the system is running low on memory, gem shrinker is invoked.
In this process objects will be unbounded from GTT and unbinding process
will require access to GTT(GTTADR) and also to fence register potentially.
That requires a resume of gfx device, if suspended, in the shrinker path.
Considering the power leakage due to intermediate resume, perform unbinding
operation only if device is already runtime active.
v2: Use newly implemented intel_runtime_pm_get_if_in_use (Chris)
Signed-off-by: Akash Goel <akash.goel@intel.com >
Signed-off-by: Praveen Paneri <praveen.paneri@intel.com >
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk >
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Link: http://patchwork.freedesktop.org/patch/msgid/1462178429-13449-1-git-send-email-praveen.paneri@intel.com
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
2016-05-02 14:02:09 +01:00
a0cbe6a3f1
drm/i915/lvds: separate border enable readout from panel fitter
...
The LVDS border enable is independent from the panel fitter. Move the
readout of the "border bits" from i9xx_get_pfit_config() to
intel_lvds_get_config(), where it will be read if LVDS is enabled even
if the panel fitter is not.
This fixes the state checker warning:
[drm:intel_pipe_config_compare [i915]] *ERROR* mismatch in
gmch_pfit.lvds_border_bits (expected 0x00008000, found 0x00000000)
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com >
Cc: drm-intel-fixes@lists.freedesktop.org
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=87632
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Tested-by: Sitsofe Wheeler <sitsofe@yahoo.com >
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Link: http://patchwork.freedesktop.org/patch/msgid/1461933243-2140-1-git-send-email-jani.nikula@intel.com
2016-05-02 10:46:13 +03:00
c14005a80f
drm/i915: Enable semaphores for legacy submission on gen8
...
We have sufficient evidence from igt to support that semaphores are in
a working state. Enabling semaphores now for legacy provides a better
comparison of execlists against legacy ring submission.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch >
Link: http://patchwork.freedesktop.org/patch/msgid/1461928823-10298-6-git-send-email-chris@chris-wilson.co.uk
2016-04-29 17:47:08 +01:00
6ef48d7f01
drm/i915: Reload PD tables after semaphore wait on gen8
...
When the engine idles waiting upon a semaphore, it loses its
pagetables and we must reload them before executing the batch.
v2: Restrict w/a to non-RCS rings (RCS works correctly apparently).
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com >
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: http://patchwork.freedesktop.org/patch/msgid/1461932305-14637-5-git-send-email-chris@chris-wilson.co.uk
2016-04-29 13:59:56 +01:00
f9a4ea35b8
drm/i915: Fix serialisation of pipecontrol write vs semaphore signal
...
In order for the MI_SEMAPHORE_SIGNAL command to wait until after the
pipecontrol writing the signal value is complete, we have to pause the
CS inside the PIPE_CONTROL with the CS_STALL bit.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: http://patchwork.freedesktop.org/patch/msgid/1461932305-14637-4-git-send-email-chris@chris-wilson.co.uk
2016-04-29 13:59:41 +01:00
215a7e3210
drm/i915: Fix gen8 semaphores id for legacy mode
...
With the introduction of a distinct engine->id vs the hardware id, we need
to fix up the value we use for selecting the target engine when signaling
a semaphore. Note that these values can be merged with engine->guc_id.
Fixes: de1add3605chris@chris-wilson.co.uk >
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com >
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: http://patchwork.freedesktop.org/patch/msgid/1461932305-14637-3-git-send-email-chris@chris-wilson.co.uk
2016-04-29 13:59:26 +01:00
0e4ca1008e
drm/i915: Fix ordering of sanitize ppgtt and sanitize execlists
...
The i915.enable_ppgtt option depends upon the state of
i915.enable_execlists option - so we need to sanitize execlists first.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com >
Link: http://patchwork.freedesktop.org/patch/msgid/1461932305-14637-2-git-send-email-chris@chris-wilson.co.uk
2016-04-29 13:59:05 +01:00
a58c01aa6e
drm/i915: Apply strongly ordered RCS breadcrumb to gen8/legacy
...
For legacy ringbuffer mode, we need the new ordered breadcrumb emission
tried and tested on execlists in order to avoid the dreaded "missed
interrupt" syndrome. A secondary advantage of the execlists method is
that it writes to an arbitrary address, useful if one wants to write a
breadcrumb elsewhere.
This fix is taken from commit 7c17d37737chris@chris-wilson.co.uk >
Cc: Mika Kuoppala <mika.kuoppala@intel.com >
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com >
Link: http://patchwork.freedesktop.org/patch/msgid/1461932305-14637-1-git-send-email-chris@chris-wilson.co.uk
2016-04-29 13:58:26 +01:00
0e93cdd4a9
drm/i915: Trim the flush for the execlists request emission
...
At the start of request emission, we flush some space for the request,
estimating the typical size for the request body. The common tail is now
much larger than the typical body, so we can shrink the flush
substantially.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com >
Link: http://patchwork.freedesktop.org/patch/msgid/1461917226-9132-3-git-send-email-chris@chris-wilson.co.uk
2016-04-29 10:20:51 +01:00
a0442461f2
drm/i915: Trim the flush for the legacy request emission
...
At the start of request emission, we flush some space for the request,
estimating the typical size for the request body. The tail is now much
larger than the typical body, so we can shrink the flush slightly.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com >
Link: http://patchwork.freedesktop.org/patch/msgid/1461917226-9132-2-git-send-email-chris@chris-wilson.co.uk
2016-04-29 10:20:51 +01:00
596e5efc69
drm/i915: Bump reserved size for legacy gen8 semaphore emission
...
With 5 rings and a flush, we need 192 bytes of space to emit the
breadcrumb and semaphores. However, we need some spare room the size of
the single largest packet (36 dwords, 144 bytes) to accommodate
wraparound giving a grand total of 336 bytes
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com >
Link: http://patchwork.freedesktop.org/patch/msgid/1461917226-9132-1-git-send-email-chris@chris-wilson.co.uk
2016-04-29 10:20:51 +01:00
0f572ebec0
drm/i915: Move VLV HDMI lane reset work around logic to intel_dpio_phy.c
...
This moves the last phy specific code from the encoders to the phy
specific file.
Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com >
Reviewed-by: Jim Bride <jim.bride@linux.intel.com >
Link: http://patchwork.freedesktop.org/patch/msgid/1461761065-21195-11-git-send-email-ander.conselvan.de.oliveira@intel.com
2016-04-29 09:59:00 +03:00
5f68c275b4
drm/i915: Unduplicate pre encoder enabling phy code
...
The phy code in vlv_pre_enable_dp() and vlv_hdmi_pre_enable() is
exectly the same, so extract it to intel_dpio_phy.c.
Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com >
Reviewed-by: Jim Bride <jim.bride@linux.intel.com >
Link: http://patchwork.freedesktop.org/patch/msgid/1461761065-21195-10-git-send-email-ander.conselvan.de.oliveira@intel.com
2016-04-29 09:58:53 +03:00
6da2e61602
drm/i915: Unduplicate VLV phy pre pll enabling code
...
The code used by the DP and HDMI paths was very similar, so make them
share it. Note that this removes the write to signal level registers
from the HDMI pre pll enable path, but that's OK since those are set
in vlv_hdmi_pre_enable() function.
Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com >
Reviewed-by: Jim Bride <jim.bride@linux.intel.com >
Link: http://patchwork.freedesktop.org/patch/msgid/1461761065-21195-9-git-send-email-ander.conselvan.de.oliveira@intel.com
2016-04-29 09:58:45 +03:00
53d9872511
drm/i915: Unduplicate VLV signal level code
...
The logic for setting signal levels is used for both HDMI and DP with
small variations. But it is similar enough to put behind a function
called from the encoders.
v2: Remove unrelated MST changes due to rebase fumble. (Jim Bride)
Fix typo in the commit message. (Jim Bride)
v3: Really fix the typo. (Jim)
Cc: Jim Bride <jim.bride@linux.intel.com >
Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com >
Reviewed-by: Jim Bride <jim.bride@linux.intel.com >
Link: http://patchwork.freedesktop.org/patch/msgid/1461761065-21195-8-git-send-email-ander.conselvan.de.oliveira@intel.com
2016-04-29 09:57:36 +03:00
Daniel Vetter
Matthew Auld
Tvrtko Ursulin
Lyude
Ville Syrjälä
Imre Deak
Deepak M
Praveen Paneri
Jani Nikula
Chris Wilson
Ander Conselvan de Oliveira