The slot-gpio uses the devm*_ managed functions. Still it provide APIs
to explicitly free requested CD/WP GPIOs, but these API isn't being
used.
Therefore let's simplify slot-gpio by removing these unused APIs. If it
later turns out we need some of them, we can always consider to restore
the code.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
The MMC core makes use of the devm_* functions while requesting the
CD/WP GPIOs, let's rely on that.
Cc: Barry Song <baohua@kernel.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
The MMC core makes use of the devm_* functions while requesting the
CD/WP GPIOs, let's rely on that.
Cc: Nicolas Pitre <nico@fluxnic.net>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Instead of just printing an error when mmc_of_parse() fails to request
CD/WP GPIO pins, let's propagate all errors, except for -ENOENT.
Earlier only -EPROBE_DEFER was handled correctly.
As a side effect of this change and by relying on host drivers to
handle the errors during ->probe(), we don't need to free any data in
the error path.
This also means we are actually fixing a bug, since we remove the call
to mmc_gpio_free_cd() which wasn't the correct function to invoke to
handle cleanup. Instead that should have been mmc_gpiod_free_cd().
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Since mmc_of_parse() may fail, let's deal with it and thus do proper
error handling.
Cc: Jonas Jensen <jonas.jensen@gmail.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Move exynos related definition to header file. And this
also changes some of the registers name to match the standard
naming convention.
Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
[Alim: updated the commit message]
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Even though 1MB is reserved for descriptor table in IDMAC,
the dw_mmc host driver is allowed to receive only maximum
128KB block length in one request. This is caused by setting
improper max_blk_count. It needs to be e adjusted so that
descriptor table is used fully. It is found that the performance
is improved with the increased the max_blk_count.
Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Static checkers complain about the inconsistent NULL checking here:
drivers/mmc/host/mxs-mmc.c:680 mxs_mmc_probe()
warn: variable dereferenced before check 'ssp->dmach' (see line 660)
The variable can't actually be NULL so we can remove the check.
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Fixing the register name in sunxi_mmc_reset_host since the
SDXC_HARDWARE_RESET bit is actually located within REG_GCTRL and not
REG_CMDR as it was pointed out by Allwinner.
Signed-off-by: David Lanzendörfer <david.lanzendoerfer@o2s.ch>
Reported-by: <lixiang@allwinnertech.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
1) Adding a comment in order to clarify the choice of the locks within
sunxi_mmc_handle_manual_stop
2) As <lixiang@allwinnertech.com> has pointed out the wait_dma variable
was not accessed within the spin lock block in sunxi_mmc_request and so
(even if it should never happend) it would have theoretically been
possible that some other function would access the variable at the same
time as the function. This has been changed now and the function is
using local variables outside the lock and copys the value over during
the lock phase.
Signed-off-by: David Lanzendörfer <david.lanzendoerfer@o2s.ch>
Reported-by: <lixiang@allwinnertech.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
The last descriptor might be the first descriptor as well, so use masking to
add the LD (last descriptor) bit and drop the DIC (disable interrupt on
completion) bit rather then hard assignment as hard assignment will override
the FD (first descriptor) bit if there is only 1 descriptor.
Also set the ER (end of ring) bit and clear buf_addr_ptr2 on the last
descriptor, like the android kernel code does.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: David Lanzendörfer <david.lanzendoerfer@o2s.ch>
Reported-by: <lixiang@allwinnertech.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
The only function of these 'prepare' and 'complete' is to
disable the 'card detect' irq during suspend.
The commit which added this,
commit a48ce884d5
mmc: omap_hsmmc: Introduce omap_hsmmc_prepare/complete
justified it by the need to avoid the registration of new devices
during suspend.
However mmc_pm_notify will set ->rescan_disable in the 'prepare'
stage and clear it in the 'complete' stage, so no card detection
will actually happen.
Also the interrupt will be disabled before final suspend as part
of common suspend processing.
So this disabling of the interrupt is unnecessary, and interferes
with a transition to using common code for card-detect management.
Cc: Felipe Balbi <balbi@ti.com>
Cc: Venkatraman S <svenkatr@ti.com>
Cc: Chris Ball <cjb@laptop.org>
Signed-off-by: NeilBrown <neilb@suse.de>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Use the module_pci_driver() macro to make the code simpler
by eliminating module_init and module_exit calls.
Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
The commit 0718e59ae2 ("mmc: sdhci: move FSL ESDHC reset handling quirk into
esdhc code") states that Freescale esdhc is the only controller which needs
the interrupt registers restored after a reset. So it moves
SDHCI_QUIRK_RESTORE_IRQS_AFTER_RESET quirk handling code into the
esdhc-imx driver only. Unfortunately the same controller is used in
other boards which use the of-esdhc driver instead (like powerpc P2020).
Restore interrupts after reset in the sdhci-of-esdhc driver also.
Signed-off-by: Alessio Igor Bogani <alessio.bogani@elettra.eu>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Add manual tuning function in CSR atlas7 SoC. It is mainly used
for the UHS-I SD card working SDR50 SDR104 mode.
The tuning principle can be seen in SD spec part1 v3.01 4.2.4.5
(tuning command).
SD host send the cmd19 and set the delay value(0-127).
and the sdcard return 64 bytes data. If the data is same with
the tuning data. The delay value is valid. Execute this commmand
128 times. And calculate the longest window of the valid values.
The value in the middle of this window is the best value.
Signed-off-by: Minda Chen <Minda.Chen@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
We're running into cases where our enabling of the SDIO interrupt in
dw_mmc doesn't actually take effect. Specifically, adding patch like
this:
+++ b/drivers/mmc/host/dw_mmc.c
@@ -1076,6 +1076,9 @@ static void dw_mci_enable_sdio_irq(struct mmc_host *mmc, int enb)
mci_writel(host, INTMASK,
(int_mask | SDMMC_INT_SDIO(slot->id)));
+ int_mask = mci_readl(host, INTMASK);
+ if (!(int_mask & SDMMC_INT_SDIO(slot->id)))
+ dev_err(&mmc->class_dev, "failed to enable sdio irq\n");
} else {
...actually triggers the error message. That's because the
dw_mci_enable_sdio_irq() unsafely does a read-modify-write of the
INTMASK register.
We can't just use the standard host->lock since that lock is not irq
safe and mmc_signal_sdio_irq() (called from interrupt context) calls
dw_mci_enable_sdio_irq(). Add a new irq-safe lock to protect INTMASK.
An alternate solution to this is to punt mmc_signal_sdio_irq() to the
tasklet and then protect INTMASK modifications by the standard host
lock. This seemed like a bit more of a high-latency change.
Reported-by: Bing Zhao <bzhao@marvell.com>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: James Hogan <james.hogan@imgtec.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
In the patch (9623b5b mmc: dw_mmc: Disable low power mode if SDIO
interrupts are used) I added code that disabled the low power mode of
dw_mmc when SDIO interrupts are used. That code worked but always
felt a little hacky because we ended up disabling low power as a side
effect of the first enable_sdio_irq() call. That wouldn't be so bad
except that disabling low power involves a complicated process of
writing to the CMD/CMDARG registers and that extra process makes it
difficult to cleanly the read-modify-write race in
dw_mci_enable_sdio_irq() (see future patch in the series).
Change the code to take advantage of the init_card() callback of the
mmc core to do this right at bootup.
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
In (3fcb027 ARM: MXC: mxcmmc: work around a bug in the SDHC busy line
handling) the optional init_card() callback was added. According to
the original change it was "for now only called from
mmc_sdio_init_card()".
This callback really ought to be called from the SD and MMC init
functions as well. One current user of this callback
(mxcmci_init_card) will not work as expected if you insert an SDIO
card, then eject it and put a normal SD card in. Specifically the
normal SD card will not get to run with 4-bit data.
I'd like to use the init_card() callback to handle a similar quirk on
dw_mmc when using SDIO Interrupts (the "low power" feature of the card
needs to be disabled), so that will add a second user of the function.
Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Grant Grundler <grundler@chromium.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Ulf Hansson
Seungwon Jeon
Dan Carpenter
David Lanzendörfer
Hans de Goede
NeilBrown
Axel Lin
Wei Yongjun
Alessio Igor Bogani
Minda Chen
Doug Anderson