Commit Graph

574187 Commits

Author SHA1 Message Date
Arnd Bergmann e7ada8dfd5 Merge tag 'zynq-soc-for-4.6' of https://github.com/Xilinx/linux-xlnx into next/soc
Merge "ARM: Xilinx Zynq patches for v4.6" from Michal Simek:

- SLCR early init
- Fix L2 cache data corruption
- Fix early printk uart setting

* tag 'zynq-soc-for-4.6' of https://github.com/Xilinx/linux-xlnx:
  ARM: zynq: Move early printk virtual address to vmalloc area
  ARM: zynq: address L2 cache data corruption
  ARM: zynq: initialize slcr mapping earlier
2016-02-26 22:54:53 +01:00
Arnd Bergmann 8bba98a8c1 Merge tag 'davinci-for-v4.6/edma' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/soc
Merge "DaVinci EDMA enhancements for v4.6" from Sekhar Nori:

Pass dma_slave_map data to EDMA driver. This will help
migration to new DMA engine API for requesting
slave channels dma_request_chan().

* tag 'davinci-for-v4.6/edma' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
  ARM: davinci: dm646x: Add dma_slave_map to edma
  ARM: davinci: dm644x: Add dma_slave_map to edma
  ARM: davinci: dm365: Add dma_slave_map to edma
  ARM: davinci: dm355: Add dma_slave_map to edma
  ARM: davinci: devices-da8xx: Add dma_slave_map to edma
2016-02-26 22:42:05 +01:00
Arnd Bergmann ac838df7f8 Merge tag 'renesas-soc-for-v4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
Merge "Renesas ARM Based SoC Updates for v4.6" from Simon Horman:

* Enable PM and PM_GENERIC_DOMAINS for SoCs with PM Domains
* Move emev2_smp_ops to emev2
* Remove legacy map_io callbacks on r8a7740 and emev2 SoCs
* Migrate to generic l2c OF initialization on r8a7740

* tag 'renesas-soc-for-v4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: Enable PM and PM_GENERIC_DOMAINS for SoCs with PM Domains
  ARM: shmobile: emev2: Move declaration of emev2_smp_ops to emev2.h
  ARM: shmobile: emev2: Remove legacy machine_desc.map_io() callback
  ARM: shmobile: r8a7740: Remove legacy machine_desc.map_io() callback
  ARM: shmobile: r8a7740: Remove mapping of L2 cache controller registers
  ARM: shmobile: r8a7740: Migrate to generic l2c OF initialization
2016-02-26 22:39:45 +01:00
Arnd Bergmann b43aa5c01b Merge tag 'v4.5-next-soc' of https://github.com/mbgg/linux-mediatek into next/soc
Merge "ARM: mediatek: soc updates for v4.6" from Matthias Brugger:

Fix state machine implemenation of PMIC wrapper.
Add SMP support for mt7623.
Disable watchdog of STAUPD in PMIC wrapper for mt8173.
Add SMP support for mt2701.
Use builtin_platform_driver for scpsys. Driver can't be build as module.
Fix regulator enablement in scpsys.

* tag 'v4.5-next-soc' of https://github.com/mbgg/linux-mediatek:
  soc: mediatek: SCPSYS: Fix double enabling of regulators
  soc: mediatek: SCPSYS: use builtin_platform_driver
  ARM: mediatek: add mt2701 smp bringup code
  soc: mediatek: PMIC wrap: clear the STAUPD_TRIG bit of WDT_SRC_EN
  ARM: mediatek: add MT7623 smp bringup code
  soc: mediatek: PMIC wrap: Clear the vldclr if state machine stay on FSM_VLDCLR state.
2016-02-26 22:27:22 +01:00
Michal Simek 8fff2f752f ARM: zynq: Move early printk virtual address to vmalloc area
The patch
"ARM: 8432/1: move VMALLOC_END from 0xff000000 to 0xff800000"
(sha1: 6ff0966052)
has moved also start of VMALLOC area because size didn't change.
That's why origin location of vmalloc was
   vmalloc : 0xf0000000 - 0xff000000   ( 240 MB)
and now is
   vmalloc : 0xf0800000 - 0xff800000   ( 240 MB)

That's why uart virtual addresses need to be changed to reflect this new
memory setup. Starting address should be vmalloc start address.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2016-02-25 14:06:03 +01:00
Lars Persson 5255034d17 ARM: mach-artpec: add entry to MAINTAINERS
Signed-off-by: Lars Persson <larper@axis.com>
Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Olof Johansson <olof@lixom.net>
2016-02-24 13:57:51 -08:00
Lars Persson 590b460c3e arm: initial machine port for artpec-6 SoC
Basic machine port for the Artpec-6 SoC from Axis
Communications.

Signed-off-by: Lars Persson <larper@axis.com>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Olof Johansson <olof@lixom.net>
2016-02-24 13:55:47 -08:00
Olof Johansson 6ba1c64cd2 Merge tag 'stm32-soc-for-v4.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mcoquelin/stm32 into next/soc
Highlights:
-----------
 - Make STM32 to select PINCTRL
 - Introduce MACH_STM32F429 flag

* tag 'stm32-soc-for-v4.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mcoquelin/stm32:
  ARM: mach-stm32: Select pinctrl
  ARM: Kconfig: Introduce MACH_STM32F429 flag

Signed-off-by: Olof Johansson <olof@lixom.net>
2016-02-24 13:47:45 -08:00
Peter Ujfalusi 2137d54d16 ARM: davinci: dm646x: Add dma_slave_map to edma
Provide the dma_slave_map to edma which will allow us to move the drivers
to the new, simpler dmaengine API and we can remove the DMA resources also
for the devices.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
[nsekhar@ti.com: fix typos in code]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2016-02-22 15:55:27 +05:30
Peter Ujfalusi a4f86c55b9 ARM: davinci: dm644x: Add dma_slave_map to edma
Provide the dma_slave_map to edma which will allow us to move the drivers
to the new, simpler dmaengine API and we can remove the DMA resources also
for the devices.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
[nsekhar@ti.com: typo fixes in code]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2016-02-22 15:53:34 +05:30
Peter Ujfalusi 0c750e1fe4 ARM: davinci: dm365: Add dma_slave_map to edma
Provide the dma_slave_map to edma which will allow us to move the drivers
to the new, simpler dmaengine API and we can remove the DMA resources also
for the devices.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2016-02-22 15:51:33 +05:30
Peter Ujfalusi f7a3be503f ARM: davinci: dm355: Add dma_slave_map to edma
Provide the dma_slave_map to edma which will allow us to move the drivers
to the new, simpler dmaengine API and we can remove the DMA resources also
for the devices.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
[nsekhar@ti.com: typo fixes in code]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2016-02-22 15:49:51 +05:30
Peter Ujfalusi 1ce9300bf7 ARM: davinci: devices-da8xx: Add dma_slave_map to edma
Provide the dma_slave_map to edma which will allow us to move the drivers
to the new, simpler dmaengine API and we can remove the DMA resources also
for the devices.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
[nsekhar@ti.com: fix map for edma1]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2016-02-22 15:39:39 +05:30
Geert Uytterhoeven 71d076ceb2 ARM: shmobile: Enable PM and PM_GENERIC_DOMAINS for SoCs with PM Domains
All supported Renesas ARM SoCs (except for Emma Mobile EV2) have clock
domains. Some SoCs also have power domains. To ensure proper operation
of on-SoC modules, module clocks must be ungated, and power domains must
be powered up when needed.

Currently the user can choose to build a kernel with power management
enabled or disabled:
  - If CONFIG_PM=y, power domains and/or module clocks are handled
    dynamically by Runtime PM and the generic power domain.
  - If CONFIG_PM=n, power domains are assumed to be powered up by reset
    state or by the boot loader, and module clocks are handled by the
    legacy clock domain on driver (un)bind.
    The latter is implemented using a platform bus notifier, which
    applies not only to all on-SoC devices, but to all platform devices
    present in the system.

To remove the dependency on implicit assumptions, and to get rid of the
peculiarities of the legacy clock domain, enable CONFIG_PM and
CONFIG_PM_GENERIC_DOMAINS unconditionally, for all Renesas ARM SoCs with
clock and/or power domains.

This does cause an increase in kernel size.  Given bloat-o-meter reports
a modest increase of 26 KiB for an RZ/A1H kernel, this should not be a
problem, even when used on RZ/A1H with XIP and internal RAM only.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-19 14:52:41 +09:00
Geert Uytterhoeven c58b31aa46 ARM: shmobile: emev2: Move declaration of emev2_smp_ops to emev2.h
make C=1:

    arch/arm/mach-shmobile/smp-emev2.c:51:29: warning: symbol 'emev2_smp_ops' was not declared. Should it be static?

To fix this, move the forward declaration of emev2_smp_ops to a header
file, and include it where appropriate.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-19 14:45:31 +09:00
Geert Uytterhoeven 247ac89b99 ARM: shmobile: emev2: Remove legacy machine_desc.map_io() callback
Commit FIXME ("ARM: shmobile: Consolidate SCU mapping code") removed the
last user of the static mapping on emev2-based systems.  Remove the
mapping and the legacy machine_desc.map_io() callback.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-19 14:45:30 +09:00
Geert Uytterhoeven f5757b9af8 ARM: shmobile: r8a7740: Remove legacy machine_desc.map_io() callback
Commit 37201ba5c99d0be8 ("ARM: shmobile: r8a7740: Migrate to generic l2c
OF initialization") removed the last user of the legacy "IOMEM()" macro
on r8a7740-based systems. Hence there's no longer a need to set up a
transparent mapping of system I/O registers. Remove the mapping and the
legacy machine_desc.map_io() callback.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-19 14:45:30 +09:00
Geert Uytterhoeven c4be044abc ARM: shmobile: r8a7740: Remove mapping of L2 cache controller registers
Now all r8a7740-based platforms have been migrated to the generic l2c OF
initialization, it's no longer needed to map the L2 cache controller
registers from .map_io().

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-19 14:45:30 +09:00
Geert Uytterhoeven 4a6cc50151 ARM: shmobile: r8a7740: Migrate to generic l2c OF initialization
Migrate the generic r8a7740 platform from calling l2x0_of_init() to the
generic l2c OF initialization.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-19 14:45:29 +09:00
Josh Cartwright 6ded93a119 ARM: zynq: address L2 cache data corruption
The Zynq has a bug where the L2 cache will return invalid data in some
circumstances unless the L2C_RAM register is set to 0x00020202 before the first
enabling of the L2 cache.

The Xilinx-recommended solution to this problem is to ensure that early one of
the earlier bootstages correctly initialize L2C_RAM, however, this issue wasn't
discovered and fixed until after their EDK/SDK 14.4 release.  For systems built
prior to that, and which lack field-upgradable bootloaders, this issue still
exists and silent data corruption can be seen in the wild.

Fix these systems by ensuring L2C_RAM is properly initialized at the
earliest convenient moment prior to the L2 being brought up, which is
when the SLCR is first mapped.

The Zynq bug is described in more detail by Xilinx AR# 54190 as quoted
below.

Xilinx AR# 54190
http://www.xilinx.com/support/answers/54190.htm
Captured on 2014-09-24 14:43 -0500

  = Description =
  For proper L2 cache operation, the user code must program the
  slcr.L2C_RAM register (address 0xF800_0A1C) to the value of
  0x0002_0202 before enabling the L2 cache. The reset value
  (0x0001_0101) might cause, very infrequently, the L2 cache to return
  invalid data.

  = Solution =
  It is up to the user code (FSBL or other user code) to set the
  slcr.L2C_RAM register to the value 0x0002_0202 before enabling the L2
  cache.

  Note: The L2 cache is disabled after reset and is not enabled by the
  BootROM.

  Note: The slcr.l2C_RAM register was previously reserved. It is added
  in the Zynq-7000 AP SoC Technical Reference Manual (TRM) v1.5 as
  "Reserved".

Thanks to Jaeden Amero for initial debugging and triage efforts.

Signed-off-by: Josh Cartwright <joshc@ni.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-02-09 10:18:12 +01:00
Josh Cartwright 9388187fd7 ARM: zynq: initialize slcr mapping earlier
In preparation for performing additional configuration prior to bringing
up L2, move the slcr initialization earlier in the boot process.

Signed-off-by: Josh Cartwright <joshc@ni.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-02-09 10:18:11 +01:00
Olof Johansson 7436cf625e Merge tag 'mvebu-drivers-4.6-1' of git://git.infradead.org/linux-mvebu into next/soc
mvebu driver for 4.6 (part 1)

implement ARM delay timer for orion

* tag 'mvebu-drivers-4.6-1' of git://git.infradead.org/linux-mvebu:
  ARM: orion: implement ARM delay timer

Signed-off-by: Olof Johansson <olof@lixom.net>
2016-02-08 13:54:16 -08:00
Mans Rullgard 0c5325466d ARM: debug: add support for Palmchip BK-310x UART
Some SoCs use a Palmchip BK-310x UART which is mostly 16550 compatible
but with a different register layout. While this UART has previously
only been supported in MIPS based chips (Alchemy, Ralink), the ARM based
SMP87xx series from Sigma Designs also uses it.

This patch allows the debug console to work with this type of UART.

Signed-off-by: Mans Rullgard <mans@mansr.com>
Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2016-02-08 13:52:34 -08:00
Linus Torvalds 388f7b1d6e Linux 4.5-rc3 2016-02-07 15:38:30 -08:00
Linus Torvalds c17dfb019d Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson:
 "The first real batch of fixes for this release cycle, so there are a
  few more than usual.

  Most of these are fixes and tweaks to board support (DT bugfixes,
  etc).  I've also picked up a couple of small cleanups that seemed
  innocent enough that there was little reason to wait (const/
  __initconst and Kconfig deps).

  Quite a bit of the changes on OMAP were due to fixes to no longer
  write to rodata from assembly when ARM_KERNMEM_PERMS was enabled, but
  there were also other fixes.

  Kirkwood had a bunch of gpio fixes for some boards.  OMAP had RTC
  fixes on OMAP5, and Nomadik had changes to MMC parameters in DT.

  All in all, mostly the usual mix of various fixes"

* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (46 commits)
  ARM: multi_v7_defconfig: enable DW_WATCHDOG
  ARM: nomadik: fix up SD/MMC DT settings
  ARM64: tegra: Add chosen node for tegra132 norrin
  ARM: realview: use "depends on" instead of "if" after prompt
  ARM: tango: use "depends on" instead of "if" after prompt
  ARM: tango: use const and __initconst for smp_operations
  ARM: realview: use const and __initconst for smp_operations
  bus: uniphier-system-bus: revive tristate prompt
  arm64: dts: Add missing DMA Abort interrupt to Juno
  bus: vexpress-config: Add missing of_node_put
  ARM: dts: am57xx: sbc-am57x: correct Eth PHY settings
  ARM: dts: am57xx: cl-som-am57x: fix CPSW EMAC pinmux
  ARM: dts: am57xx: sbc-am57x: fix UART3 pinmux
  ARM: dts: am57xx: cl-som-am57x: update SPI Flash frequency
  ARM: dts: am57xx: cl-som-am57x: set HOST mode for USB2
  ARM: dts: am57xx: sbc-am57x: fix SB-SOM EEPROM I2C address
  ARM: dts: LogicPD Torpedo: Revert Duplicative Entries
  ARM: dts: am437x: pixcir_tangoc: use correct flags for irq types
  ARM: dts: am4372: fix irq type for arm twd and global timer
  ARM: dts: at91: sama5d4 xplained: fix phy0 IRQ type
  ...
2016-02-07 15:23:20 -08:00