Our prior mode of operation didn't allow nested interrupts
because it makes the interrupt code much simpler. However,
nested interrupts are better for latency.
This code uses the EIEM register to simulate level interrupts
and thus achieve nesting.
Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
This version (relative to the current tree):
o eliminates "while (ticks_elapsed)" loop. It's not needed.
o drop "ticks_elapsed" completely from timer_interrupt().
o Estimates elapsed cycles (based on HZ) to see which kind of
math we want to use to calculate "cycles_remainder".
o Fixes a bug where we would loose a tick if we decided
we wanted to skip one interrupt.
Signed-off-by: Grant Grundler <grundler@parisc-linux.org>
Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
It's just a bit easier to follow and timer code is complex enough.
So far, only tested on A500-5x (64-bit SMP), ie: gettimeoffset() code
hasn't been tested at all.
Signed-off-by: Grant Grundler <grundler@parisc-linux.org>
Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
Use the __raw_spin_lock_flags routine so we can take an interrupt while
spinning. This re-fixes a bug jejb found on 2005-10-20:
CPU0 does a flush_tlb_all holding the vmlist_lock for write.
CPU1 tries a cat of /proc/meminfo which tries to acquire vmlist_lock for read
CPU1 is now spinning with interrupts disabled
CPU0 tries to execute a smp_call_function to flush the local tlb caches
This is now a deadlock because CPU1 is spinning with interrupts disabled and
can never receive the IPI
Signed-off-by: Matthew Wilcox <matthew@wil.cx>
Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
I couldn't find where the itimer was getting started for slave CPUs.
CPU 0 (master) itimer was started in time_init() (arch/parisc/kernel/time.c).
start_cpu_itimer() code was striped from time_init().
Slaves now start their itimer in smp_cpu_init().
This is a first step towards making gettimeoffset() work for SMP.
Next step will be to determine the CR16 (cycle counter)
offsets for each CPU relative to the master (CPU 0).
Signed-off-by: Grant Grundler <grundler@parisc-linux.org>
Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
This isn't likely to be causing problems for other bits of
kernel code. I can't find any other user of CONFIG_HZ outside
of arch specific code.
Signed-off-by: Grant Grundler <grundler@parisc-linux.org>
Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
Rewrite rwlock implementation to avoid various deadlocks in the current
scheme.
Signed-off-by: Matthew Wilcox <matthew@wil.cx>
Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
Russell King pointed out that asm/serial.h is anachronistic and we were
misusing BASE_BAUD. So fix BASE_BAUD for PCI 16550 UARTs, move LASI_BASE_BAUD
into 8250_gsc, and fix the obsolete comment about reserving serial port slots.
Signed-off-by: Matthew Wilcox <matthew@wil.cx>
Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
Stop using PER_LINUX32 to designate processes needing
compaterizing. Convert is_compat_task to use TIF_32BIT and
set TIF_32BIT in binfmt_elf32.c
Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
This patch fixes the pa8800 at a gross level (there are still other
subtle incoherency issues which can still cause crashes and HPMCs).
What it does is try to force eject inequivalent aliases before they
become visible to the L2 cache (which is where we get the incoherence
problems).
A new function (parisc_requires_coherency) is introduced in
asm/processor.h to identify the pa8x00 processors (8800 and 8900)
which have the issue.
Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
Add header for McKinley bus related code. Remove extern decl
of proc_mckinley_root in drivers/parisc/sba_iommu.c
Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
Abstract existing shift register left macros as shift register
right are. This lends itself to a nice clean up of some #ifdef
blocks in entry.S
Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>