a08c1d516f
drm/amdgpu: remove unnecessary check before kfree
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kfree(NULL) is safe and this check is probably not required
Signed-off-by: Maninder Singh <maninder1.s@samsung.com >
Reviewed-by: Vaneet Narang <v.narang@samsung.com >
Reviewed-by: Christian Konig <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2015-06-29 11:21:51 -04:00
5f0b34cc72
drm/amdgpu: use kzalloc for allocating one thing
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Use kzalloc rather than kcalloc(1.. for allocating
one thing.
Signed-off-by: Maninder Singh <maninder1.s@samsung.com >
Reviewed-by: Vaneet Narang <v.narang@samsung.com >
Reviewed-by: Christian Konig <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2015-06-29 11:21:50 -04:00
9a5e8fb1c8
drm/amdgpu: add chunk id validity check
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Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
2015-06-29 11:21:49 -04:00
b8682ac253
drm/amdgpu: fix crash on invalid CS IOCTL
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Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
2015-06-29 11:21:49 -04:00
845253e78a
drm/amdgpu: reset wptr at cp compute resume (v2)
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This patch is to resolve compute hang at resume time.
v2: (agd5f) squash in second fix
Signed-off-by: Sonny Jiang <sonny.jiang@amd.com >
Reviewed-by: Christian König <christian.koenig@amd.com >
2015-06-29 11:21:48 -04:00
dc78330a8e
drm/amdgpu: check VCE feedback and bitstream index
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Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Leo Liu <leo.liu@amd.com >
2015-06-29 11:21:47 -04:00
2f4b936869
drm/amdgpu: make VCE handle check more strict
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Port of radeon commit 29c63fe22achristian.koenig@amd.com >
Reviewed-by: Leo Liu <leo.liu@amd.com >
2015-06-29 11:21:47 -04:00
f1689ec1b0
drm/amdgpu: check VCE relocation buffer range
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port of radeon commit 2fc5703abdchristian.koenig@amd.com >
Reviewed-by: Leo Liu <leo.liu@amd.com >
2015-06-29 11:21:46 -04:00
68fdd3df79
drm/amdgpu: silence invalid error message
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Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Leo Liu <leo.liu@amd.com >
2015-06-29 11:21:45 -04:00
332300b97e
drm/amdgpu: fix wrong type
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Signed-off-by: monk.liu <monk.liu@amd.com >
Reviewed-by: Christian König <christian.koenig@amd.com >
2015-06-29 11:21:45 -04:00
e30590e6e3
drm/amdgpu: print the bo_list in the CS trace point as well
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Signed-off-by: Christian König <christian.koenig@amd.com >
Acked-by: Alex Deucher <aleander.deucher@amd.com >
2015-06-29 11:21:44 -04:00
ec74407ac0
drm/amdgpu: add amdgpu_bo_list_set trace point
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Signed-off-by: Christian König <christian.koenig@amd.com >
Acked-by: Alex Deucher <aleander.deucher@amd.com >
2015-06-29 11:21:43 -04:00
93e3e4385b
drm/amdgpu: add BO map/unmap trace point
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Signed-off-by: Christian König <christian.koenig@amd.com >
Acked-by: Alex Deucher <aleander.deucher@amd.com >
2015-06-29 11:21:43 -04:00
344c19f955
drm/amdgpu: simplify fence debugfs output a bit
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Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Alex Deucher <aleander.deucher@amd.com >
2015-06-29 11:21:42 -04:00
78ad5cdd21
drm/amdgpu: Configure doorbell to maximum slots
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Signed-off-by: Ben Goz <ben.goz@amd.com >
Acked-by: Oded Gabbay <oded.gabbay@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2015-06-29 11:21:40 -04:00
cd06bf687b
drm/amdgpu: Initialize compute sdma and memory from kgd
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v2: add missing MTYPE_NONCACHED enum
Signed-off-by: Ben Goz <ben.goz@amd.com >
Acked-by: Oded Gabbay <oded.gabbay@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2015-06-29 11:21:39 -04:00
e922cfb1c4
drm/amdgpu: fix hpd range check in dce_v8_0_hpd_irq()
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Spotted by Dan Carpenter. This is a slight variant of
his fix.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2015-06-29 11:21:38 -04:00
6d8db6ce23
drm/amdgpu: fix a amdgpu_dpm=0 bug
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Signed-off-by: Sonny Jiang <sonny.jiang@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
2015-06-10 15:05:33 -04:00
633ed3df9a
drm/amdgpu: don't enable/disable display twice on suspend/resume
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We were doing it in the common code and in the IP specific code.
Remove the IP specific code. The common code handles the
ordering properly.
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2015-06-10 14:16:48 -04:00
4802ce1177
drm/amdgpu: fix UVD/VCE VM emulation
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Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
2015-06-10 14:16:48 -04:00
b7a0776949
drm/amdgpu: enable vce powergating
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Enable VCE dpm and powergating. VCE dpm dynamically scales the VCE clocks on
demand.
Signed-off-by: Sonny Jiang <sonny.jiang@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Reviewed-by: Christian König <christian.koenig@amd.com >
2015-06-10 11:54:16 -04:00
b97aab014c
drm/amdgpu/iceland: don't call smu_init on resume
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smu_init allocates buffers and initializes them. It does not
touch the hw. There is no need to do it again on resume. It
should really be part of sw_init (and smu_fini should be part
of sw_fini), but we need the firmware sizes from the other IPs
for firmware loading so we have to wait until sw init is done
for all other IPs.
Reviewed-by: Sonny Jiang <Sonny.Jiang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2015-06-10 09:32:25 -04:00
aaf4ee3c02
drm/amdgpu/tonga: don't call smu_init on resume
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smu_init allocates buffers and initializes them. It does not
touch the hw. There is no need to do it again on resume. It
should really be part of sw_init (and smu_fini should be part
of sw_fini), but we need the firmware sizes from the other IPs
for firmware loading so we have to wait until sw init is done
for all other IPs.
Reviewed-by: Sonny Jiang <Sonny.Jiang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2015-06-10 09:32:19 -04:00
05188312e2
drm/amdgpu/cz: don't call smu_init on resume
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smu_init allocates buffers and initializes them. It does not
touch the hw. There is no need to do it again on resume. It
should really be part of sw_init (and smu_fini should be part
of sw_fini), but we need the firmware sizes from the other IPs
for firmware loading so we have to wait until sw init is done
for all other IPs.
Reviewed-by: Sonny Jiang <Sonny.Jiang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2015-06-10 09:31:26 -04:00
6a00a09e49
drm/amdgpu: update to latest gfx8 golden register settings
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Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2015-06-10 09:13:35 -04:00
Maninder Singh
Christian König
Sonny Jiang
monk.liu
Ben Goz
Alex Deucher