I find myself making this change locally whenever debugging FB reference
counting. Which seems a bit silly.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: David Herrmann <dh.herrmann@gmail.com>
An object property is an id (idr) for a drm mode object. This
will allow a property to be used set/get a framebuffer, CRTC, etc.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
If we continue to use bitmask for type, we will quickly run out of room
to add new types. Split this up so existing part of bitmask range
continues to function as before, but reserve a chunk of the remaining
space for an integer type-id. Wrap this all up in some type-check
helpers to keep the backwards-compat uglyness contained.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
spice-server and downstream code expect that the primary surface
will always have surface_id = 0, while in reality, once allocated, the
surface_id in qxl.ko is NEVER 0. In a dual head environment, all
monitors render portions of the primary surface.
However, when the monitor config events are generated and sent,
the primary surface is only mapped to the correct identifier
(i.e. 0) for the primary head (where crtc index is 0).
The fix is to look at the "primary" flag in the bo and always
use id 0, irrespective of which head is being configured.
[airlied: qxl hw really needs to be fixed to scanout surfaces]
Signed-off-by: Dave Airlie <airlied@redhat.com>
Instead of trying to flip inside the vblank period when
the buffer is idle, offload blocking for idle to a kernel
thread and program the flip directly into the hardware.
v2: add error handling, fix EBUSY handling
v3: add proper exclusive_lock handling
v4: update crtc->primary->fb when the flip actually happens
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Highlights:
- GPUVM opimtizations
- HDMI audio cleanups
- Deep color HDMI support
- more bug fixes, cleanups
* 'drm-next-3.16' of git://people.freedesktop.org/~agd5f/linux: (29 commits)
drm/edid: Add quirk for Sony PVM-2541A to get 12 bpc hdmi deep color.
drm/edid: Parse and handle HDMI deep color modes.
drm/radeon: Limit hdmi deep color bit depth to 12 bpc.
drm/radeon: Setup HDMI_CONTROL for hdmi deep color gcp's (v2)
drm/radeon: fix pll setup for hdmi deep color (v7)
drm/radeon: use hw cts/n values for deep color
drm/radeon: only apply hdmi bpc pll flags when encoder mode is hdmi
drm/radeon/atom: fix dithering on certain panels
drm/radeon: optimize CIK VM handling v2
drm/radeon: optimize SI VM handling
drm/radeon: add define for flags used in R600+ GTT
drm/radeon: rework page flip handling v3
drm/radeon: separate vblank and pflip crtc handling
drm/radeon: split page flip and pending callback
drm/radeon: remove drm_vblank_get|put from pflip handling
drm/radeon: remove (pre|post)_page_flip callbacks
drm/radeon/dp: fix lane/clock setup for dp 1.2 capable devices
drm/radeon: fix typo in radeon_connector_is_dp12_capable()
radeon: Remove useless quirk for zx1/FireGL X1 combo introduced with fdo #7770
vgaswitcheroo: switch the mux to the igp on power down when runpm is enabled
...
The Sony PVM-2541A OLED high precision color display supports
both 10 bpc and 12 bpc hdmi deep color input, but its edid
does not signal any deep color support.
Add a quirk to force it being treated as a 12 bpc panel.
Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Check the HDMI cea block for deep color mode bits. If available,
assign the highest supported bpc for a hdmi display, corresponding
to the given deep color modes.
Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
DCE-4/5/6 can't support more than 12 bpc deep color over hdmi,
so clamp to 12 bpc when a hdmi deep color capable display is
connected. This even makes sense on DCE-8+, which could do up
to 16 bpc, as driving with more than 12 bpc would only waste
video bandwidth as long as we don't support framebuffers with
more than 12 bpc depth.
On pre-DCE4 we clamp hdmi bit depth to 8 bpc, as those asics
don't support hdmi deep color.
Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Program HDMI_CONTROL to send general control packets
for hdmi deep color mode signalling at every video
frame if bpc > 8.
This is only supported on evergreen / DCE-4 and later.
v2: rebase
Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Need to adjust the pll up for deep color modes.
Additionally, the atom bpc defines were wrong in certain
cases.
v2: set the adjusted clock to the pll clock for hdmi deep
color. This fixes display and audio issues with deep color
as reported by Andy Furniss <adf.lists@gmail.com>
v3: set crtc_clock as well
v4: setcrtcinfo on the adjusted mode
v5: just use the adjusted clock for setting the pll
v6: only use the adjusted clock for hdmi
v7: only DCE5 and DCE6 and bpc > 8
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
I'm not really sure how these should be calculated
for deep color. The hw generated values seem to work.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rob Clark
Jani Nikula
David Mansfield
Christian König
Dave Airlie
Mario Kleiner
Alex Deucher