75efdee11b
drm/radeon: implement simple doorbell page allocator
...
The doorbell aperture is a PCI BAR whose pages can be
mapped to compute resources for things like wptrs
for userspace queues.
This patch maps the BAR and sets up a simple allocator
to allocate pages from the BAR.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2013-06-27 10:49:07 -04:00
f93bdefe62
drm/radeon: use callbacks for ring pointer handling (v3)
...
Add callbacks to the radeon_asic struct to handle
rptr/wptr fetchs and wptr updates.
We currently use one version for all rings, but this
allows us to override with a ring specific versions.
Needed for compute rings on CIK.
v2: udpate as per Christian's comments
v3: fix some rebase cruft
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2013-06-27 10:49:07 -04:00
b556b12e82
drm/radeon/cik: add srbm_select function
...
Allows us to select instanced registers based on:
- ME (micro engine
- Pipe
- Queue
- VMID
Switch MC setup to use this new function.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2013-06-26 16:11:51 -04:00
87167bb16d
drm/radeon: add UVD support for CIK (v3)
...
v2: agd5f: fix clock dividers setup for bonaire
v3: agd5f: rebase
Signed-off-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2013-06-26 16:11:50 -04:00
9219ed65d3
drm/radeon: update radeon_atom_get_clock_dividers for CIK
...
CIK uses a slightly different variant of the table structs
and params.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2013-06-26 16:11:50 -04:00
360b1f5e62
drm/radeon: update radeon_atom_get_clock_dividers() for SI
...
SI uses v5 of the command table and uses a different table
for memory PLLs.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2013-06-26 16:11:49 -04:00
6e2c3c0ae7
drm/radeon/cik: add pcie_port indirect register accessors
...
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2013-06-26 16:11:48 -04:00
2c67912c43
drm/radeon: add get_xclk() callback for CIK
...
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2013-06-26 16:11:48 -04:00
1d5d0c3497
drm/radeon: add indirect register accessors for SMC registers
...
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2013-06-26 16:11:47 -04:00
cc066715e6
drm/radeon: update CIK soft reset
...
Update to the newer programming model.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2013-06-26 16:11:46 -04:00
44fa346f7a
drm/radeon: add get_gpu_clock_counter() callback for cik
...
Used for GPU clock counter snapshots.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2013-06-26 16:11:45 -04:00
64f759cc6a
drm/radeon: Update radeon_info_ioctl for CIK (v2)
...
v2: rebase changes, fix a couple missed cases
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2013-06-26 16:11:45 -04:00
c2037ad1e1
drm/radeon: add SS override support for KB/KV
...
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2013-06-26 16:11:44 -04:00
c7d2f227e3
drm/radeon: use frac fb div on DCE8
...
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2013-06-26 16:11:43 -04:00
2f0047b2ba
drm/radeon: Handle PPLL0 powerdown on DCE8
...
Only Bonaire has PPLL0.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2013-06-26 16:11:43 -04:00
0331f6749e
drm/radeon: add support pll selection for DCE8 (v4)
...
v2: make PPLL0 is available for non-DP on CI
v3: rebase changes, update documentation
v4: fix kabini
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2013-06-26 16:11:42 -04:00
8542c12b4c
drm/radeon: update DISPCLK programming for DCE8
...
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2013-06-26 16:11:41 -04:00
aea6564133
drm/radeon/atom: add support for new DVO tables
...
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2013-06-26 16:11:41 -04:00
e68adef824
drm/radeon/atom: add DCE8 encoder support
...
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2013-06-26 16:11:40 -04:00
8da0e50092
drm/radeon/dce8: crtc_set_base updates
...
Some new fields and DESKTOP_HEIGHT register moved.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2013-06-26 16:11:39 -04:00
d798f2f2c3
drm/radeon/dce8: properly handle interlaced timing
...
The register bits changed on DCE8 compared to previous
families.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2013-06-26 16:11:39 -04:00
9e05fa1d24
drm/radeon/cik: add hw cursor support (v2)
...
CIK (DCE8) hw cursors are programmed the same as evergreen
(DCE4) with the following caveats:
- cursors are now 128x128 pixels
- new alpha blend enable bit
v2: rebase
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2013-06-26 16:11:38 -04:00
cd84a27d18
drm/radeon/dce8: add support for display watermark setup
...
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2013-06-26 16:11:37 -04:00
bc19f59704
drm/radeon: update power state parsing for CI
...
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2013-06-26 16:11:36 -04:00
5115020714
drm/radeon: handle the integrated thermal controller on CI
...
No support for reading the temperature yet.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2013-06-26 16:11:36 -04:00
Alex Deucher
Christian König