This patch provides a option for users to enable multi-channel function support
in Blackfin ASoC driver. Because Blackfin is without MMU, it is easy for us and
the user to enable this function at compiling stage not dynamically on the fly.
Signed-off-by: Cliff Cai <cliff.cai@analog.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Fix concurrent capture/playback issue.
The issue is caused by re-initialization of control registers used specifically
for capture or playback in both capture and playback operations.
Signed-off-by: Steve Chen <schen@mvista.com>
Signed-off-by: Naresh Medisetty <naresh@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
A small additional power saving can be achieved for the WM8990 by
maintaining VMID using a 2*250k divider when in standby mode.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Enable a hardware workaround which avoids problems with the clocking of
the ADCs in certain configurations.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Only fully documented registers are cached in the WM8990 but additional
registers exist.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
FGAIN for playback is in range of 0-0x3f, while for capture GAIN it
is in the range of 0-0x1f.
The original value of 128 (0x7f) would modify the CGAIN also for
playback.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Acked-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
The WM8728 is a high performance stereo DAC designed for applications
such as DVD, home theatre and digital TV.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
This reverts commit 8dc840f88d. Christian
Pellegrin <chripell@gmail.com> reported that on some systems the patch
caused DMA to fail which is much more serious than the original skipped
audio issue. Further investigation by Dave shows that the behaviour
depends on the clock speed of the SoC - a better fix is neeeded.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Originally it was put too tight limits to support only 44.1 kHz and 48 kHz
sample rates in McBSP DAI driver. Extend it now to 8 kHz - 96 kHz. With
96 kHz and 2*16 bits, bit clock is 3.072 MHz < 3.125 MHz (I2S max?).
Tested on Nokia N810 with TVL320AIC33 from rates 8 - 96 kHz and on Texas
Instruments Beagle with TWL4030 from rates 8 - 48 kHz.
Signed-off-by: Jarkko Nikula <jarkko.nikula@nokia.com>
Acked-by: Steve Sakoman <steve@sakoman.com>
Acked-by: Arun KS <arunks@mistralsolutions.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
TWL4030 currently supports rates between 8 kHz and 48 kHz and sets the codec
mode register accordingly in twl4030_hw_params. Expose this info so that
ASoC can match other rates than 44.1 kHz or 48 kHz as well.
Signed-off-by: Jarkko Nikula <jarkko.nikula@nokia.com>
Acked-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Fixes swapping of channels at start of stereo playback.
Channel swap can be observed while playing left-only or right-only audio data. The channel
swap is fixed by handling the XSYNCERR condition.
Signed-off-by: Naresh Medisetty <naresh@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
The TI DVEVM board uses the SND_SOC_DAIFMT_CBM_CFM & I2S formats, but the
Lyrtech SFFSDR board uses the SND_SOC_DAIFMT_CBM_CFS & RIGHT-JUSTIFIED formats.
Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Mark Brown
Mike Frysinger
Bryan Wu
Michael Hennerich
Cliff Cai
Naresh Medisetty
Christian Pellegrin
Peter Ujfalusi
Jarkko Nikula
Hugo Villeneuve
Troy Kisky