We don't support the BF535 at all, and the exception 0x2A text specific to
it is pretty verbose and confusing (since the behavior is simply odd), so
punt it to keep the noise down.
Signed-off-by: Yi Li <yi.li@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Make sure we process the kernel command line before poking the hardware,
so that we can process early printk. This helps ensure that if you boot
a kernel configured for a different processor, something will be left in
the log buffer.
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The GPTMR0_CLOCKSOURCE Kconfig option requires the gptimers framework, so
make sure it is selected when this option is enabled.
Reported-by: Peter Meerwald <pmeerw@pmeerw.net>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The BF526-EZBRD changed SDRAM chips between board revisions, so create a
timing table that can accommodate both.
Signed-off-by: Graf Yang <graf.yang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
We defined SDRAM_tRAS to TRAS_4, but then wrongly defined SDRAM_tRAS_num
to 3.
Signed-off-by: Graf Yang <graf.yang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Many aspects of the Blackfin memory map is exactly the same across all
variants. Rather than copy and paste all of these duplicated values in
each header, unify all of these into the common Blackfin memory map header
file. In the process, push down BF561 SMP specific stuff to the BF561
specific header to keep the noise down.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Rather than use "Linux" in the boot image name (as this is redundant --
the image type is already set to "linux"), use the CPU name. This makes
it fairly obvious when a wrong image is accidentally booted. Otherwise
there is no kernel output and you waste time scratching your head
wondering wtf just happened.
Signed-off-by: Robin Getz <rgetz@blackfin.uclinux.org>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The current cache options don't really represent the hardware features.
They end up setting different aspects of the hardware so that the end
result is to turn on/off the cache. Unfortunately, when we hit cache
problems with the hardware, it's difficult to test different settings to
root cause the problem. The current settings also don't cleanly allow for
different caching behaviors with different regions of memory.
So split the configure options such that they properly reflect the settings
that are applied to the hardware.
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The BF526-EZBRD has a SST SPI flash on it, not a ST Micro.
Signed-off-by: Graf Yang <graf.yang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
We read the SWRST (Software Reset) register to get at the last reset
state, and then we may configure the DOUBLE_FAULT bit to control behavior
when a double fault occurs. But if the lower bits of the register is
already set (like UART boot mode on a BF54x), we inadvertently make the
system reset by writing to the SYSTEM_RESET field at the same time. So
make sure the lower 4 bits are always cleared.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Split out the optional IRQ14 lowering code to further simplify the
asm_do_IRQ() function and keep the ifdef nest under control.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Take a page from x86 and abstract the stack checking out of the
asm_do_IRQ() function so that the result is easier to digest.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
With the common IRQ code initializing much more of the irq_desc state, we
can't blindly initialize it ourselves to the local bad_irq state. If we
do, we end up wrongly clobbering many fields. So punt most of the bad irq
code as the common layers will handle the default state, and simply call
handle_bad_irq() directly when the IRQ we are processing is invalid.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The BF533-EZKIT has two Flash In-System Programming devices hooked up to
the async memory bus, so add resources for the primary flashes and the
SRAMs on the devices.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger
Yi Li
Robin Getz
Graf Yang
Robin Getz
Jie Zhang
Philippe Gerum
Sonic Zhang