Commit Graph

376938 Commits

Author SHA1 Message Date
Florian Fainelli 4df715aaf5 MIPS: BMIPS: support booting from physical CPU other than 0
BMIPS43xx CPUs have two hardware threads, and on some SoCs such as 3368,
the bootloader has configured the system to boot from TP1 instead of the
more usual TP0. Create the physical to logical CPU mapping to cope with
that, do not remap the software interrupts to be cross CPUs such that we
do not have to do use the logical CPU mapping further down the code, and
finally, reset the slave TP1 only if booted from TP0.

Signed-off-by: Jonas Gorski <jogo@openwrt.org>
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: blogic@openwrt.org
Cc: cernekee@gmail.com
Patchwork: https://patchwork.linux-mips.org/patch/5553/
Patchwork: https://patchwork.linux-mips.org/patch/5556/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-01 15:10:57 +02:00
David Daney 3ddc14add5 MIPS: Only set cpu_has_mmips if SYS_SUPPORTS_MICROMIPS
As Jonas Gorske said in his patch:

   Disable cpu_has_mmips for everything but SEAD3 and MALTA. Most of
   these platforms are from before the micromips introduction, so they
   are very unlikely to implement it.

   Reduces an -Os compiled, uncompressed kernel image by 8KiB for
   BCM63XX.

This patch taks a different approach than his, we gate the runtime
test for microMIPS by the config symbol SYS_SUPPORTS_MICROMIPS.

Signed-off-by: David Daney <david.daney@cavium.com>
Cc: Jonas Gorski <jogo@openwrt.org>
Cc: Steven J. Hill <Steven.Hill@imgtec.com>
Acked-by: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5327/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-01 15:10:57 +02:00
Tony Wu c214c03512 MIPS: GIC: Fix gic_set_affinity infinite loop
There is an infinite loop in gic_set_affinity. When irq_set_affinity
gets called on gic controller, it blocks forever.

Signed-off-by: Tony Wu <tung7970@gmail.com>
Cc: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5537/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-01 15:10:56 +02:00
David Daney 8dfdd02a4c MIPS: Don't save/restore OCTEON wide multiplier state on syscalls.
The ABI allows these to be clobbered on syscalls, so only save and
restore the multiplier state when the temporary registers need to be
preserved.

Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Cc: David Daney <david.daney@cavium.com>
Patchwork: https://patchwork.linux-mips.org/patch/5540/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-01 15:10:56 +02:00
Aaro Koskinen a135a9b5d9 MIPS: Octeon: Enable interfaces on EdgeRouter Lite
Enable interfaces on EdgeRouter Lite. Tested with cavium_octeon_defconfig
and busybox shell. DHCP & ping works with eth0, eth1 and eth2.

The board type "UBNT_E100" is taken from the sources of the vendor kernel
shipped with the product.

Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Acked-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5546/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-01 15:10:56 +02:00
Jayachandran C 6ba045f9fb MIPS: Move generated code to .text for microMIPS
Prepare of a next patch which will call tlbmiss_handler_setup_pgd on
microMIPS. MicroMIPS complains if the called code s not in the .text
section. To fix this we generate code into space reserved in
arch/mips/mm/tlb-funcs.S

While there, move the rest of the generated functions (handle_tlbl,
handle_tlbs, handle_tlbm) to the same file.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5542/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-01 15:10:56 +02:00
Ralf Baechle 1990e5429c MIPS: Get rid of MIPS I flag and test macros.
MIPS I is the ancestor of all MIPS ISA and architecture variants.  Anything
ever build in the MIPS empire is either MIPS I or at least contains MIPS I.
If it's running Linux, that is.

So there is little point in having cpu_has_mips_1 because it will always
evaluate as true - though usually only at runtime.  Thus there is no
point in having the MIPS_CPU_ISA_I ISA flag, so get rid of it.

Little complication: traps.c was using a test for a pure MIPS I ISA as
a test for an R3000-style cp0.  To deal with that, use a check for
cpu_has_3kex or cpu_has_4kex instead.

cpu_has_3kex is a new macro.  At the moment its default implementation is
!cpu_has_4kex but this may eventually change if Linux is ever going to
support the oddball MIPS processors R6000 and R8000 so users of either
of these macros should not make any assumptions.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/5551/
2013-07-01 15:10:56 +02:00
Ralf Baechle 0dad5d2622 MIPS: Malta: Move platform-specific PCI code to arch/mips/pci.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-01 15:10:55 +02:00
Ralf Baechle f69df6d33c MIPS: Sibyte: Fix comment.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-01 15:10:55 +02:00
Ralf Baechle a7543d6003 MIPS: Sibyte: Remove duplicate but harmless line from Platform file.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-01 15:10:55 +02:00
David Daney 1afb49d0e6 MIPS: Update cavium_octeon_defconfig
The serial port changes make it advisable to enable the proper UART
drivers.

Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Cc: Jamie Iles <jamie@jamieiles.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Jiri Slaby <jslaby@suse.cz>
Cc: linux-serial@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/5518/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-01 15:10:55 +02:00
David Daney fde179901e MIPS: OCTEON: Remove custom serial setup code.
We will use 8250_dw instead.

Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Cc: Jamie Iles <jamie@jamieiles.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Jiri Slaby <jslaby@suse.cz>
Cc: linux-serial@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/5517/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-01 15:10:55 +02:00
David Daney d5f1af7ece tty/8250_dw: Add support for OCTEON UARTS.
A few differences needed by OCTEON:

o These are DWC UARTS, but have USR at a different offset.

o Internal SoC buses require reading back from registers to maintain
  write ordering.

o 8250 on OCTEON appears with 64-bit wide registers, so when using
  readb/writeb in big endian mode we have to adjust the membase to hit
  the proper part of the register.

o No UCV register, so we hard code some properties.

Because OCTEON doesn't have a UCV register, I change where
dw8250_setup_port(), which reads the UCV, is called by pushing it in
to the OF and ACPI probe functions, and move unchanged
dw8250_setup_port() earlier in the file.

Signed-off-by: David Daney <david.daney@cavium.com>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Cc: linux-mips@linux-mips.org
Cc: Jamie Iles <jamie@jamieiles.com>
Cc: Jiri Slaby <jslaby@suse.cz>
Cc: linux-serial@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/5516/
Acked-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-01 15:10:54 +02:00
David Daney 5219343f83 MIPS: OCTEON: Set proper UART clock in internal device trees.
Following patch to use generic 8250 drivers will need proper clock
information.  So when using the internal device tree, populate the
"clock-frequency" property with the correct value.

Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Cc: Jamie Iles <jamie@jamieiles.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Jiri Slaby <jslaby@suse.cz>
Cc: linux-serial@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/5515/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-01 15:10:54 +02:00
Florian Fainelli 450acb0b12 MIPS: BCM63XX: add support for the Netgear CVG834G
Add support for the Netgear CVG834G and enable the two UARTs, Ethernet
on the first MAC, PCI and the two leds.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: cernekee@gmail.com
Cc: jogo@openwrt.org
Cc: Florian Fainelli <florian@openwrt.org>
Patchwork: https://patchwork.linux-mips.org/patch/5502/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-01 15:10:54 +02:00
Florian Fainelli 0b35f0c59a MIPS: BCM63XX: let board specify an external GPIO to reset PHY
Some boards may need to reset their external PHY or switch they are
attached to, add a hook for doing this along with providing custom
linux/gpio.h flags for doing this.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: cernekee@gmail.com
Cc: jogo@openwrt.org
Cc: Florian Fainelli <florian@openwrt.org>
Patchwork: https://patchwork.linux-mips.org/patch/5501/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-01 15:10:54 +02:00
Florian Fainelli 0680dc866d MIPS: BCM63XX: provide a MAC address for BCM3368 chips
The BCM3368 SoC uses a NVRAM format which is not compatible with the one
used by CFE, provide a default MAC address which is suitable for use and
which is the default one also being used by the bootloader on these
chips.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: cernekee@gmail.com
Cc: jogo@openwrt.org
Patchwork: https://patchwork.linux-mips.org/patch/5498/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-01 15:10:54 +02:00
Florian Fainelli d753601a2a MIPS: BCM63XX: recognize Cable Modem firmware format
Add the firmware header format which is used by Broadcom Cable Modem
SoCs such as the BCM3368 SoC. We export the bcm_hcs firmware format
structure because it is used by user-land tools to create firmware
images for these SoCs and will later be used by a corresponding MTD
parser.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: cernekee@gmail.com
Cc: jogo@openwrt.org
Patchwork: https://patchwork.linux-mips.org/patch/5496/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-01 15:10:53 +02:00
Florian Fainelli 7b9334215f MIPS: BCM63XX: add support for BCM3368 Cable Modem
The Broadcom BCM3368 Cable Modem SoC is extremely similar to the
existing BCM63xx DSL SoCs, in particular BCM6358, therefore little effort
in the existing code base is required to get it supported. This patch adds
support for the following on-chip peripherals:

- two UARTS
- GPIO
- Ethernet
- SPI
- PCI
- NOR Flash

The most noticeable difference with 3368 is that it has its peripheral
register at 0xfff8_0000 we check that separately in ioremap.h. Since
3368 is identical to 6358 for its clock and reset bits, we use them
verbatim.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: cernekee@gmail.com
Cc: jogo@openwrt.org
Patchwork: https://patchwork.linux-mips.org/patch/5499/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-01 15:10:53 +02:00
Florian Fainelli ae8de61c72 MIPS: BCM63XX: select BOOT_RAW
Enabling BOOT_RAW is mandatory to get a binary image (objcopy from ELF
to binary) to work. This does not affect the ELF kernels which are used
by CFE on BCM63XX DSL platforms, but is going to be necessary to support
BCM63XX on Cable Modem chips such as BCM3368.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: cernekee@gmail.com
Cc: jogo@openwrt.org
Patchwork: https://patchwork.linux-mips.org/patch/5500/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-01 15:10:53 +02:00
Paul Gortmaker 169c3c164f MIPS: Delete Wind River ppmc eval board support.
This board has been EOL for many years now; lets not burden people doing
build coverage and other tree wide work with working on essentially dead
files.

[ralf@linux-mips.org: Also remove arch/mips/include/asm/mach-wrppmc/war.h.]

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Cc: linux-mips@linux-mips.org
Cc: Paul Gortmaker <paul.gortmaker@windriver.com>
Patchwork: http://patchwork.linux-mips.org/patch/5503/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-01 15:10:53 +02:00
Ralf Baechle 5a772eee55 MIPS: fcntl.h: Use __kernel_off_t, not off_t.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-01 15:10:53 +02:00
Ralf Baechle a932fec84c MIPS: Use proper include guard symbol for <uapi/asm/fcntl.h>.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-01 15:10:52 +02:00
Jonas Gorski 4b54f06522 MIPS: remove alloc_pci_controller prototype
Commit 610019badd ("[MIPS] Remove unused
function alloc_pci_controller.") removed the function, but left the
prototype in the header file.

Remove it as well so people don't get tempted to use it and wonder why
it doesn't work.

Signed-off-by: Jonas Gorski <jogo@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5473/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-01 15:10:52 +02:00
Jonas Gorski d6e3469832 MIPS: BCM63XX: select BMIPS4350 and default to 2 CPUs for supported SoCs
All BCM63XX SoCs starting with BCM6358 have a BMIPS4350 instead of a
BMIPS3300, so select it unless support for any of the older SoCs is
selected.
All BMIPS4350 have only two CPUs, so select the appropriate default.

Signed-off-by: Jonas Gorski <jogo@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: John Crispin <blogic@openwrt.org>
Cc: Maxime Bizon <mbizon@freebox.fr>
Cc: Florian Fainelli <florian@openwrt.org>
Cc: Kevin Cernekee <cernekee@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/5355/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-01 15:10:52 +02:00