Commit Graph

535671 Commits

Author SHA1 Message Date
Chunming Zhou 23ca0e4e47 drm/amdgpu: add kernel ctx support (v2)
v2: rebase against kfd changes

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Christian K?nig <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17 16:50:36 -04:00
Chunming Zhou 4274f5d45c drm/amdgpu: prepare job before push to sw queue for pte ring
user mode will still use pte ring as a normal ring.
if the prepare job generates another command(update pte) on its ring in scheduler,
then will kill scheduler which is going to waiting later job but pending running job.

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Christian K?nig <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17 16:50:36 -04:00
Chunming Zhou 4b559c90bc drm/amdgpu: make sure the fence is emitted before ring to get it.
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Christian K?nig <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17 16:50:35 -04:00
Chunming Zhou b43a9a7e87 drm/amdgpu: use scheduler user seq instead of previous user seq
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Christian K?nig <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17 16:50:35 -04:00
Chunming Zhou 049fc527b4 drm/amdgpu: dispatch jobs in cs
BO validation is moved to scheduler except usrptr which must be validated
in user process

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Christian K?nig <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17 16:50:34 -04:00
Chunming Zhou 372bc1e18c drm/amdgpu: add bo list copy
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Christian K?nig <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17 16:50:33 -04:00
Chunming Zhou c1b69ed0c6 drm/amdgpu: add backend implementation of gpu scheduler (v2)
v2: fix rebase breakage

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Christian K?nig <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17 16:50:33 -04:00
Chunming Zhou 2c4888a0d3 drm/amdgpu: disable hw semaphore with scheduler
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Christian K?nig <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17 16:50:32 -04:00
Chunming Zhou 9cb7e5a91f drm/amdgpu: add context entity init
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Christian K?nig <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17 16:50:32 -04:00
Alex Deucher b80d8475c1 drm/amdgpu: add scheduler initialization
1. Add kernel parameter option, default 0
2. Add scheduler initialization for amdgpu

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Acked-by: Christian K?nig <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17 16:50:31 -04:00
Jammy Zhou a72ce6f841 drm/amd: add basic scheduling framework
run queue:
A set of entities scheduling commands for the same ring. It
implements the scheduling policy that selects the next entity to
emit commands from.

entity:
A scheduler entity is a wrapper around a job queue or a group of
other entities. This can be used to build hierarchies of entities.
For example all job queue entities belonging to the same process
may be placed in a higher level entity and scheduled against other
process entities.
Entities take turns emitting jobs from their job queue to the
corresponding hardware ring, in accordance with the scheduler policy.

Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Acked-by: Christian K?nig <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17 16:50:30 -04:00
David Zhang 2da78e21d1 drm/amdgpu: Enable the Fiji DID 0x7300 support
Signed-off-by: David Zhang <david1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-17 16:50:30 -04:00
Alex Deucher d07f5c4c23 drm/amdgpu: remove VM workaround for Fiji
The bug is fixed in fiji.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17 16:50:29 -04:00
Alex Deucher 188a9bcd6c drm/amdgpu: add support for VCE 3.x on Fiji
VCE on fiji is single pipe only.

Reviewed-by: David Zhang <david1.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17 16:50:29 -04:00
David Zhang 974ee3db0f drm/amdgpu: Add Fiji support to the UVD 6.0 IP module
Signed-off-by: David Zhang <david1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-17 16:50:28 -04:00
David Zhang 1a5bbb6695 drm/amdgpu: Add Fiji support to the SDMA 3.0 IP module
Signed-off-by: David Zhang <david1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-17 16:50:27 -04:00
David Zhang af15a2d51d drm/amdgpu: Add Fiji support to the GFX 8.0 IP module (v2)
v2: agd5f: fix the rb setup.

Signed-off-by: David Zhang <david1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-17 16:50:27 -04:00
David Zhang 843908604d drm/amdgpu: Add Fiji support to the DCE 10.0 IP module (v2)
v2: agd5f: fix up XDMA golden settings

Signed-off-by: David Zhang <david1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-17 16:50:26 -04:00
David Zhang 8e711e1a1a drm/amdgpu: Add Fiji support to SMC and DPM (v2)
v2: agd5f: prepare for release

Signed-off-by: David Zhang <david1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-17 16:50:26 -04:00
David Zhang d1c4dcfb76 drm/amdgpu: Add Fiji smu 7.1.3 headers (v2)
v2: agd5f: prepare for release

Signed-off-by: David Zhang <david1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-17 16:50:25 -04:00
David Zhang aa8a3b5395 drm/amdgpu: Add Fiji support to IH module
Signed-off-by: David Zhang <david1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-17 16:50:24 -04:00
David Zhang 127a262853 drm/amdgpu: Add Fiji support to the GMC 8.5 IP module
Signed-off-by: David Zhang <david1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-17 16:50:24 -04:00
David Zhang 48299f95f7 drm/amdgpu: Add Fiji DID 0x7300 common support
Signed-off-by: David Zhang <david1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-17 16:50:23 -04:00
Alex Deucher 41548ef78b drm/amdgpu: handle conditional support for CIK properly
gfx7 support is not necessary or available if CIK support
is not enabled.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17 16:50:23 -04:00
monk.liu e60b344f6c drm/amdgpu: optimize amdgpu_parser_init
use kmalloc_array instead of kcalloc where appropriate and other
cleanups.

Signed-off-by: monk.liu <monk.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-17 16:50:22 -04:00