Commit Graph

218404 Commits

Author SHA1 Message Date
Chris Wilson 0f8c6d7ca9 drm/i915: Move the invalidate|flush information out of the device struct
... and into a local structure scoped for the single function in which
it is used.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-01 12:38:44 +00:00
Chris Wilson 13b2928933 drm/i915: Apply big hammer to serialise buffer access between rings
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-01 12:31:19 +00:00
Chris Wilson e5c6526036 drm/i915/debugfs: Report ring in error state
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-01 12:08:05 +00:00
Chris Wilson 100519e2f1 agp/intel: the GMCH is always enabled for integrated processor graphics
... and trying to set the bit is ineffectual.

Fixes the regression from e380f60 which detected that we were trying to
do undefined operations on the I830_GMCH_CTRL.

Reported-by: Alexey Fisher <bug-track@fisher-privat.net>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-31 12:31:31 +00:00
Chris Wilson 5eac3ab459 drm/i915: Evict just the purgeable GTT entries on the first pass
Take two passes to evict everything whilst searching for sufficient free
space to bind the batchbuffer. After searching for sufficient free space
using LRU eviction, evict everything that is purgeable and try again.
Only then if there is insufficient free space (or the GTT is too badly
fragmented) evict everything from the aperture and try one last time.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-31 12:31:30 +00:00
Chris Wilson ff75b9bc48 drm/i915: Fix typo from e5281ccd in i915_gem_attach_phys_object()
Accessing the uninitialised obj->pages instead of the local page lead to
an OOPs.

Reported-by: Xavier Chantry <chantry.xavier@gmail.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-30 22:52:31 +01:00
Chris Wilson add354ddf6 drm/i915: Record BSD engine error state
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-29 22:19:21 +01:00
Chris Wilson 6aa56062ea drm/i915/ringbuffer: Use the HEAD auto-reporting mechanism
My Sandybridge only reports 0 for the ring buffer registers, causing it
to hang as soon as we exhaust the available ring. As a workaround, take
advantage of our huge ring buffers and use the auto-reporting mechanism
to update the status page with the HEAD location every 64 KiB.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-29 21:49:41 +01:00
Chris Wilson f4e0b29bf2 drm/i915: Check if the GPU hung whilst waiting for the ring to clear
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-29 21:06:16 +01:00
Chris Wilson 6dda569fe0 drm/i915: Switch to using pci_iounmap in conjunction with pci_iomap
After switching the MMIO registers to use pci_iomap, remember to dispose
of the mapping with pci_iounmap (for symmetry).

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-29 21:02:18 +01:00
Chris Wilson 4066c0ae13 drm/i915/debugfs: Display the contents of the BLT and BSD status pages
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-29 21:00:54 +01:00
Chris Wilson e380f60b22 agp/intel: Sandybridge doesn't require GMCH enabling
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-29 20:30:44 +01:00
Chris Wilson c584fe47e4 drm/i915/ringbuffer: Remove duplicate initialisation of ring control
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-29 20:22:06 +01:00
Chris Wilson 1d8f38f4e7 drm/i915: Record BLT engine error state
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-29 19:22:13 +01:00
Chris Wilson 33626e6a08 drm/i915/ringbuffer: Disable the ringbuffer on cleanup.
It should be idle on cleanup anyway...

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-29 19:00:43 +01:00
Chris Wilson 872d860c85 drm/i915: Remove the duplicate domain-change tracepoint for GPU flush
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-29 11:15:54 +01:00
Chris Wilson a00b10c360 drm/i915: Only enforce fence limits inside the GTT.
So long as we adhere to the fence registers rules for alignment and no
overlaps (including with unfenced accesses to linear memory) and account
for the tiled access in our size allocation, we do not have to allocate
the full fenced region for the object. This allows us to fight the bloat
tiling imposed on pre-i965 chipsets and frees up RAM for real use. [Inside
the GTT we still suffer the additional alignment constraints, so it doesn't
magic allow us to render larger scenes without stalls -- we need the
expanded GTT and fence pipelining to overcome those...]

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-29 11:15:07 +01:00
Chris Wilson 7465378fd7 drm/i915: Convert BUG_ON(pin_count) from an impossible condition
Also spotted by Dan Carpenter.

obj->pin_count is unsigned so the BUG_ON(obj->pin_count<0) will never
trigger.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-29 10:54:29 +01:00
Chris Wilson bbe2e11a4b drm/i915: Do not return -1 from shrinker when nr_to_scan == 0
The error code is only expected during the actual pruning and not during
the first measurement (nr_to_scan == 0) pass.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-28 22:35:07 +01:00
Chris Wilson 4a684a4117 drm/i915: Kill GTT mappings when moving from GTT domain
In order to force a page-fault on a GTT mapping after we start using it
from the GPU and so enforce correct CPU/GPU synchronisation, we need to
invalidate the mapping.

Pointed out by Owain G. Ainsworth.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-28 20:55:03 +01:00
Chris Wilson e5281ccd2e drm/i915: Eliminate nested get/put pages
By using read_cache_page() for individual pages during pwrite/pread we
can eliminate an unnecessary large allocation (and immediate free) of
obj->pages. Also this eliminates any potential nesting of get/put pages,
simplifying the code and preparing the path for greater things.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-28 20:55:02 +01:00
Chris Wilson 39a01d1fb6 drm/i915: Remove mmap_offset
Since we rarely use the mmap_offset and it is easily computable from the
obj->map_list.hash, remove it.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-28 20:55:02 +01:00
Chris Wilson 17250b7155 drm/i915: Make the inactive object shrinker per-device
Eliminate the racy device unload by embedding a shrinker into each
device. Smaller, simpler code.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-28 20:55:01 +01:00
Chris Wilson 176f28ebf4 drm/i915/ringbuffer: Check that we setup the ringbuffer
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-28 12:33:17 +01:00
Chris Wilson b4ce0f8515 drm/i915: Use pci_iomap for remapping the MMIO registers.
Play safe and use the common routines which take care of the cachability
of the memory when setting up the iomapping for the PCI registers.
Whilst they should be cacheable for the current generations, actually
honouring what the device requires is a better long term strategy.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-28 11:26:06 +01:00