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Merge tag 'late-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Browse Source 
Pull ARM SoC i.MX DT changes from Olof Johansson:
 "This branch contains of devicetree changes for the Freescale i.MX
  platform.

  The base patch of the branch changes the format of the dts files to a
  slightly different format that makes it easier to do derivative board
  definitions, but it also introduces a lot of churn in the process
  since every line of the file is touched.

  On top of that are a handful of the regular changes; enabling more
  boards as DT-based instead of legacy board files (mx25pdk), enabling
  another driver for devicetree and thus adding bindings (onewire), etc.

  I'm not happy about the churn, and will likely not take it for other
  platforms in the future."

* tag 'late-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (21 commits)
  ARM: dts: add dtsi for imx6q and imx6dl
  ARM: dts: rename imx6q.dtsi to imx6qdl.dtsi
  ARM: dts: i.MX6: Add regulator delay support
  ARM: dts: Add device tree entry for onewire master on i.MX53
  ARM: i.MX53: Add clocks for i.mx53 onewire master.
  W1: Add device tree support to MXC onewire master.
  ARM: imx: enable imx6q-cpufreq support
  ARM: dts: Add apf51 basic support
  ARM i.MX6: change mxs usbphy clock usage
  ARM: dts: imx6q: Remove silicon version from SDMA firmware
  ARM i.MX53: dts: add oftree for MBa53 baseboard
  ARM i.MX53: add dts for the TQ tqma53 module
  ARM: dts: imx53: pinctrl update
  ARM i.MX51 babbage: Add keypad support
  ARM: dts: imx: Add imx51 KPP entry
  ARM: dts: imx25-karo-tx25: Put status entry in the end
  ARM: mx25pdk: Add device tree support
  ARM: dts: imx: use nodes label in board dts
  ARM: dts: add missing imx dtb targets
  ARM: boot: dts: Add an entry for imx27-pdk.dtb
  ...
This commit is contained in:
Linus Torvalds
2013-02-28 19:59:34 -08:00
parent 2af78448ff 4a9226a3d1
commit f8f466c817
33 changed files with 2562 additions and 1886 deletions
Download Patch File Download Diff File Expand all files Collapse all files
Documentation/devicetree/bindings/arm/armadeus.txt
+6
View File
@@ -0,0 +1,6 @@
Armadeus i.MX Platforms Device Tree Bindings
-----------------------------------------------
APF51: i.MX51 based module.
Required root node properties:
- compatible = "armadeus,imx51-apf51", "fsl,imx51";
Documentation/devicetree/bindings/arm/fsl.txt
+8
View File
@@ -5,6 +5,14 @@ i.MX23 Evaluation Kit
Required root node properties:
- compatible = "fsl,imx23-evk", "fsl,imx23";
i.MX25 Product Development Kit
Required root node properties:
- compatible = "fsl,imx25-pdk", "fsl,imx25";
i.MX27 Product Development Kit
Required root node properties:
- compatible = "fsl,imx27-pdk", "fsl,imx27";
i.MX28 Evaluation Kit
Required root node properties:
- compatible = "fsl,imx28-evk", "fsl,imx28";
Documentation/devicetree/bindings/clock/imx5-clock.txt
+1
View File
@@ -171,6 +171,7 @@ clocks and IDs.
can_sel 156
can1_serial_gate 157
can1_ipg_gate 158
owire_gate 159
Examples (for mx53):
Documentation/devicetree/bindings/clock/imx6q-clock.txt
+2
View File
@@ -203,6 +203,8 @@ clocks and IDs.
pcie_ref 188
pcie_ref_125m 189
enet_ref 190
usbphy1_gate 191
usbphy2_gate 192
Examples:
Documentation/devicetree/bindings/w1/fsl-imx-owire.txt
+19
View File
@@ -0,0 +1,19 @@
* Freescale i.MX One wire bus master controller
Required properties:
- compatible : should be "fsl,imx21-owire"
- reg : Address and length of the register set for the device
Optional properties:
- clocks : phandle of clock that supplies the module (required if platform
clock bindings use device tree)
Example:
- From imx53.dtsi:
owire: owire@63fa4000 {
compatible = "fsl,imx53-owire", "fsl,imx21-owire";
reg = <0x63fa4000 0x4000>;
clocks = <&clks 159>;
status = "disabled";
};
arch/arm/boot/dts/Makefile
+9 -1
View File
@@ -80,9 +80,17 @@ dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \
armada-370-mirabox.dtb \
armada-xp-db.dtb \
armada-xp-openblocks-ax3-4.dtb
dtb-$(CONFIG_ARCH_MXC) += imx51-babbage.dtb \
dtb-$(CONFIG_ARCH_MXC) += \
imx25-karo-tx25.dtb \
imx25-pdk.dtb \
imx27-apf27.dtb \
imx27-pdk.dtb \
imx31-bug.dtb \
imx51-apf51.dtb \
imx51-babbage.dtb \
imx53-ard.dtb \
imx53-evk.dtb \
imx53-mba53.dtb \
imx53-qsb.dtb \
imx53-smd.dtb \
imx6q-arm2.dtb \
arch/arm/boot/dts/imx25-karo-tx25.dts
+11 -19
View File
@@ -19,26 +19,18 @@
memory {
reg = <0x80000000 0x02000000 0x90000000 0x02000000>;
};
};
soc {
aips@43f00000 {
uart1: serial@43f90000 {
status = "okay";
};
};
&uart1 {
status = "okay";
};
spba@50000000 {
fec: ethernet@50038000 {
status = "okay";
phy-mode = "rmii";
};
};
&fec {
phy-mode = "rmii";
status = "okay";
};
emi@80000000 {
nand@bb000000 {
nand-on-flash-bbt;
status = "okay";
};
};
};
&nfc {
nand-on-flash-bbt;
status = "okay";
};
arch/arm/boot/dts/imx25-pdk.dts
+36
View File
@@ -0,0 +1,36 @@
/*
* Copyright 2013 Freescale Semiconductor, Inc.
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
/dts-v1/;
/include/ "imx25.dtsi"
/ {
model = "Freescale i.MX25 Product Development Kit";
compatible = "fsl,imx25-pdk", "fsl,imx25";
memory {
reg = <0x80000000 0x4000000>;
};
};
&uart1 {
status = "okay";
};
&fec {
phy-mode = "rmii";
status = "okay";
};
&nfc {
nand-on-flash-bbt;
status = "okay";
};
arch/arm/boot/dts/imx25.dtsi
+1 -1
View File
@@ -499,7 +499,7 @@
reg = <0x80000000 0x3b002000>;
ranges;
nand@bb000000 {
nfc: nand@bb000000 {
#address-cells = <1>;
#size-cells = <1>;
arch/arm/boot/dts/imx27-apf27.dts
+39 -43
View File
@@ -32,58 +32,54 @@
clock-frequency = <0>;
};
};
};
soc {
aipi@10000000 {
serial@1000a000 {
status = "okay";
};
&uart1 {
status = "okay";
};
ethernet@1002b000 {
status = "okay";
};
};
&fec {
status = "okay";
};
nand@d8000000 {
status = "okay";
nand-bus-width = <16>;
nand-ecc-mode = "hw";
nand-on-flash-bbt;
&nfc {
status = "okay";
nand-bus-width = <16>;
nand-ecc-mode = "hw";
nand-on-flash-bbt;
partition@0 {
label = "u-boot";
reg = <0x0 0x100000>;
};
partition@0 {
label = "u-boot";
reg = <0x0 0x100000>;
};
partition@100000 {
label = "env";
reg = <0x100000 0x80000>;
};
partition@100000 {
label = "env";
reg = <0x100000 0x80000>;
};
partition@180000 {
label = "env2";
reg = <0x180000 0x80000>;
};
partition@180000 {
label = "env2";
reg = <0x180000 0x80000>;
};
partition@200000 {
label = "firmware";
reg = <0x200000 0x80000>;
};
partition@200000 {
label = "firmware";
reg = <0x200000 0x80000>;
};
partition@280000 {
label = "dtb";
reg = <0x280000 0x80000>;
};
partition@280000 {
label = "dtb";
reg = <0x280000 0x80000>;
};
partition@300000 {
label = "kernel";
reg = <0x300000 0x500000>;
};
partition@300000 {
label = "kernel";
reg = <0x300000 0x500000>;
};
partition@800000 {
label = "rootfs";
reg = <0x800000 0xf800000>;
};
};
partition@800000 {
label = "rootfs";
reg = <0x800000 0xf800000>;
};
};
arch/arm/boot/dts/imx27-3ds.dts → arch/arm/boot/dts/imx27-pdk.dts
+9 -15
View File
@@ -13,25 +13,19 @@
/include/ "imx27.dtsi"
/ {
model = "mx27_3ds";
compatible = "freescale,imx27-3ds", "fsl,imx27";
model = "Freescale i.MX27 Product Development Kit";
compatible = "fsl,imx27-pdk", "fsl,imx27";
memory {
reg = <0x0 0x0>;
};
};
soc {
aipi@10000000 { /* aipi1 */
uart1: serial@1000a000 {
fsl,uart-has-rtscts;
status = "okay";
};
};
&uart1 {
fsl,uart-has-rtscts;
status = "okay";
};
aipi@10020000 { /* aipi2 */
ethernet@1002b000 {
status = "okay";
};
};
};
&fec {
status = "okay";
};
arch/arm/boot/dts/imx31-bug.dts
+4 -8
View File
@@ -19,13 +19,9 @@
memory {
reg = <0x80000000 0x8000000>; /* 128M */
};
};
soc {
aips@43f00000 { /* AIPS1 */
uart5: serial@43fb4000 {
fsl,uart-has-rtscts;
status = "okay";
};
};
};
&uart5 {
fsl,uart-has-rtscts;
status = "okay";
};
arch/arm/boot/dts/imx51-apf51.dts
+52
View File
@@ -0,0 +1,52 @@
/*
* Copyright 2012 Armadeus Systems - <support@armadeus.com>
* Copyright 2012 Laurent Cans <laurent.cans@gmail.com>
*
* Based on mx51-babbage.dts
* Copyright 2011 Freescale Semiconductor, Inc.
* Copyright 2011 Linaro Ltd.
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
/dts-v1/;
/include/ "imx51.dtsi"
/ {
model = "Armadeus Systems APF51 module";
compatible = "armadeus,imx51-apf51", "fsl,imx51";
memory {
reg = <0x90000000 0x20000000>;
};
clocks {
ckih1 {
clock-frequency = <0>;
};
osc {
clock-frequency = <33554432>;
};
};
};
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fec_2>;
phy-mode = "mii";
phy-reset-gpios = <&gpio3 0 0>;
phy-reset-duration = <1>;
status = "okay";
};
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3_2>;
status = "okay";
};
arch/arm/boot/dts/imx51-babbage.dts
+246 -232
View File
@@ -21,239 +21,20 @@
reg = <0x90000000 0x20000000>;
};
soc {
display@di0 {
compatible = "fsl,imx-parallel-display";
crtcs = <&ipu 0>;
interface-pix-fmt = "rgb24";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ipu_disp1_1>;
};
display@di0 {
compatible = "fsl,imx-parallel-display";
crtcs = <&ipu 0>;
interface-pix-fmt = "rgb24";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ipu_disp1_1>;
};
display@di1 {
compatible = "fsl,imx-parallel-display";
crtcs = <&ipu 1>;
interface-pix-fmt = "rgb565";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ipu_disp2_1>;
};
aips@70000000 { /* aips-1 */
spba@70000000 {
esdhc@70004000 { /* ESDHC1 */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_esdhc1_1>;
fsl,cd-controller;
fsl,wp-controller;
status = "okay";
};
esdhc@70008000 { /* ESDHC2 */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_esdhc2_1>;
cd-gpios = <&gpio1 6 0>;
wp-gpios = <&gpio1 5 0>;
status = "okay";
};
uart3: serial@7000c000 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3_1>;
fsl,uart-has-rtscts;
status = "okay";
};
ecspi@70010000 { /* ECSPI1 */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi1_1>;
fsl,spi-num-chipselects = <2>;
cs-gpios = <&gpio4 24 0>, <&gpio4 25 0>;
status = "okay";
pmic: mc13892@0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,mc13892";
spi-max-frequency = <6000000>;
reg = <0>;
interrupt-parent = <&gpio1>;
interrupts = <8 0x4>;
regulators {
sw1_reg: sw1 {
regulator-min-microvolt = <600000>;
regulator-max-microvolt = <1375000>;
regulator-boot-on;
regulator-always-on;
};
sw2_reg: sw2 {
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <1850000>;
regulator-boot-on;
regulator-always-on;
};
sw3_reg: sw3 {
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1850000>;
regulator-boot-on;
regulator-always-on;
};
sw4_reg: sw4 {
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1850000>;
regulator-boot-on;
regulator-always-on;
};
vpll_reg: vpll {
regulator-min-microvolt = <1050000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
regulator-always-on;
};
vdig_reg: vdig {
regulator-min-microvolt = <1650000>;
regulator-max-microvolt = <1650000>;
regulator-boot-on;
};
vsd_reg: vsd {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3150000>;
};
vusb2_reg: vusb2 {
regulator-min-microvolt = <2400000>;
regulator-max-microvolt = <2775000>;
regulator-boot-on;
regulator-always-on;
};
vvideo_reg: vvideo {
regulator-min-microvolt = <2775000>;
regulator-max-microvolt = <2775000>;
};
vaudio_reg: vaudio {
regulator-min-microvolt = <2300000>;
regulator-max-microvolt = <3000000>;
};
vcam_reg: vcam {
regulator-min-microvolt = <2500000>;
regulator-max-microvolt = <3000000>;
};
vgen1_reg: vgen1 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
vgen2_reg: vgen2 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <3150000>;
regulator-always-on;
};
vgen3_reg: vgen3 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2900000>;
regulator-always-on;
};
};
};
flash: at45db321d@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "atmel,at45db321d", "atmel,at45", "atmel,dataflash";
spi-max-frequency = <25000000>;
reg = <1>;
partition@0 {
label = "U-Boot";
reg = <0x0 0x40000>;
read-only;
};
partition@40000 {
label = "Kernel";
reg = <0x40000 0x3c0000>;
};
};
};
ssi2: ssi@70014000 {
fsl,mode = "i2s-slave";
status = "okay";
};
};
iomuxc@73fa8000 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog>;
hog {
pinctrl_hog: hoggrp {
fsl,pins = <
694 0x20d5 /* MX51_PAD_GPIO1_0__SD1_CD */
697 0x20d5 /* MX51_PAD_GPIO1_1__SD1_WP */
737 0x100 /* MX51_PAD_GPIO1_5__GPIO1_5 */
740 0x100 /* MX51_PAD_GPIO1_6__GPIO1_6 */
121 0x5 /* MX51_PAD_EIM_A27__GPIO2_21 */
402 0x85 /* MX51_PAD_CSPI1_SS0__GPIO4_24 */
405 0x85 /* MX51_PAD_CSPI1_SS1__GPIO4_25 */
>;
};
};
};
uart1: serial@73fbc000 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1_1>;
fsl,uart-has-rtscts;
status = "okay";
};
uart2: serial@73fc0000 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2_1>;
status = "okay";
};
};
aips@80000000 { /* aips-2 */
i2c@83fc4000 { /* I2C2 */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2_1>;
status = "okay";
sgtl5000: codec@0a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
clock-frequency = <26000000>;
VDDA-supply = <&vdig_reg>;
VDDIO-supply = <&vvideo_reg>;
};
};
audmux@83fd0000 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_audmux_1>;
status = "okay";
};
ethernet@83fec000 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fec_1>;
phy-mode = "mii";
status = "okay";
};
};
display@di1 {
compatible = "fsl,imx-parallel-display";
crtcs = <&ipu 1>;
interface-pix-fmt = "rgb565";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ipu_disp2_1>;
};
gpio-keys {
@@ -281,3 +62,236 @@
mux-ext-port = <3>;
};
};
&esdhc1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_esdhc1_1>;
fsl,cd-controller;
fsl,wp-controller;
status = "okay";
};
&esdhc2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_esdhc2_1>;
cd-gpios = <&gpio1 6 0>;
wp-gpios = <&gpio1 5 0>;
status = "okay";
};
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3_1>;
fsl,uart-has-rtscts;
status = "okay";
};
&ecspi1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi1_1>;
fsl,spi-num-chipselects = <2>;
cs-gpios = <&gpio4 24 0>, <&gpio4 25 0>;
status = "okay";
pmic: mc13892@0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,mc13892";
spi-max-frequency = <6000000>;
reg = <0>;
interrupt-parent = <&gpio1>;
interrupts = <8 0x4>;
regulators {
sw1_reg: sw1 {
regulator-min-microvolt = <600000>;
regulator-max-microvolt = <1375000>;
regulator-boot-on;
regulator-always-on;
};
sw2_reg: sw2 {
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <1850000>;
regulator-boot-on;
regulator-always-on;
};
sw3_reg: sw3 {
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1850000>;
regulator-boot-on;
regulator-always-on;
};
sw4_reg: sw4 {
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1850000>;
regulator-boot-on;
regulator-always-on;
};
vpll_reg: vpll {
regulator-min-microvolt = <1050000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
regulator-always-on;
};
vdig_reg: vdig {
regulator-min-microvolt = <1650000>;
regulator-max-microvolt = <1650000>;
regulator-boot-on;
};
vsd_reg: vsd {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3150000>;
};
vusb2_reg: vusb2 {
regulator-min-microvolt = <2400000>;
regulator-max-microvolt = <2775000>;
regulator-boot-on;
regulator-always-on;
};
vvideo_reg: vvideo {
regulator-min-microvolt = <2775000>;
regulator-max-microvolt = <2775000>;
};
vaudio_reg: vaudio {
regulator-min-microvolt = <2300000>;
regulator-max-microvolt = <3000000>;
};
vcam_reg: vcam {
regulator-min-microvolt = <2500000>;
regulator-max-microvolt = <3000000>;
};
vgen1_reg: vgen1 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
vgen2_reg: vgen2 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <3150000>;
regulator-always-on;
};
vgen3_reg: vgen3 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2900000>;
regulator-always-on;
};
};
};
flash: at45db321d@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "atmel,at45db321d", "atmel,at45", "atmel,dataflash";
spi-max-frequency = <25000000>;
reg = <1>;
partition@0 {
label = "U-Boot";
reg = <0x0 0x40000>;
read-only;
};
partition@40000 {
label = "Kernel";
reg = <0x40000 0x3c0000>;
};
};
};
&ssi2 {
fsl,mode = "i2s-slave";
status = "okay";
};
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog>;
hog {
pinctrl_hog: hoggrp {
fsl,pins = <
694 0x20d5 /* MX51_PAD_GPIO1_0__SD1_CD */
697 0x20d5 /* MX51_PAD_GPIO1_1__SD1_WP */
737 0x100 /* MX51_PAD_GPIO1_5__GPIO1_5 */
740 0x100 /* MX51_PAD_GPIO1_6__GPIO1_6 */
121 0x5 /* MX51_PAD_EIM_A27__GPIO2_21 */
402 0x85 /* MX51_PAD_CSPI1_SS0__GPIO4_24 */
405 0x85 /* MX51_PAD_CSPI1_SS1__GPIO4_25 */
>;
};
};
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1_1>;
fsl,uart-has-rtscts;
status = "okay";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2_1>;
status = "okay";
};
&i2c2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2_1>;
status = "okay";
sgtl5000: codec@0a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
clock-frequency = <26000000>;
VDDA-supply = <&vdig_reg>;
VDDIO-supply = <&vvideo_reg>;
};
};
&audmux {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_audmux_1>;
status = "okay";
};
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fec_1>;
phy-mode = "mii";
status = "okay";
};
&kpp {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_kpp_1>;
linux,keymap = <0x00000067 /* KEY_UP */
0x0001006c /* KEY_DOWN */
0x00020072 /* KEY_VOLUMEDOWN */
0x00030066 /* KEY_HOME */
0x0100006a /* KEY_RIGHT */
0x01010069 /* KEY_LEFT */
0x0102001c /* KEY_ENTER */
0x01030073 /* KEY_VOLUMEUP */
0x02000040 /* KEY_F6 */
0x02010042 /* KEY_F8 */
0x02020043 /* KEY_F9 */
0x02030044 /* KEY_F10 */
0x0300003b /* KEY_F1 */
0x0301003c /* KEY_F2 */
0x0302003d /* KEY_F3 */
0x03030074>; /* KEY_POWER */
status = "okay";
};
arch/arm/boot/dts/imx51.dtsi
+53
View File
@@ -221,6 +221,14 @@
#interrupt-cells = <2>;
};
kpp: kpp@73f94000 {
compatible = "fsl,imx51-kpp", "fsl,imx21-kpp";
reg = <0x73f94000 0x4000>;
interrupts = <60>;
clocks = <&clks 0>;
status = "disabled";
};
wdog1: wdog@73f98000 {
compatible = "fsl,imx51-wdt", "fsl,imx21-wdt";
reg = <0x73f98000 0x4000>;
@@ -273,6 +281,29 @@
260 0x80000000 /* MX51_PAD_NANDF_RDY_INT__FEC_TX_CLK */
>;
};
pinctrl_fec_2: fecgrp-2 {
fsl,pins = <
589 0x80000000 /* MX51_PAD_DI_GP3__FEC_TX_ER */
592 0x80000000 /* MX51_PAD_DI2_PIN4__FEC_CRS */
594 0x80000000 /* MX51_PAD_DI2_PIN2__FEC_MDC */
596 0x80000000 /* MX51_PAD_DI2_PIN3__FEC_MDIO */
598 0x80000000 /* MX51_PAD_DI2_DISP_CLK__FEC_RDATA1 */
602 0x80000000 /* MX51_PAD_DI_GP4__FEC_RDATA2 */
604 0x80000000 /* MX51_PAD_DISP2_DAT0__FEC_RDATA3 */
609 0x80000000 /* MX51_PAD_DISP2_DAT1__FEC_RX_ER */
618 0x80000000 /* MX51_PAD_DISP2_DAT6__FEC_TDATA1 */
623 0x80000000 /* MX51_PAD_DISP2_DAT7__FEC_TDATA2 */
628 0x80000000 /* MX51_PAD_DISP2_DAT8__FEC_TDATA3 */
634 0x80000000 /* MX51_PAD_DISP2_DAT9__FEC_TX_EN */
639 0x80000000 /* MX51_PAD_DISP2_DAT10__FEC_COL */
644 0x80000000 /* MX51_PAD_DISP2_DAT11__FEC_RX_CLK */
649 0x80000000 /* MX51_PAD_DISP2_DAT12__FEC_RX_DV */
653 0x80000000 /* MX51_PAD_DISP2_DAT13__FEC_TX_CLK */
657 0x80000000 /* MX51_PAD_DISP2_DAT14__FEC_RDATA0 */
662 0x80000000 /* MX51_PAD_DISP2_DAT15__FEC_TDATA0 */
>;
};
};
ecspi1 {
@@ -409,6 +440,28 @@
49 0x1c5 /* MX51_PAD_EIM_D24__UART3_CTS */
>;
};
pinctrl_uart3_2: uart3grp-2 {
fsl,pins = <
434 0x1c5 /* MX51_PAD_UART3_RXD__UART3_RXD */
430 0x1c5 /* MX51_PAD_UART3_TXD__UART3_TXD */
>;
};
};
kpp {
pinctrl_kpp_1: kppgrp-1 {
fsl,pins = <
438 0xe0 /* MX51_PAD_KEY_ROW0__KEY_ROW0 */
439 0xe0 /* MX51_PAD_KEY_ROW1__KEY_ROW1 */
440 0xe0 /* MX51_PAD_KEY_ROW2__KEY_ROW2 */
441 0xe0 /* MX51_PAD_KEY_ROW3__KEY_ROW3 */
442 0xe8 /* MX51_PAD_KEY_COL0__KEY_COL0 */
444 0xe8 /* MX51_PAD_KEY_COL1__KEY_COL1 */
446 0xe8 /* MX51_PAD_KEY_COL2__KEY_COL2 */
448 0xe8 /* MX51_PAD_KEY_COL3__KEY_COL3 */
>;
};
};
};
arch/arm/boot/dts/imx53-ard.dts
+60 -66
View File
@@ -21,72 +21,6 @@
reg = <0x70000000 0x40000000>;
};
soc {
aips@50000000 { /* AIPS1 */
spba@50000000 {
esdhc@50004000 { /* ESDHC1 */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_esdhc1_2>;
cd-gpios = <&gpio1 1 0>;
wp-gpios = <&gpio1 9 0>;
status = "okay";
};
};
iomuxc@53fa8000 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog>;
hog {
pinctrl_hog: hoggrp {
fsl,pins = <
1077 0x80000000 /* MX53_PAD_GPIO_1__GPIO1_1 */
1085 0x80000000 /* MX53_PAD_GPIO_9__GPIO1_9 */
486 0x80000000 /* MX53_PAD_EIM_EB3__GPIO2_31 */
739 0x80000000 /* MX53_PAD_GPIO_10__GPIO4_0 */
218 0x80000000 /* MX53_PAD_DISP0_DAT16__GPIO5_10 */
226 0x80000000 /* MX53_PAD_DISP0_DAT17__GPIO5_11 */
233 0x80000000 /* MX53_PAD_DISP0_DAT18__GPIO5_12 */
241 0x80000000 /* MX53_PAD_DISP0_DAT19__GPIO5_13 */
429 0x80000000 /* MX53_PAD_EIM_D16__EMI_WEIM_D_16 */
435 0x80000000 /* MX53_PAD_EIM_D17__EMI_WEIM_D_17 */
441 0x80000000 /* MX53_PAD_EIM_D18__EMI_WEIM_D_18 */
448 0x80000000 /* MX53_PAD_EIM_D19__EMI_WEIM_D_19 */
456 0x80000000 /* MX53_PAD_EIM_D20__EMI_WEIM_D_20 */
464 0x80000000 /* MX53_PAD_EIM_D21__EMI_WEIM_D_21 */
471 0x80000000 /* MX53_PAD_EIM_D22__EMI_WEIM_D_22 */
477 0x80000000 /* MX53_PAD_EIM_D23__EMI_WEIM_D_23 */
492 0x80000000 /* MX53_PAD_EIM_D24__EMI_WEIM_D_24 */
500 0x80000000 /* MX53_PAD_EIM_D25__EMI_WEIM_D_25 */
508 0x80000000 /* MX53_PAD_EIM_D26__EMI_WEIM_D_26 */
516 0x80000000 /* MX53_PAD_EIM_D27__EMI_WEIM_D_27 */
524 0x80000000 /* MX53_PAD_EIM_D28__EMI_WEIM_D_28 */
532 0x80000000 /* MX53_PAD_EIM_D29__EMI_WEIM_D_29 */
540 0x80000000 /* MX53_PAD_EIM_D30__EMI_WEIM_D_30 */
548 0x80000000 /* MX53_PAD_EIM_D31__EMI_WEIM_D_31 */
637 0x80000000 /* MX53_PAD_EIM_DA0__EMI_NAND_WEIM_DA_0 */
642 0x80000000 /* MX53_PAD_EIM_DA1__EMI_NAND_WEIM_DA_1 */
647 0x80000000 /* MX53_PAD_EIM_DA2__EMI_NAND_WEIM_DA_2 */
652 0x80000000 /* MX53_PAD_EIM_DA3__EMI_NAND_WEIM_DA_3 */
657 0x80000000 /* MX53_PAD_EIM_DA4__EMI_NAND_WEIM_DA_4 */
662 0x80000000 /* MX53_PAD_EIM_DA5__EMI_NAND_WEIM_DA_5 */
667 0x80000000 /* MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6 */
611 0x80000000 /* MX53_PAD_EIM_OE__EMI_WEIM_OE */
616 0x80000000 /* MX53_PAD_EIM_RW__EMI_WEIM_RW */
607 0x80000000 /* MX53_PAD_EIM_CS1__EMI_WEIM_CS_1 */
>;
};
};
};
uart1: serial@53fbc000 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1_2>;
status = "okay";
};
};
};
eim-cs1@f4000000 {
#address-cells = <1>;
#size-cells = <1>;
@@ -162,3 +96,63 @@
};
};
};
&esdhc1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_esdhc1_2>;
cd-gpios = <&gpio1 1 0>;
wp-gpios = <&gpio1 9 0>;
status = "okay";
};
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog>;
hog {
pinctrl_hog: hoggrp {
fsl,pins = <
1077 0x80000000 /* MX53_PAD_GPIO_1__GPIO1_1 */
1085 0x80000000 /* MX53_PAD_GPIO_9__GPIO1_9 */
486 0x80000000 /* MX53_PAD_EIM_EB3__GPIO2_31 */
739 0x80000000 /* MX53_PAD_GPIO_10__GPIO4_0 */
218 0x80000000 /* MX53_PAD_DISP0_DAT16__GPIO5_10 */
226 0x80000000 /* MX53_PAD_DISP0_DAT17__GPIO5_11 */
233 0x80000000 /* MX53_PAD_DISP0_DAT18__GPIO5_12 */
241 0x80000000 /* MX53_PAD_DISP0_DAT19__GPIO5_13 */
429 0x80000000 /* MX53_PAD_EIM_D16__EMI_WEIM_D_16 */
435 0x80000000 /* MX53_PAD_EIM_D17__EMI_WEIM_D_17 */
441 0x80000000 /* MX53_PAD_EIM_D18__EMI_WEIM_D_18 */
448 0x80000000 /* MX53_PAD_EIM_D19__EMI_WEIM_D_19 */
456 0x80000000 /* MX53_PAD_EIM_D20__EMI_WEIM_D_20 */
464 0x80000000 /* MX53_PAD_EIM_D21__EMI_WEIM_D_21 */
471 0x80000000 /* MX53_PAD_EIM_D22__EMI_WEIM_D_22 */
477 0x80000000 /* MX53_PAD_EIM_D23__EMI_WEIM_D_23 */
492 0x80000000 /* MX53_PAD_EIM_D24__EMI_WEIM_D_24 */
500 0x80000000 /* MX53_PAD_EIM_D25__EMI_WEIM_D_25 */
508 0x80000000 /* MX53_PAD_EIM_D26__EMI_WEIM_D_26 */
516 0x80000000 /* MX53_PAD_EIM_D27__EMI_WEIM_D_27 */
524 0x80000000 /* MX53_PAD_EIM_D28__EMI_WEIM_D_28 */
532 0x80000000 /* MX53_PAD_EIM_D29__EMI_WEIM_D_29 */
540 0x80000000 /* MX53_PAD_EIM_D30__EMI_WEIM_D_30 */
548 0x80000000 /* MX53_PAD_EIM_D31__EMI_WEIM_D_31 */
637 0x80000000 /* MX53_PAD_EIM_DA0__EMI_NAND_WEIM_DA_0 */
642 0x80000000 /* MX53_PAD_EIM_DA1__EMI_NAND_WEIM_DA_1 */
647 0x80000000 /* MX53_PAD_EIM_DA2__EMI_NAND_WEIM_DA_2 */
652 0x80000000 /* MX53_PAD_EIM_DA3__EMI_NAND_WEIM_DA_3 */
657 0x80000000 /* MX53_PAD_EIM_DA4__EMI_NAND_WEIM_DA_4 */
662 0x80000000 /* MX53_PAD_EIM_DA5__EMI_NAND_WEIM_DA_5 */
667 0x80000000 /* MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6 */
611 0x80000000 /* MX53_PAD_EIM_OE__EMI_WEIM_OE */
616 0x80000000 /* MX53_PAD_EIM_RW__EMI_WEIM_RW */
607 0x80000000 /* MX53_PAD_EIM_CS1__EMI_WEIM_CS_1 */
>;
};
};
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1_2>;
status = "okay";
};
arch/arm/boot/dts/imx53-evk.dts
+93 -101
View File
@@ -21,107 +21,6 @@
reg = <0x70000000 0x80000000>;
};
soc {
aips@50000000 { /* AIPS1 */
spba@50000000 {
esdhc@50004000 { /* ESDHC1 */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_esdhc1_1>;
cd-gpios = <&gpio3 13 0>;
wp-gpios = <&gpio3 14 0>;
status = "okay";
};
ecspi@50010000 { /* ECSPI1 */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi1_1>;
fsl,spi-num-chipselects = <2>;
cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>;
status = "okay";
flash: at45db321d@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "atmel,at45db321d", "atmel,at45", "atmel,dataflash";
spi-max-frequency = <25000000>;
reg = <1>;
partition@0 {
label = "U-Boot";
reg = <0x0 0x40000>;
read-only;
};
partition@40000 {
label = "Kernel";
reg = <0x40000 0x3c0000>;
};
};
};
esdhc@50020000 { /* ESDHC3 */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_esdhc3_1>;
cd-gpios = <&gpio3 11 0>;
wp-gpios = <&gpio3 12 0>;
status = "okay";
};
};
iomuxc@53fa8000 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog>;
hog {
pinctrl_hog: hoggrp {
fsl,pins = <
424 0x80000000 /* MX53_PAD_EIM_EB2__GPIO2_30 */
449 0x80000000 /* MX53_PAD_EIM_D19__GPIO3_19 */
693 0x80000000 /* MX53_PAD_EIM_DA11__GPIO3_11 */
697 0x80000000 /* MX53_PAD_EIM_DA12__GPIO3_12 */
701 0x80000000 /* MX53_PAD_EIM_DA13__GPIO3_13 */
705 0x80000000 /* MX53_PAD_EIM_DA14__GPIO3_14 */
868 0x80000000 /* MX53_PAD_PATA_DA_0__GPIO7_6 */
873 0x80000000 /* MX53_PAD_PATA_DA_1__GPIO7_7 */
>;
};
};
};
uart1: serial@53fbc000 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1_1>;
status = "okay";
};
};
aips@60000000 { /* AIPS2 */
i2c@63fc4000 { /* I2C2 */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2_1>;
status = "okay";
pmic: mc13892@08 {
compatible = "fsl,mc13892", "fsl,mc13xxx";
reg = <0x08>;
};
codec: sgtl5000@0a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
};
};
ethernet@63fec000 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fec_1>;
phy-mode = "rmii";
phy-reset-gpios = <&gpio7 6 0>;
status = "okay";
};
};
};
leds {
compatible = "gpio-leds";
@@ -132,3 +31,96 @@
};
};
};
&esdhc1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_esdhc1_1>;
cd-gpios = <&gpio3 13 0>;
wp-gpios = <&gpio3 14 0>;
status = "okay";
};
&ecspi1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi1_1>;
fsl,spi-num-chipselects = <2>;
cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>;
status = "okay";
flash: at45db321d@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "atmel,at45db321d", "atmel,at45", "atmel,dataflash";
spi-max-frequency = <25000000>;
reg = <1>;
partition@0 {
label = "U-Boot";
reg = <0x0 0x40000>;
read-only;
};
partition@40000 {
label = "Kernel";
reg = <0x40000 0x3c0000>;
};
};
};
&esdhc3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_esdhc3_1>;
cd-gpios = <&gpio3 11 0>;
wp-gpios = <&gpio3 12 0>;
status = "okay";
};
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog>;
hog {
pinctrl_hog: hoggrp {
fsl,pins = <
424 0x80000000 /* MX53_PAD_EIM_EB2__GPIO2_30 */
449 0x80000000 /* MX53_PAD_EIM_D19__GPIO3_19 */
693 0x80000000 /* MX53_PAD_EIM_DA11__GPIO3_11 */
697 0x80000000 /* MX53_PAD_EIM_DA12__GPIO3_12 */
701 0x80000000 /* MX53_PAD_EIM_DA13__GPIO3_13 */
705 0x80000000 /* MX53_PAD_EIM_DA14__GPIO3_14 */
868 0x80000000 /* MX53_PAD_PATA_DA_0__GPIO7_6 */
873 0x80000000 /* MX53_PAD_PATA_DA_1__GPIO7_7 */
>;
};
};
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1_1>;
status = "okay";
};
&i2c2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2_1>;
status = "okay";
pmic: mc13892@08 {
compatible = "fsl,mc13892", "fsl,mc13xxx";
reg = <0x08>;
};
codec: sgtl5000@0a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
};
};
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fec_1>;
phy-mode = "rmii";
phy-reset-gpios = <&gpio7 6 0>;
status = "okay";
};
arch/arm/boot/dts/imx53-mba53.dts
+130
View File
@@ -0,0 +1,130 @@
/*
* Copyright 2012 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
* Copyright 2012 Steffen Trumtrar <s.trumtrar@pengutronix.de>, Pengutronix
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
/dts-v1/;
/include/ "imx53-tqma53.dtsi"
/ {
model = "TQ MBa53 starter kit";
compatible = "tq,mba53", "tq,tqma53", "fsl,imx53";
};
&iomuxc {
lvds1 {
pinctrl_lvds1_1: lvds1-grp1 {
fsl,pins = <730 0x10000 /* LVDS0_TX3 */
732 0x10000 /* LVDS0_CLK */
734 0x10000 /* LVDS0_TX2 */
736 0x10000 /* LVDS0_TX1 */
738 0x10000>; /* LVDS0_TX0 */
};
pinctrl_lvds1_2: lvds1-grp2 {
fsl,pins = <720 0x10000 /* LVDS1_TX3 */
722 0x10000 /* LVDS1_TX2 */
724 0x10000 /* LVDS1_CLK */
726 0x10000 /* LVDS1_TX1 */
728 0x10000>; /* LVDS1_TX0 */
};
};
disp1 {
pinctrl_disp1_1: disp1-grp1 {
fsl,pins = <689 0x10000 /* DISP1_DRDY */
482 0x10000 /* DISP1_HSYNC */
489 0x10000 /* DISP1_VSYNC */
684 0x10000 /* DISP1_DAT_0 */
515 0x10000 /* DISP1_DAT_22 */
523 0x10000 /* DISP1_DAT_23 */
543 0x10000 /* DISP1_DAT_21 */
553 0x10000 /* DISP1_DAT_20 */
558 0x10000 /* DISP1_DAT_19 */
564 0x10000 /* DISP1_DAT_18 */
570 0x10000 /* DISP1_DAT_17 */
575 0x10000 /* DISP1_DAT_16 */
580 0x10000 /* DISP1_DAT_15 */
585 0x10000 /* DISP1_DAT_14 */
590 0x10000 /* DISP1_DAT_13 */
595 0x10000 /* DISP1_DAT_12 */
628 0x10000 /* DISP1_DAT_11 */
634 0x10000 /* DISP1_DAT_10 */
639 0x10000 /* DISP1_DAT_9 */
644 0x10000 /* DISP1_DAT_8 */
649 0x10000 /* DISP1_DAT_7 */
654 0x10000 /* DISP1_DAT_6 */
659 0x10000 /* DISP1_DAT_5 */
664 0x10000 /* DISP1_DAT_4 */
669 0x10000 /* DISP1_DAT_3 */
674 0x10000 /* DISP1_DAT_2 */
679 0x10000 /* DISP1_DAT_1 */
684 0x10000>; /* DISP1_DAT_0 */
};
};
};
&cspi {
status = "okay";
};
&i2c2 {
codec: sgtl5000@a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
};
expander: pca9554@20 {
compatible = "pca9554";
reg = <0x20>;
interrupts = <109>;
};
sensor2: lm75@49 {
compatible = "lm75";
reg = <0x49>;
};
};
&fec {
status = "okay";
};
&esdhc2 {
status = "okay";
};
&uart3 {
status = "okay";
};
&ecspi1 {
status = "okay";
};
&uart1 {
status = "okay";
};
&uart2 {
status = "okay";
};
&can1 {
status = "okay";
};
&can2 {
status = "okay";
};
&i2c3 {
status = "okay";
};
arch/arm/boot/dts/imx53-qsb.dts
+186 -194
View File
@@ -21,200 +21,6 @@
reg = <0x70000000 0x40000000>;
};
soc {
aips@50000000 { /* AIPS1 */
spba@50000000 {
esdhc@50004000 { /* ESDHC1 */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_esdhc1_1>;
cd-gpios = <&gpio3 13 0>;
status = "okay";
};
ssi2: ssi@50014000 {
fsl,mode = "i2s-slave";
status = "okay";
};
esdhc@50020000 { /* ESDHC3 */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_esdhc3_1>;
cd-gpios = <&gpio3 11 0>;
wp-gpios = <&gpio3 12 0>;
status = "okay";
};
};
iomuxc@53fa8000 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog>;
hog {
pinctrl_hog: hoggrp {
fsl,pins = <
1071 0x80000000 /* MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK */
1141 0x80000000 /* MX53_PAD_GPIO_8__GPIO1_8 */
982 0x80000000 /* MX53_PAD_PATA_DATA14__GPIO2_14 */
989 0x80000000 /* MX53_PAD_PATA_DATA15__GPIO2_15 */
693 0x80000000 /* MX53_PAD_EIM_DA11__GPIO3_11 */
697 0x80000000 /* MX53_PAD_EIM_DA12__GPIO3_12 */
701 0x80000000 /* MX53_PAD_EIM_DA13__GPIO3_13 */
868 0x80000000 /* MX53_PAD_PATA_DA_0__GPIO7_6 */
1149 0x80000000 /* MX53_PAD_GPIO_16__GPIO7_11 */
>;
};
led_pin_gpio7_7: led_gpio7_7@0 {
fsl,pins = <
873 0x80000000 /* MX53_PAD_PATA_DA_1__GPIO7_7 */
>;
};
};
};
uart1: serial@53fbc000 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1_1>;
status = "okay";
};
};
aips@60000000 { /* AIPS2 */
i2c@63fc4000 { /* I2C2 */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2_1>;
status = "okay";
sgtl5000: codec@0a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
VDDA-supply = <&reg_3p2v>;
VDDIO-supply = <&reg_3p2v>;
};
};
i2c@63fc8000 { /* I2C1 */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1_1>;
status = "okay";
accelerometer: mma8450@1c {
compatible = "fsl,mma8450";
reg = <0x1c>;
};
pmic: dialog@48 {
compatible = "dlg,da9053-aa", "dlg,da9052";
reg = <0x48>;
interrupt-parent = <&gpio7>;
interrupts = <11 0x8>; /* low-level active IRQ at GPIO7_11 */
regulators {
buck1_reg: buck1 {
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <2075000>;
regulator-always-on;
};
buck2_reg: buck2 {
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <2075000>;
regulator-always-on;
};
buck3_reg: buck3 {
regulator-min-microvolt = <925000>;
regulator-max-microvolt = <2500000>;
regulator-always-on;
};
buck4_reg: buck4 {
regulator-min-microvolt = <925000>;
regulator-max-microvolt = <2500000>;
regulator-always-on;
};
ldo1_reg: ldo1 {
regulator-min-microvolt = <600000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
regulator-always-on;
};
ldo2_reg: ldo2 {
regulator-min-microvolt = <600000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
ldo3_reg: ldo3 {
regulator-min-microvolt = <600000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
ldo4_reg: ldo4 {
regulator-min-microvolt = <1725000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
ldo5_reg: ldo5 {
regulator-min-microvolt = <1725000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
ldo6_reg: ldo6 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <3600000>;
regulator-always-on;
};
ldo7_reg: ldo7 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <3600000>;
regulator-always-on;
};
ldo8_reg: ldo8 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <3600000>;
regulator-always-on;
};
ldo9_reg: ldo9 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <3600000>;
regulator-always-on;
};
ldo10_reg: ldo10 {
regulator-min-microvolt = <1250000>;
regulator-max-microvolt = <3650000>;
regulator-always-on;
};
};
};
};
audmux@63fd0000 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_audmux_1>;
status = "okay";
};
ethernet@63fec000 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fec_1>;
phy-mode = "rmii";
phy-reset-gpios = <&gpio7 6 0>;
status = "okay";
};
};
};
gpio-keys {
compatible = "gpio-keys";
@@ -276,3 +82,189 @@
mux-ext-port = <5>;
};
};
&esdhc1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_esdhc1_1>;
cd-gpios = <&gpio3 13 0>;
status = "okay";
};
&ssi2 {
fsl,mode = "i2s-slave";
status = "okay";
};
&esdhc3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_esdhc3_1>;
cd-gpios = <&gpio3 11 0>;
wp-gpios = <&gpio3 12 0>;
status = "okay";
};
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog>;
hog {
pinctrl_hog: hoggrp {
fsl,pins = <
1071 0x80000000 /* MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK */
1141 0x80000000 /* MX53_PAD_GPIO_8__GPIO1_8 */
982 0x80000000 /* MX53_PAD_PATA_DATA14__GPIO2_14 */
989 0x80000000 /* MX53_PAD_PATA_DATA15__GPIO2_15 */
693 0x80000000 /* MX53_PAD_EIM_DA11__GPIO3_11 */
697 0x80000000 /* MX53_PAD_EIM_DA12__GPIO3_12 */
701 0x80000000 /* MX53_PAD_EIM_DA13__GPIO3_13 */
868 0x80000000 /* MX53_PAD_PATA_DA_0__GPIO7_6 */
1149 0x80000000 /* MX53_PAD_GPIO_16__GPIO7_11 */
>;
};
led_pin_gpio7_7: led_gpio7_7@0 {
fsl,pins = <
873 0x80000000 /* MX53_PAD_PATA_DA_1__GPIO7_7 */
>;
};
};
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1_1>;
status = "okay";
};
&i2c2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2_1>;
status = "okay";
sgtl5000: codec@0a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
VDDA-supply = <&reg_3p2v>;
VDDIO-supply = <&reg_3p2v>;
};
};
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1_1>;
status = "okay";
accelerometer: mma8450@1c {
compatible = "fsl,mma8450";
reg = <0x1c>;
};
pmic: dialog@48 {
compatible = "dlg,da9053-aa", "dlg,da9052";
reg = <0x48>;
interrupt-parent = <&gpio7>;
interrupts = <11 0x8>; /* low-level active IRQ at GPIO7_11 */
regulators {
buck1_reg: buck1 {
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <2075000>;
regulator-always-on;
};
buck2_reg: buck2 {
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <2075000>;
regulator-always-on;
};
buck3_reg: buck3 {
regulator-min-microvolt = <925000>;
regulator-max-microvolt = <2500000>;
regulator-always-on;
};
buck4_reg: buck4 {
regulator-min-microvolt = <925000>;
regulator-max-microvolt = <2500000>;
regulator-always-on;
};
ldo1_reg: ldo1 {
regulator-min-microvolt = <600000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
regulator-always-on;
};
ldo2_reg: ldo2 {
regulator-min-microvolt = <600000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
ldo3_reg: ldo3 {
regulator-min-microvolt = <600000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
ldo4_reg: ldo4 {
regulator-min-microvolt = <1725000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
ldo5_reg: ldo5 {
regulator-min-microvolt = <1725000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
ldo6_reg: ldo6 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <3600000>;
regulator-always-on;
};
ldo7_reg: ldo7 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <3600000>;
regulator-always-on;
};
ldo8_reg: ldo8 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <3600000>;
regulator-always-on;
};
ldo9_reg: ldo9 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <3600000>;
regulator-always-on;
};
ldo10_reg: ldo10 {
regulator-min-microvolt = <1250000>;
regulator-max-microvolt = <3650000>;
regulator-always-on;
};
};
};
};
&audmux {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_audmux_1>;
status = "okay";
};
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fec_1>;
phy-mode = "rmii";
phy-reset-gpios = <&gpio7 6 0>;
status = "okay";
};
arch/arm/boot/dts/imx53-smd.dts
+143 -151
View File
@@ -21,157 +21,6 @@
reg = <0x70000000 0x40000000>;
};
soc {
aips@50000000 { /* AIPS1 */
spba@50000000 {
esdhc@50004000 { /* ESDHC1 */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_esdhc1_1>;
cd-gpios = <&gpio3 13 0>;
wp-gpios = <&gpio4 11 0>;
status = "okay";
};
esdhc@50008000 { /* ESDHC2 */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_esdhc2_1>;
non-removable;
status = "okay";
};
uart3: serial@5000c000 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3_1>;
fsl,uart-has-rtscts;
status = "okay";
};
ecspi@50010000 { /* ECSPI1 */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi1_1>;
fsl,spi-num-chipselects = <2>;
cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>;
status = "okay";
zigbee: mc1323@0 {
compatible = "fsl,mc1323";
spi-max-frequency = <8000000>;
reg = <0>;
};
flash: m25p32@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "st,m25p32", "st,m25p";
spi-max-frequency = <20000000>;
reg = <1>;
partition@0 {
label = "U-Boot";
reg = <0x0 0x40000>;
read-only;
};
partition@40000 {
label = "Kernel";
reg = <0x40000 0x3c0000>;
};
};
};
esdhc@50020000 { /* ESDHC3 */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_esdhc3_1>;
non-removable;
status = "okay";
};
};
iomuxc@53fa8000 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog>;
hog {
pinctrl_hog: hoggrp {
fsl,pins = <
982 0x80000000 /* MX53_PAD_PATA_DATA14__GPIO2_14 */
989 0x80000000 /* MX53_PAD_PATA_DATA15__GPIO2_15 */
424 0x80000000 /* MX53_PAD_EIM_EB2__GPIO2_30 */
701 0x80000000 /* MX53_PAD_EIM_DA13__GPIO3_13 */
449 0x80000000 /* MX53_PAD_EIM_D19__GPIO3_19 */
43 0x80000000 /* MX53_PAD_KEY_ROW2__GPIO4_11 */
868 0x80000000 /* MX53_PAD_PATA_DA_0__GPIO7_6 */
>;
};
};
};
uart1: serial@53fbc000 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1_1>;
status = "okay";
};
uart2: serial@53fc0000 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2_1>;
status = "okay";
};
};
aips@60000000 { /* AIPS2 */
i2c@63fc4000 { /* I2C2 */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2_1>;
status = "okay";
codec: sgtl5000@0a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
};
magnetometer: mag3110@0e {
compatible = "fsl,mag3110";
reg = <0x0e>;
};
touchkey: mpr121@5a {
compatible = "fsl,mpr121";
reg = <0x5a>;
};
};
i2c@63fc8000 { /* I2C1 */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1_1>;
status = "okay";
accelerometer: mma8450@1c {
compatible = "fsl,mma8450";
reg = <0x1c>;
};
camera: ov5642@3c {
compatible = "ovti,ov5642";
reg = <0x3c>;
};
pmic: dialog@48 {
compatible = "dialog,da9053", "dialog,da9052";
reg = <0x48>;
};
};
ethernet@63fec000 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fec_1>;
phy-mode = "rmii";
phy-reset-gpios = <&gpio7 6 0>;
status = "okay";
};
};
};
gpio-keys {
compatible = "gpio-keys";
@@ -188,3 +37,146 @@
};
};
};
&esdhc1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_esdhc1_1>;
cd-gpios = <&gpio3 13 0>;
wp-gpios = <&gpio4 11 0>;
status = "okay";
};
&esdhc2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_esdhc2_1>;
non-removable;
status = "okay";
};
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3_1>;
fsl,uart-has-rtscts;
status = "okay";
};
&ecspi1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi1_1>;
fsl,spi-num-chipselects = <2>;
cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>;
status = "okay";
zigbee: mc1323@0 {
compatible = "fsl,mc1323";
spi-max-frequency = <8000000>;
reg = <0>;
};
flash: m25p32@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "st,m25p32", "st,m25p";
spi-max-frequency = <20000000>;
reg = <1>;
partition@0 {
label = "U-Boot";
reg = <0x0 0x40000>;
read-only;
};
partition@40000 {
label = "Kernel";
reg = <0x40000 0x3c0000>;
};
};
};
&esdhc3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_esdhc3_1>;
non-removable;
status = "okay";
};
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog>;
hog {
pinctrl_hog: hoggrp {
fsl,pins = <
982 0x80000000 /* MX53_PAD_PATA_DATA14__GPIO2_14 */
989 0x80000000 /* MX53_PAD_PATA_DATA15__GPIO2_15 */
424 0x80000000 /* MX53_PAD_EIM_EB2__GPIO2_30 */
701 0x80000000 /* MX53_PAD_EIM_DA13__GPIO3_13 */
449 0x80000000 /* MX53_PAD_EIM_D19__GPIO3_19 */
43 0x80000000 /* MX53_PAD_KEY_ROW2__GPIO4_11 */
868 0x80000000 /* MX53_PAD_PATA_DA_0__GPIO7_6 */
>;
};
};
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1_1>;
status = "okay";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2_1>;
status = "okay";
};
&i2c2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2_1>;
status = "okay";
codec: sgtl5000@0a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
};
magnetometer: mag3110@0e {
compatible = "fsl,mag3110";
reg = <0x0e>;
};
touchkey: mpr121@5a {
compatible = "fsl,mpr121";
reg = <0x5a>;
};
};
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1_1>;
status = "okay";
accelerometer: mma8450@1c {
compatible = "fsl,mma8450";
reg = <0x1c>;
};
camera: ov5642@3c {
compatible = "ovti,ov5642";
reg = <0x3c>;
};
pmic: dialog@48 {
compatible = "dialog,da9053", "dialog,da9052";
reg = <0x48>;
};
};
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fec_1>;
phy-mode = "rmii";
phy-reset-gpios = <&gpio7 6 0>;
status = "okay";
};

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