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Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-next into for-davem
This commit is contained in:
@@ -47,6 +47,7 @@ int bcma_sprom_get(struct bcma_bus *bus);
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/* driver_chipcommon.c */
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#ifdef CONFIG_BCMA_DRIVER_MIPS
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void bcma_chipco_serial_init(struct bcma_drv_cc *cc);
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extern struct platform_device bcma_pflash_dev;
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#endif /* CONFIG_BCMA_DRIVER_MIPS */
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/* driver_chipcommon_pmu.c */
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@@ -5,11 +5,11 @@
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* Licensed under the GNU/GPL. See COPYING for details.
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*/
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#include "bcma_private.h"
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#include <linux/platform_device.h>
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#include <linux/bcma/bcma.h>
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#include "bcma_private.h"
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struct platform_device bcma_nflash_dev = {
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.name = "bcma_nflash",
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.num_resources = 0,
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@@ -5,11 +5,11 @@
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* Licensed under the GNU/GPL. See COPYING for details.
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*/
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#include "bcma_private.h"
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#include <linux/platform_device.h>
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#include <linux/bcma/bcma.h>
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#include "bcma_private.h"
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static struct resource bcma_sflash_resource = {
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.name = "bcma_sflash",
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.start = BCMA_SOC_FLASH2,
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@@ -73,6 +73,16 @@ static void bcma_gpio_free(struct gpio_chip *chip, unsigned gpio)
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bcma_chipco_gpio_pullup(cc, 1 << gpio, 0);
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}
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static int bcma_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
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{
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struct bcma_drv_cc *cc = bcma_gpio_get_cc(chip);
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if (cc->core->bus->hosttype == BCMA_HOSTTYPE_SOC)
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return bcma_core_irq(cc->core);
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else
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return -EINVAL;
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}
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int bcma_gpio_init(struct bcma_drv_cc *cc)
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{
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struct gpio_chip *chip = &cc->gpio;
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@@ -85,6 +95,7 @@ int bcma_gpio_init(struct bcma_drv_cc *cc)
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chip->set = bcma_gpio_set_value;
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chip->direction_input = bcma_gpio_direction_input;
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chip->direction_output = bcma_gpio_direction_output;
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chip->to_irq = bcma_gpio_to_irq;
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chip->ngpio = 16;
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/* There is just one SoC in one device and its GPIO addresses should be
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* deterministic to address them more easily. The other buses could get
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@@ -14,11 +14,33 @@
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#include <linux/bcma/bcma.h>
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#include <linux/mtd/physmap.h>
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#include <linux/platform_device.h>
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#include <linux/serial.h>
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#include <linux/serial_core.h>
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#include <linux/serial_reg.h>
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#include <linux/time.h>
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static const char *part_probes[] = { "bcm47xxpart", NULL };
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static struct physmap_flash_data bcma_pflash_data = {
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.part_probe_types = part_probes,
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};
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static struct resource bcma_pflash_resource = {
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.name = "bcma_pflash",
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.flags = IORESOURCE_MEM,
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};
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struct platform_device bcma_pflash_dev = {
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.name = "physmap-flash",
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.dev = {
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.platform_data = &bcma_pflash_data,
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},
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.resource = &bcma_pflash_resource,
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.num_resources = 1,
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};
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/* The 47162a0 hangs when reading MIPS DMP registers registers */
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static inline bool bcma_core_mips_bcm47162a0_quirk(struct bcma_device *dev)
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{
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@@ -211,6 +233,7 @@ static void bcma_core_mips_flash_detect(struct bcma_drv_mips *mcore)
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{
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struct bcma_bus *bus = mcore->core->bus;
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struct bcma_drv_cc *cc = &bus->drv_cc;
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struct bcma_pflash *pflash = &cc->pflash;
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switch (cc->capabilities & BCMA_CC_CAP_FLASHT) {
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case BCMA_CC_FLASHT_STSER:
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@@ -220,15 +243,20 @@ static void bcma_core_mips_flash_detect(struct bcma_drv_mips *mcore)
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break;
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case BCMA_CC_FLASHT_PARA:
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bcma_debug(bus, "Found parallel flash\n");
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cc->pflash.present = true;
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cc->pflash.window = BCMA_SOC_FLASH2;
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cc->pflash.window_size = BCMA_SOC_FLASH2_SZ;
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pflash->present = true;
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pflash->window = BCMA_SOC_FLASH2;
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pflash->window_size = BCMA_SOC_FLASH2_SZ;
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if ((bcma_read32(cc->core, BCMA_CC_FLASH_CFG) &
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BCMA_CC_FLASH_CFG_DS) == 0)
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cc->pflash.buswidth = 1;
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pflash->buswidth = 1;
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else
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cc->pflash.buswidth = 2;
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pflash->buswidth = 2;
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bcma_pflash_data.width = pflash->buswidth;
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bcma_pflash_resource.start = pflash->window;
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bcma_pflash_resource.end = pflash->window + pflash->window_size;
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break;
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default:
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bcma_err(bus, "Flash type not supported\n");
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@@ -149,6 +149,14 @@ static int bcma_register_cores(struct bcma_bus *bus)
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dev_id++;
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}
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#ifdef CONFIG_BCMA_DRIVER_MIPS
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if (bus->drv_cc.pflash.present) {
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err = platform_device_register(&bcma_pflash_dev);
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if (err)
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bcma_err(bus, "Error registering parallel flash\n");
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}
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#endif
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#ifdef CONFIG_BCMA_SFLASH
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if (bus->drv_cc.sflash.present) {
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err = platform_device_register(&bcma_sflash_dev);
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@@ -58,6 +58,7 @@ config ATH9K_DEBUGFS
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bool "Atheros ath9k debugging"
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depends on ATH9K
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select MAC80211_DEBUGFS
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select RELAY
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---help---
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Say Y, if you need access to ath9k's statistics for
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interrupts, rate control, etc.
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@@ -319,6 +319,8 @@ struct ath_rx {
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struct ath_rx_edma rx_edma[ATH9K_RX_QUEUE_MAX];
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struct sk_buff *frag;
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u32 ampdu_ref;
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};
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int ath_startrecv(struct ath_softc *sc);
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@@ -754,6 +756,7 @@ struct ath_softc {
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/* relay(fs) channel for spectral scan */
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struct rchan *rfs_chan_spec_scan;
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enum spectral_mode spectral_mode;
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struct ath_spec_scan spec_config;
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int scanning;
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#ifdef CONFIG_PM_SLEEP
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@@ -863,31 +866,31 @@ static inline u8 spectral_bitmap_weight(u8 *bins)
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* interface.
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*/
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enum ath_fft_sample_type {
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ATH_FFT_SAMPLE_HT20 = 0,
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ATH_FFT_SAMPLE_HT20 = 1,
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};
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struct fft_sample_tlv {
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u8 type; /* see ath_fft_sample */
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u16 length;
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__be16 length;
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/* type dependent data follows */
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} __packed;
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struct fft_sample_ht20 {
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struct fft_sample_tlv tlv;
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u8 __alignment;
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u8 max_exp;
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u16 freq;
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__be16 freq;
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s8 rssi;
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s8 noise;
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u16 max_magnitude;
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__be16 max_magnitude;
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u8 max_index;
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u8 bitmap_weight;
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u64 tsf;
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__be64 tsf;
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u16 data[SPECTRAL_HT20_NUM_BINS];
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u8 data[SPECTRAL_HT20_NUM_BINS];
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} __packed;
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void ath9k_tasklet(unsigned long data);
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@@ -895,6 +895,7 @@ static ssize_t read_file_recv(struct file *file, char __user *user_buf,
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RXS_ERR("RX-Bytes-All", rx_bytes_all);
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RXS_ERR("RX-Beacons", rx_beacons);
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RXS_ERR("RX-Frags", rx_frags);
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RXS_ERR("RX-Spectral", rx_spectral);
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if (len > size)
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len = size;
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@@ -1035,6 +1036,182 @@ static const struct file_operations fops_spec_scan_ctl = {
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.llseek = default_llseek,
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};
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static ssize_t read_file_spectral_short_repeat(struct file *file,
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char __user *user_buf,
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size_t count, loff_t *ppos)
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{
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struct ath_softc *sc = file->private_data;
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char buf[32];
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unsigned int len;
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len = sprintf(buf, "%d\n", sc->spec_config.short_repeat);
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return simple_read_from_buffer(user_buf, count, ppos, buf, len);
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}
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static ssize_t write_file_spectral_short_repeat(struct file *file,
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const char __user *user_buf,
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size_t count, loff_t *ppos)
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{
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struct ath_softc *sc = file->private_data;
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unsigned long val;
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char buf[32];
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ssize_t len;
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len = min(count, sizeof(buf) - 1);
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if (copy_from_user(buf, user_buf, len))
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return -EFAULT;
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buf[len] = '\0';
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if (kstrtoul(buf, 0, &val))
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return -EINVAL;
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if (val < 0 || val > 1)
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return -EINVAL;
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sc->spec_config.short_repeat = val;
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return count;
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}
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static const struct file_operations fops_spectral_short_repeat = {
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.read = read_file_spectral_short_repeat,
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.write = write_file_spectral_short_repeat,
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.open = simple_open,
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.owner = THIS_MODULE,
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.llseek = default_llseek,
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};
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static ssize_t read_file_spectral_count(struct file *file,
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char __user *user_buf,
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size_t count, loff_t *ppos)
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{
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struct ath_softc *sc = file->private_data;
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char buf[32];
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unsigned int len;
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len = sprintf(buf, "%d\n", sc->spec_config.count);
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return simple_read_from_buffer(user_buf, count, ppos, buf, len);
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}
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static ssize_t write_file_spectral_count(struct file *file,
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const char __user *user_buf,
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size_t count, loff_t *ppos)
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{
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struct ath_softc *sc = file->private_data;
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unsigned long val;
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char buf[32];
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ssize_t len;
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len = min(count, sizeof(buf) - 1);
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if (copy_from_user(buf, user_buf, len))
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return -EFAULT;
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buf[len] = '\0';
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if (kstrtoul(buf, 0, &val))
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return -EINVAL;
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if (val < 0 || val > 255)
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return -EINVAL;
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sc->spec_config.count = val;
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return count;
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}
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static const struct file_operations fops_spectral_count = {
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.read = read_file_spectral_count,
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.write = write_file_spectral_count,
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.open = simple_open,
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.owner = THIS_MODULE,
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.llseek = default_llseek,
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};
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static ssize_t read_file_spectral_period(struct file *file,
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char __user *user_buf,
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size_t count, loff_t *ppos)
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{
|
||||
struct ath_softc *sc = file->private_data;
|
||||
char buf[32];
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unsigned int len;
|
||||
|
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len = sprintf(buf, "%d\n", sc->spec_config.period);
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return simple_read_from_buffer(user_buf, count, ppos, buf, len);
|
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}
|
||||
|
||||
static ssize_t write_file_spectral_period(struct file *file,
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const char __user *user_buf,
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size_t count, loff_t *ppos)
|
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{
|
||||
struct ath_softc *sc = file->private_data;
|
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unsigned long val;
|
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char buf[32];
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ssize_t len;
|
||||
|
||||
len = min(count, sizeof(buf) - 1);
|
||||
if (copy_from_user(buf, user_buf, len))
|
||||
return -EFAULT;
|
||||
|
||||
buf[len] = '\0';
|
||||
if (kstrtoul(buf, 0, &val))
|
||||
return -EINVAL;
|
||||
|
||||
if (val < 0 || val > 255)
|
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return -EINVAL;
|
||||
|
||||
sc->spec_config.period = val;
|
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return count;
|
||||
}
|
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|
||||
static const struct file_operations fops_spectral_period = {
|
||||
.read = read_file_spectral_period,
|
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.write = write_file_spectral_period,
|
||||
.open = simple_open,
|
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.owner = THIS_MODULE,
|
||||
.llseek = default_llseek,
|
||||
};
|
||||
|
||||
static ssize_t read_file_spectral_fft_period(struct file *file,
|
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char __user *user_buf,
|
||||
size_t count, loff_t *ppos)
|
||||
{
|
||||
struct ath_softc *sc = file->private_data;
|
||||
char buf[32];
|
||||
unsigned int len;
|
||||
|
||||
len = sprintf(buf, "%d\n", sc->spec_config.fft_period);
|
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return simple_read_from_buffer(user_buf, count, ppos, buf, len);
|
||||
}
|
||||
|
||||
static ssize_t write_file_spectral_fft_period(struct file *file,
|
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const char __user *user_buf,
|
||||
size_t count, loff_t *ppos)
|
||||
{
|
||||
struct ath_softc *sc = file->private_data;
|
||||
unsigned long val;
|
||||
char buf[32];
|
||||
ssize_t len;
|
||||
|
||||
len = min(count, sizeof(buf) - 1);
|
||||
if (copy_from_user(buf, user_buf, len))
|
||||
return -EFAULT;
|
||||
|
||||
buf[len] = '\0';
|
||||
if (kstrtoul(buf, 0, &val))
|
||||
return -EINVAL;
|
||||
|
||||
if (val < 0 || val > 15)
|
||||
return -EINVAL;
|
||||
|
||||
sc->spec_config.fft_period = val;
|
||||
return count;
|
||||
}
|
||||
|
||||
static const struct file_operations fops_spectral_fft_period = {
|
||||
.read = read_file_spectral_fft_period,
|
||||
.write = write_file_spectral_fft_period,
|
||||
.open = simple_open,
|
||||
.owner = THIS_MODULE,
|
||||
.llseek = default_llseek,
|
||||
};
|
||||
|
||||
static struct dentry *create_buf_file_handler(const char *filename,
|
||||
struct dentry *parent,
|
||||
umode_t mode,
|
||||
@@ -1059,11 +1236,13 @@ static int remove_buf_file_handler(struct dentry *dentry)
|
||||
void ath_debug_send_fft_sample(struct ath_softc *sc,
|
||||
struct fft_sample_tlv *fft_sample_tlv)
|
||||
{
|
||||
int length;
|
||||
if (!sc->rfs_chan_spec_scan)
|
||||
return;
|
||||
|
||||
relay_write(sc->rfs_chan_spec_scan, fft_sample_tlv,
|
||||
fft_sample_tlv->length + sizeof(*fft_sample_tlv));
|
||||
length = __be16_to_cpu(fft_sample_tlv->length) +
|
||||
sizeof(*fft_sample_tlv);
|
||||
relay_write(sc->rfs_chan_spec_scan, fft_sample_tlv, length);
|
||||
}
|
||||
|
||||
static struct rchan_callbacks rfs_spec_scan_cb = {
|
||||
@@ -1893,6 +2072,16 @@ int ath9k_init_debug(struct ath_hw *ah)
|
||||
debugfs_create_file("spectral_scan_ctl", S_IRUSR | S_IWUSR,
|
||||
sc->debug.debugfs_phy, sc,
|
||||
&fops_spec_scan_ctl);
|
||||
debugfs_create_file("spectral_short_repeat", S_IRUSR | S_IWUSR,
|
||||
sc->debug.debugfs_phy, sc,
|
||||
&fops_spectral_short_repeat);
|
||||
debugfs_create_file("spectral_count", S_IRUSR | S_IWUSR,
|
||||
sc->debug.debugfs_phy, sc, &fops_spectral_count);
|
||||
debugfs_create_file("spectral_period", S_IRUSR | S_IWUSR,
|
||||
sc->debug.debugfs_phy, sc, &fops_spectral_period);
|
||||
debugfs_create_file("spectral_fft_period", S_IRUSR | S_IWUSR,
|
||||
sc->debug.debugfs_phy, sc,
|
||||
&fops_spectral_fft_period);
|
||||
|
||||
#ifdef CONFIG_ATH9K_MAC_DEBUG
|
||||
debugfs_create_file("samples", S_IRUSR, sc->debug.debugfs_phy, sc,
|
||||
|
||||
@@ -219,6 +219,7 @@ struct ath_tx_stats {
|
||||
* @rx_too_many_frags_err: Frames dropped due to too-many-frags received.
|
||||
* @rx_beacons: No. of beacons received.
|
||||
* @rx_frags: No. of rx-fragements received.
|
||||
* @rx_spectral: No of spectral packets received.
|
||||
*/
|
||||
struct ath_rx_stats {
|
||||
u32 rx_pkts_all;
|
||||
@@ -237,6 +238,7 @@ struct ath_rx_stats {
|
||||
u32 rx_too_many_frags_err;
|
||||
u32 rx_beacons;
|
||||
u32 rx_frags;
|
||||
u32 rx_spectral;
|
||||
};
|
||||
|
||||
struct ath_stats {
|
||||
|
||||
@@ -497,6 +497,13 @@ static void ath9k_init_misc(struct ath_softc *sc)
|
||||
|
||||
if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB)
|
||||
sc->ant_comb.count = ATH_ANT_DIV_COMB_INIT_COUNT;
|
||||
|
||||
sc->spec_config.enabled = 0;
|
||||
sc->spec_config.short_repeat = true;
|
||||
sc->spec_config.count = 8;
|
||||
sc->spec_config.endless = false;
|
||||
sc->spec_config.period = 0xFF;
|
||||
sc->spec_config.fft_period = 0xF;
|
||||
}
|
||||
|
||||
static void ath9k_eeprom_request_cb(const struct firmware *eeprom_blob,
|
||||
@@ -915,7 +922,7 @@ static void ath9k_deinit_softc(struct ath_softc *sc)
|
||||
|
||||
ath9k_eeprom_release(sc);
|
||||
|
||||
if (sc->rfs_chan_spec_scan) {
|
||||
if (config_enabled(CONFIG_ATH9K_DEBUGFS) && sc->rfs_chan_spec_scan) {
|
||||
relay_close(sc->rfs_chan_spec_scan);
|
||||
sc->rfs_chan_spec_scan = NULL;
|
||||
}
|
||||
|
||||
@@ -605,13 +605,13 @@ int ath9k_hw_rxprocdesc(struct ath_hw *ah, struct ath_desc *ds,
|
||||
* reported, then decryption and MIC errors are irrelevant,
|
||||
* the frame is going to be dropped either way
|
||||
*/
|
||||
if (ads.ds_rxstatus8 & AR_CRCErr)
|
||||
rs->rs_status |= ATH9K_RXERR_CRC;
|
||||
else if (ads.ds_rxstatus8 & AR_PHYErr) {
|
||||
if (ads.ds_rxstatus8 & AR_PHYErr) {
|
||||
rs->rs_status |= ATH9K_RXERR_PHY;
|
||||
phyerr = MS(ads.ds_rxstatus8, AR_PHYErrCode);
|
||||
rs->rs_phyerr = phyerr;
|
||||
} else if (ads.ds_rxstatus8 & AR_DecryptCRCErr)
|
||||
} else if (ads.ds_rxstatus8 & AR_CRCErr)
|
||||
rs->rs_status |= ATH9K_RXERR_CRC;
|
||||
else if (ads.ds_rxstatus8 & AR_DecryptCRCErr)
|
||||
rs->rs_status |= ATH9K_RXERR_DECRYPT;
|
||||
else if (ads.ds_rxstatus8 & AR_MichaelErr)
|
||||
rs->rs_status |= ATH9K_RXERR_MIC;
|
||||
|
||||
@@ -1099,45 +1099,34 @@ int ath9k_spectral_scan_config(struct ieee80211_hw *hw,
|
||||
struct ath_softc *sc = hw->priv;
|
||||
struct ath_hw *ah = sc->sc_ah;
|
||||
struct ath_common *common = ath9k_hw_common(ah);
|
||||
struct ath_spec_scan param;
|
||||
|
||||
if (!ath9k_hw_ops(ah)->spectral_scan_trigger) {
|
||||
ath_err(common, "spectrum analyzer not implemented on this hardware\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
/* NOTE: this will generate a few samples ...
|
||||
*
|
||||
* TODO: review default parameters, and/or define an interface to set
|
||||
* them.
|
||||
*/
|
||||
param.enabled = 1;
|
||||
param.short_repeat = true;
|
||||
param.count = 8;
|
||||
param.endless = false;
|
||||
param.period = 0xFF;
|
||||
param.fft_period = 0xF;
|
||||
|
||||
switch (spectral_mode) {
|
||||
case SPECTRAL_DISABLED:
|
||||
param.enabled = 0;
|
||||
sc->spec_config.enabled = 0;
|
||||
break;
|
||||
case SPECTRAL_BACKGROUND:
|
||||
/* send endless samples.
|
||||
* TODO: is this really useful for "background"?
|
||||
*/
|
||||
param.endless = 1;
|
||||
sc->spec_config.endless = 1;
|
||||
sc->spec_config.enabled = 1;
|
||||
break;
|
||||
case SPECTRAL_CHANSCAN:
|
||||
break;
|
||||
case SPECTRAL_MANUAL:
|
||||
sc->spec_config.endless = 0;
|
||||
sc->spec_config.enabled = 1;
|
||||
break;
|
||||
default:
|
||||
return -1;
|
||||
}
|
||||
|
||||
ath9k_ps_wakeup(sc);
|
||||
ath9k_hw_ops(ah)->spectral_scan_config(ah, ¶m);
|
||||
ath9k_hw_ops(ah)->spectral_scan_config(ah, &sc->spec_config);
|
||||
ath9k_ps_restore(sc);
|
||||
|
||||
sc->spectral_mode = spectral_mode;
|
||||
|
||||
@@ -474,8 +474,6 @@ void ath_mci_cleanup(struct ath_softc *sc)
|
||||
{
|
||||
struct ath_common *common = ath9k_hw_common(sc->sc_ah);
|
||||
struct ath_hw *ah = sc->sc_ah;
|
||||
struct ath_mci_coex *mci = &sc->mci_coex;
|
||||
struct ath_mci_buf *buf = &mci->sched_buf;
|
||||
|
||||
ar9003_mci_cleanup(ah);
|
||||
|
||||
|
||||
@@ -1016,18 +1016,20 @@ static void ath9k_rx_skb_postprocess(struct ath_common *common,
|
||||
rxs->flag &= ~RX_FLAG_DECRYPTED;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_ATH9K_DEBUGFS
|
||||
static s8 fix_rssi_inv_only(u8 rssi_val)
|
||||
{
|
||||
if (rssi_val == 128)
|
||||
rssi_val = 0;
|
||||
return (s8) rssi_val;
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
static void ath_process_fft(struct ath_softc *sc, struct ieee80211_hdr *hdr,
|
||||
struct ath_rx_status *rs, u64 tsf)
|
||||
/* returns 1 if this was a spectral frame, even if not handled. */
|
||||
static int ath_process_fft(struct ath_softc *sc, struct ieee80211_hdr *hdr,
|
||||
struct ath_rx_status *rs, u64 tsf)
|
||||
{
|
||||
#ifdef CONFIG_ATH_DEBUG
|
||||
#ifdef CONFIG_ATH9K_DEBUGFS
|
||||
struct ath_hw *ah = sc->sc_ah;
|
||||
u8 bins[SPECTRAL_HT20_NUM_BINS];
|
||||
u8 *vdata = (u8 *)hdr;
|
||||
@@ -1035,7 +1037,8 @@ static void ath_process_fft(struct ath_softc *sc, struct ieee80211_hdr *hdr,
|
||||
struct ath_radar_info *radar_info;
|
||||
struct ath_ht20_mag_info *mag_info;
|
||||
int len = rs->rs_datalen;
|
||||
int i, dc_pos;
|
||||
int dc_pos;
|
||||
u16 length, max_magnitude;
|
||||
|
||||
/* AR9280 and before report via ATH9K_PHYERR_RADAR, AR93xx and newer
|
||||
* via ATH9K_PHYERR_SPECTRAL. Haven't seen ATH9K_PHYERR_FALSE_RADAR_EXT
|
||||
@@ -1044,7 +1047,14 @@ static void ath_process_fft(struct ath_softc *sc, struct ieee80211_hdr *hdr,
|
||||
if (rs->rs_phyerr != ATH9K_PHYERR_RADAR &&
|
||||
rs->rs_phyerr != ATH9K_PHYERR_FALSE_RADAR_EXT &&
|
||||
rs->rs_phyerr != ATH9K_PHYERR_SPECTRAL)
|
||||
return;
|
||||
return 0;
|
||||
|
||||
/* check if spectral scan bit is set. This does not have to be checked
|
||||
* if received through a SPECTRAL phy error, but shouldn't hurt.
|
||||
*/
|
||||
radar_info = ((struct ath_radar_info *)&vdata[len]) - 1;
|
||||
if (!(radar_info->pulse_bw_info & SPECTRAL_SCAN_BITMASK))
|
||||
return 0;
|
||||
|
||||
/* Variation in the data length is possible and will be fixed later.
|
||||
* Note that we only support HT20 for now.
|
||||
@@ -1053,19 +1063,13 @@ static void ath_process_fft(struct ath_softc *sc, struct ieee80211_hdr *hdr,
|
||||
*/
|
||||
if ((len > SPECTRAL_HT20_TOTAL_DATA_LEN + 2) ||
|
||||
(len < SPECTRAL_HT20_TOTAL_DATA_LEN - 1))
|
||||
return;
|
||||
|
||||
/* check if spectral scan bit is set. This does not have to be checked
|
||||
* if received through a SPECTRAL phy error, but shouldn't hurt.
|
||||
*/
|
||||
radar_info = ((struct ath_radar_info *)&vdata[len]) - 1;
|
||||
if (!(radar_info->pulse_bw_info & SPECTRAL_SCAN_BITMASK))
|
||||
return;
|
||||
return 1;
|
||||
|
||||
fft_sample.tlv.type = ATH_FFT_SAMPLE_HT20;
|
||||
fft_sample.tlv.length = sizeof(fft_sample) - sizeof(fft_sample.tlv);
|
||||
length = sizeof(fft_sample) - sizeof(fft_sample.tlv);
|
||||
fft_sample.tlv.length = __cpu_to_be16(length);
|
||||
|
||||
fft_sample.freq = ah->curchan->chan->center_freq;
|
||||
fft_sample.freq = __cpu_to_be16(ah->curchan->chan->center_freq);
|
||||
fft_sample.rssi = fix_rssi_inv_only(rs->rs_rssi_ctl0);
|
||||
fft_sample.noise = ah->noise;
|
||||
|
||||
@@ -1093,7 +1097,7 @@ static void ath_process_fft(struct ath_softc *sc, struct ieee80211_hdr *hdr,
|
||||
memcpy(&bins[32], &vdata[33], SPECTRAL_HT20_NUM_BINS - 32);
|
||||
break;
|
||||
default:
|
||||
return;
|
||||
return 1;
|
||||
}
|
||||
|
||||
/* DC value (value in the middle) is the blind spot of the spectral
|
||||
@@ -1105,19 +1109,41 @@ static void ath_process_fft(struct ath_softc *sc, struct ieee80211_hdr *hdr,
|
||||
/* mag data is at the end of the frame, in front of radar_info */
|
||||
mag_info = ((struct ath_ht20_mag_info *)radar_info) - 1;
|
||||
|
||||
/* Apply exponent and grab further auxiliary information. */
|
||||
for (i = 0; i < SPECTRAL_HT20_NUM_BINS; i++)
|
||||
fft_sample.data[i] = bins[i] << mag_info->max_exp;
|
||||
/* copy raw bins without scaling them */
|
||||
memcpy(fft_sample.data, bins, SPECTRAL_HT20_NUM_BINS);
|
||||
fft_sample.max_exp = mag_info->max_exp & 0xf;
|
||||
|
||||
fft_sample.max_magnitude = spectral_max_magnitude(mag_info->all_bins);
|
||||
max_magnitude = spectral_max_magnitude(mag_info->all_bins);
|
||||
fft_sample.max_magnitude = __cpu_to_be16(max_magnitude);
|
||||
fft_sample.max_index = spectral_max_index(mag_info->all_bins);
|
||||
fft_sample.bitmap_weight = spectral_bitmap_weight(mag_info->all_bins);
|
||||
fft_sample.tsf = tsf;
|
||||
fft_sample.tsf = __cpu_to_be64(tsf);
|
||||
|
||||
ath_debug_send_fft_sample(sc, &fft_sample.tlv);
|
||||
return 1;
|
||||
#else
|
||||
return 0;
|
||||
#endif
|
||||
}
|
||||
|
||||
static void ath9k_apply_ampdu_details(struct ath_softc *sc,
|
||||
struct ath_rx_status *rs, struct ieee80211_rx_status *rxs)
|
||||
{
|
||||
if (rs->rs_isaggr) {
|
||||
rxs->flag |= RX_FLAG_AMPDU_DETAILS | RX_FLAG_AMPDU_LAST_KNOWN;
|
||||
|
||||
rxs->ampdu_reference = sc->rx.ampdu_ref;
|
||||
|
||||
if (!rs->rs_moreaggr) {
|
||||
rxs->flag |= RX_FLAG_AMPDU_IS_LAST;
|
||||
sc->rx.ampdu_ref++;
|
||||
}
|
||||
|
||||
if (rs->rs_flags & ATH9K_RX_DELIM_CRC_PRE)
|
||||
rxs->flag |= RX_FLAG_AMPDU_DELIM_CRC_ERROR;
|
||||
}
|
||||
}
|
||||
|
||||
int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp)
|
||||
{
|
||||
struct ath_buf *bf;
|
||||
@@ -1202,8 +1228,12 @@ int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp)
|
||||
unlikely(tsf_lower - rs.rs_tstamp > 0x10000000))
|
||||
rxs->mactime += 0x100000000ULL;
|
||||
|
||||
if ((rs.rs_status & ATH9K_RXERR_PHY))
|
||||
ath_process_fft(sc, hdr, &rs, rxs->mactime);
|
||||
if (rs.rs_status & ATH9K_RXERR_PHY) {
|
||||
if (ath_process_fft(sc, hdr, &rs, rxs->mactime)) {
|
||||
RX_STAT_INC(rx_spectral);
|
||||
goto requeue_drop_frag;
|
||||
}
|
||||
}
|
||||
|
||||
retval = ath9k_rx_skb_preprocess(common, hw, hdr, &rs,
|
||||
rxs, &decrypt_error);
|
||||
@@ -1320,6 +1350,8 @@ int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp)
|
||||
if ((ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB) && sc->ant_rx == 3)
|
||||
ath_ant_comb_scan(sc, &rs);
|
||||
|
||||
ath9k_apply_ampdu_details(sc, &rs, rxs);
|
||||
|
||||
ieee80211_rx(hw, skb);
|
||||
|
||||
requeue_drop_frag:
|
||||
|
||||
@@ -204,7 +204,6 @@ static int wil_cfg80211_scan(struct wiphy *wiphy,
|
||||
break;
|
||||
default:
|
||||
return -EOPNOTSUPP;
|
||||
|
||||
}
|
||||
|
||||
/* FW don't support scan after connection attempt */
|
||||
@@ -228,8 +227,8 @@ static int wil_cfg80211_scan(struct wiphy *wiphy,
|
||||
}
|
||||
/* 0-based channel indexes */
|
||||
cmd.cmd.channel_list[cmd.cmd.num_channels++].channel = ch - 1;
|
||||
wil_dbg(wil, "Scan for ch %d : %d MHz\n", ch,
|
||||
request->channels[i]->center_freq);
|
||||
wil_dbg_misc(wil, "Scan for ch %d : %d MHz\n", ch,
|
||||
request->channels[i]->center_freq);
|
||||
}
|
||||
|
||||
return wmi_send(wil, WMI_START_SCAN_CMDID, &cmd, sizeof(cmd.cmd) +
|
||||
@@ -425,8 +424,8 @@ static int wil_cfg80211_start_ap(struct wiphy *wiphy,
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
wil_dbg(wil, "AP on Channel %d %d MHz, %s\n", channel->hw_value,
|
||||
channel->center_freq, info->privacy ? "secure" : "open");
|
||||
wil_dbg_misc(wil, "AP on Channel %d %d MHz, %s\n", channel->hw_value,
|
||||
channel->center_freq, info->privacy ? "secure" : "open");
|
||||
print_hex_dump_bytes("SSID ", DUMP_PREFIX_OFFSET,
|
||||
info->ssid, info->ssid_len);
|
||||
|
||||
|
||||
@@ -38,7 +38,9 @@
|
||||
#define WIL6210_IMC_RX BIT_DMA_EP_RX_ICR_RX_DONE
|
||||
#define WIL6210_IMC_TX (BIT_DMA_EP_TX_ICR_TX_DONE | \
|
||||
BIT_DMA_EP_TX_ICR_TX_DONE_N(0))
|
||||
#define WIL6210_IMC_MISC (ISR_MISC_FW_READY | ISR_MISC_MBOX_EVT)
|
||||
#define WIL6210_IMC_MISC (ISR_MISC_FW_READY | \
|
||||
ISR_MISC_MBOX_EVT | \
|
||||
ISR_MISC_FW_ERROR)
|
||||
|
||||
#define WIL6210_IRQ_PSEUDO_MASK (u32)(~(BIT_DMA_PSEUDO_CAUSE_RX | \
|
||||
BIT_DMA_PSEUDO_CAUSE_TX | \
|
||||
@@ -50,7 +52,6 @@
|
||||
|
||||
static inline void wil_icr_clear(u32 x, void __iomem *addr)
|
||||
{
|
||||
|
||||
}
|
||||
#else /* defined(CONFIG_WIL6210_ISR_COR) */
|
||||
/* configure to Write-1-to-Clear mode */
|
||||
@@ -94,7 +95,7 @@ static void wil6210_mask_irq_misc(struct wil6210_priv *wil)
|
||||
|
||||
static void wil6210_mask_irq_pseudo(struct wil6210_priv *wil)
|
||||
{
|
||||
wil_dbg_IRQ(wil, "%s()\n", __func__);
|
||||
wil_dbg_irq(wil, "%s()\n", __func__);
|
||||
|
||||
iowrite32(WIL6210_IRQ_DISABLE, wil->csr +
|
||||
HOSTADDR(RGF_DMA_PSEUDO_CAUSE_MASK_SW));
|
||||
@@ -125,7 +126,7 @@ static void wil6210_unmask_irq_misc(struct wil6210_priv *wil)
|
||||
|
||||
static void wil6210_unmask_irq_pseudo(struct wil6210_priv *wil)
|
||||
{
|
||||
wil_dbg_IRQ(wil, "%s()\n", __func__);
|
||||
wil_dbg_irq(wil, "%s()\n", __func__);
|
||||
|
||||
set_bit(wil_status_irqen, &wil->status);
|
||||
|
||||
@@ -135,7 +136,7 @@ static void wil6210_unmask_irq_pseudo(struct wil6210_priv *wil)
|
||||
|
||||
void wil6210_disable_irq(struct wil6210_priv *wil)
|
||||
{
|
||||
wil_dbg_IRQ(wil, "%s()\n", __func__);
|
||||
wil_dbg_irq(wil, "%s()\n", __func__);
|
||||
|
||||
wil6210_mask_irq_tx(wil);
|
||||
wil6210_mask_irq_rx(wil);
|
||||
@@ -145,7 +146,7 @@ void wil6210_disable_irq(struct wil6210_priv *wil)
|
||||
|
||||
void wil6210_enable_irq(struct wil6210_priv *wil)
|
||||
{
|
||||
wil_dbg_IRQ(wil, "%s()\n", __func__);
|
||||
wil_dbg_irq(wil, "%s()\n", __func__);
|
||||
|
||||
iowrite32(WIL_ICR_ICC_VALUE, wil->csr + HOSTADDR(RGF_DMA_EP_RX_ICR) +
|
||||
offsetof(struct RGF_ICR, ICC));
|
||||
@@ -167,7 +168,7 @@ static irqreturn_t wil6210_irq_rx(int irq, void *cookie)
|
||||
HOSTADDR(RGF_DMA_EP_RX_ICR) +
|
||||
offsetof(struct RGF_ICR, ICR));
|
||||
|
||||
wil_dbg_IRQ(wil, "ISR RX 0x%08x\n", isr);
|
||||
wil_dbg_irq(wil, "ISR RX 0x%08x\n", isr);
|
||||
|
||||
if (!isr) {
|
||||
wil_err(wil, "spurious IRQ: RX\n");
|
||||
@@ -177,7 +178,7 @@ static irqreturn_t wil6210_irq_rx(int irq, void *cookie)
|
||||
wil6210_mask_irq_rx(wil);
|
||||
|
||||
if (isr & BIT_DMA_EP_RX_ICR_RX_DONE) {
|
||||
wil_dbg_IRQ(wil, "RX done\n");
|
||||
wil_dbg_irq(wil, "RX done\n");
|
||||
isr &= ~BIT_DMA_EP_RX_ICR_RX_DONE;
|
||||
wil_rx_handle(wil);
|
||||
}
|
||||
@@ -197,7 +198,7 @@ static irqreturn_t wil6210_irq_tx(int irq, void *cookie)
|
||||
HOSTADDR(RGF_DMA_EP_TX_ICR) +
|
||||
offsetof(struct RGF_ICR, ICR));
|
||||
|
||||
wil_dbg_IRQ(wil, "ISR TX 0x%08x\n", isr);
|
||||
wil_dbg_irq(wil, "ISR TX 0x%08x\n", isr);
|
||||
|
||||
if (!isr) {
|
||||
wil_err(wil, "spurious IRQ: TX\n");
|
||||
@@ -208,13 +209,13 @@ static irqreturn_t wil6210_irq_tx(int irq, void *cookie)
|
||||
|
||||
if (isr & BIT_DMA_EP_TX_ICR_TX_DONE) {
|
||||
uint i;
|
||||
wil_dbg_IRQ(wil, "TX done\n");
|
||||
wil_dbg_irq(wil, "TX done\n");
|
||||
isr &= ~BIT_DMA_EP_TX_ICR_TX_DONE;
|
||||
for (i = 0; i < 24; i++) {
|
||||
u32 mask = BIT_DMA_EP_TX_ICR_TX_DONE_N(i);
|
||||
if (isr & mask) {
|
||||
isr &= ~mask;
|
||||
wil_dbg_IRQ(wil, "TX done(%i)\n", i);
|
||||
wil_dbg_irq(wil, "TX done(%i)\n", i);
|
||||
wil_tx_complete(wil, i);
|
||||
}
|
||||
}
|
||||
@@ -228,6 +229,17 @@ static irqreturn_t wil6210_irq_tx(int irq, void *cookie)
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
static void wil_notify_fw_error(struct wil6210_priv *wil)
|
||||
{
|
||||
struct device *dev = &wil_to_ndev(wil)->dev;
|
||||
char *envp[3] = {
|
||||
[0] = "SOURCE=wil6210",
|
||||
[1] = "EVENT=FW_ERROR",
|
||||
[2] = NULL,
|
||||
};
|
||||
kobject_uevent_env(&dev->kobj, KOBJ_CHANGE, envp);
|
||||
}
|
||||
|
||||
static irqreturn_t wil6210_irq_misc(int irq, void *cookie)
|
||||
{
|
||||
struct wil6210_priv *wil = cookie;
|
||||
@@ -235,7 +247,7 @@ static irqreturn_t wil6210_irq_misc(int irq, void *cookie)
|
||||
HOSTADDR(RGF_DMA_EP_MISC_ICR) +
|
||||
offsetof(struct RGF_ICR, ICR));
|
||||
|
||||
wil_dbg_IRQ(wil, "ISR MISC 0x%08x\n", isr);
|
||||
wil_dbg_irq(wil, "ISR MISC 0x%08x\n", isr);
|
||||
|
||||
if (!isr) {
|
||||
wil_err(wil, "spurious IRQ: MISC\n");
|
||||
@@ -244,8 +256,15 @@ static irqreturn_t wil6210_irq_misc(int irq, void *cookie)
|
||||
|
||||
wil6210_mask_irq_misc(wil);
|
||||
|
||||
if (isr & ISR_MISC_FW_ERROR) {
|
||||
wil_dbg_irq(wil, "IRQ: Firmware error\n");
|
||||
clear_bit(wil_status_fwready, &wil->status);
|
||||
wil_notify_fw_error(wil);
|
||||
isr &= ~ISR_MISC_FW_ERROR;
|
||||
}
|
||||
|
||||
if (isr & ISR_MISC_FW_READY) {
|
||||
wil_dbg_IRQ(wil, "IRQ: FW ready\n");
|
||||
wil_dbg_irq(wil, "IRQ: FW ready\n");
|
||||
/**
|
||||
* Actual FW ready indicated by the
|
||||
* WMI_FW_READY_EVENTID
|
||||
@@ -268,10 +287,10 @@ static irqreturn_t wil6210_irq_misc_thread(int irq, void *cookie)
|
||||
struct wil6210_priv *wil = cookie;
|
||||
u32 isr = wil->isr_misc;
|
||||
|
||||
wil_dbg_IRQ(wil, "Thread ISR MISC 0x%08x\n", isr);
|
||||
wil_dbg_irq(wil, "Thread ISR MISC 0x%08x\n", isr);
|
||||
|
||||
if (isr & ISR_MISC_MBOX_EVT) {
|
||||
wil_dbg_IRQ(wil, "MBOX event\n");
|
||||
wil_dbg_irq(wil, "MBOX event\n");
|
||||
wmi_recv_cmd(wil);
|
||||
isr &= ~ISR_MISC_MBOX_EVT;
|
||||
}
|
||||
@@ -293,7 +312,7 @@ static irqreturn_t wil6210_thread_irq(int irq, void *cookie)
|
||||
{
|
||||
struct wil6210_priv *wil = cookie;
|
||||
|
||||
wil_dbg_IRQ(wil, "Thread IRQ\n");
|
||||
wil_dbg_irq(wil, "Thread IRQ\n");
|
||||
/* Discover real IRQ cause */
|
||||
if (wil->isr_misc)
|
||||
wil6210_irq_misc_thread(irq, cookie);
|
||||
@@ -370,6 +389,8 @@ static irqreturn_t wil6210_hardirq(int irq, void *cookie)
|
||||
if (wil6210_debug_irq_mask(wil, pseudo_cause))
|
||||
return IRQ_NONE;
|
||||
|
||||
wil_dbg_irq(wil, "Pseudo IRQ 0x%08x\n", pseudo_cause);
|
||||
|
||||
wil6210_mask_irq_pseudo(wil);
|
||||
|
||||
/* Discover real IRQ cause
|
||||
@@ -401,8 +422,6 @@ static irqreturn_t wil6210_hardirq(int irq, void *cookie)
|
||||
if (rc != IRQ_WAKE_THREAD)
|
||||
wil6210_unmask_irq_pseudo(wil);
|
||||
|
||||
wil_dbg_IRQ(wil, "Hard IRQ 0x%08x\n", pseudo_cause);
|
||||
|
||||
return rc;
|
||||
}
|
||||
|
||||
|
||||
@@ -64,7 +64,7 @@ static void _wil6210_disconnect(struct wil6210_priv *wil, void *bssid)
|
||||
struct net_device *ndev = wil_to_ndev(wil);
|
||||
struct wireless_dev *wdev = wil->wdev;
|
||||
|
||||
wil_dbg(wil, "%s()\n", __func__);
|
||||
wil_dbg_misc(wil, "%s()\n", __func__);
|
||||
|
||||
wil_link_off(wil);
|
||||
clear_bit(wil_status_fwconnected, &wil->status);
|
||||
@@ -80,11 +80,13 @@ static void _wil6210_disconnect(struct wil6210_priv *wil, void *bssid)
|
||||
GFP_KERNEL);
|
||||
break;
|
||||
default:
|
||||
;
|
||||
break;
|
||||
}
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(wil->vring_tx); i++)
|
||||
wil_vring_fini_tx(wil, i);
|
||||
|
||||
clear_bit(wil_status_dontscan, &wil->status);
|
||||
}
|
||||
|
||||
static void wil_disconnect_worker(struct work_struct *work)
|
||||
@@ -99,7 +101,7 @@ static void wil_connect_timer_fn(ulong x)
|
||||
{
|
||||
struct wil6210_priv *wil = (void *)x;
|
||||
|
||||
wil_dbg(wil, "Connect timeout\n");
|
||||
wil_dbg_misc(wil, "Connect timeout\n");
|
||||
|
||||
/* reschedule to thread context - disconnect won't
|
||||
* run from atomic context
|
||||
@@ -107,9 +109,18 @@ static void wil_connect_timer_fn(ulong x)
|
||||
schedule_work(&wil->disconnect_worker);
|
||||
}
|
||||
|
||||
static void wil_cache_mbox_regs(struct wil6210_priv *wil)
|
||||
{
|
||||
/* make shadow copy of registers that should not change on run time */
|
||||
wil_memcpy_fromio_32(&wil->mbox_ctl, wil->csr + HOST_MBOX,
|
||||
sizeof(struct wil6210_mbox_ctl));
|
||||
wil_mbox_ring_le2cpus(&wil->mbox_ctl.rx);
|
||||
wil_mbox_ring_le2cpus(&wil->mbox_ctl.tx);
|
||||
}
|
||||
|
||||
int wil_priv_init(struct wil6210_priv *wil)
|
||||
{
|
||||
wil_dbg(wil, "%s()\n", __func__);
|
||||
wil_dbg_misc(wil, "%s()\n", __func__);
|
||||
|
||||
mutex_init(&wil->mutex);
|
||||
mutex_init(&wil->wmi_mutex);
|
||||
@@ -136,11 +147,7 @@ int wil_priv_init(struct wil6210_priv *wil)
|
||||
return -EAGAIN;
|
||||
}
|
||||
|
||||
/* make shadow copy of registers that should not change on run time */
|
||||
wil_memcpy_fromio_32(&wil->mbox_ctl, wil->csr + HOST_MBOX,
|
||||
sizeof(struct wil6210_mbox_ctl));
|
||||
wil_mbox_ring_le2cpus(&wil->mbox_ctl.rx);
|
||||
wil_mbox_ring_le2cpus(&wil->mbox_ctl.tx);
|
||||
wil_cache_mbox_regs(wil);
|
||||
|
||||
return 0;
|
||||
}
|
||||
@@ -162,7 +169,7 @@ void wil_priv_deinit(struct wil6210_priv *wil)
|
||||
|
||||
static void wil_target_reset(struct wil6210_priv *wil)
|
||||
{
|
||||
wil_dbg(wil, "Resetting...\n");
|
||||
wil_dbg_misc(wil, "Resetting...\n");
|
||||
|
||||
/* register write */
|
||||
#define W(a, v) iowrite32(v, wil->csr + HOSTADDR(a))
|
||||
@@ -202,7 +209,7 @@ static void wil_target_reset(struct wil6210_priv *wil)
|
||||
|
||||
msleep(2000);
|
||||
|
||||
wil_dbg(wil, "Reset completed\n");
|
||||
wil_dbg_misc(wil, "Reset completed\n");
|
||||
|
||||
#undef W
|
||||
#undef S
|
||||
@@ -225,8 +232,8 @@ static int wil_wait_for_fw_ready(struct wil6210_priv *wil)
|
||||
wil_err(wil, "Firmware not ready\n");
|
||||
return -ETIME;
|
||||
} else {
|
||||
wil_dbg(wil, "FW ready after %d ms\n",
|
||||
jiffies_to_msecs(to-left));
|
||||
wil_dbg_misc(wil, "FW ready after %d ms\n",
|
||||
jiffies_to_msecs(to-left));
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
@@ -243,14 +250,14 @@ int wil_reset(struct wil6210_priv *wil)
|
||||
cancel_work_sync(&wil->disconnect_worker);
|
||||
wil6210_disconnect(wil, NULL);
|
||||
|
||||
wmi_event_flush(wil);
|
||||
|
||||
flush_workqueue(wil->wmi_wq);
|
||||
flush_workqueue(wil->wmi_wq_conn);
|
||||
|
||||
wil6210_disable_irq(wil);
|
||||
wil->status = 0;
|
||||
|
||||
wmi_event_flush(wil);
|
||||
|
||||
flush_workqueue(wil->wmi_wq_conn);
|
||||
flush_workqueue(wil->wmi_wq);
|
||||
|
||||
/* TODO: put MAC in reset */
|
||||
wil_target_reset(wil);
|
||||
|
||||
@@ -258,11 +265,7 @@ int wil_reset(struct wil6210_priv *wil)
|
||||
wil->pending_connect_cid = -1;
|
||||
INIT_COMPLETION(wil->wmi_ready);
|
||||
|
||||
/* make shadow copy of registers that should not change on run time */
|
||||
wil_memcpy_fromio_32(&wil->mbox_ctl, wil->csr + HOST_MBOX,
|
||||
sizeof(struct wil6210_mbox_ctl));
|
||||
wil_mbox_ring_le2cpus(&wil->mbox_ctl.rx);
|
||||
wil_mbox_ring_le2cpus(&wil->mbox_ctl.tx);
|
||||
wil_cache_mbox_regs(wil);
|
||||
|
||||
/* TODO: release MAC reset */
|
||||
wil6210_enable_irq(wil);
|
||||
@@ -278,7 +281,7 @@ void wil_link_on(struct wil6210_priv *wil)
|
||||
{
|
||||
struct net_device *ndev = wil_to_ndev(wil);
|
||||
|
||||
wil_dbg(wil, "%s()\n", __func__);
|
||||
wil_dbg_misc(wil, "%s()\n", __func__);
|
||||
|
||||
netif_carrier_on(ndev);
|
||||
netif_tx_wake_all_queues(ndev);
|
||||
@@ -288,7 +291,7 @@ void wil_link_off(struct wil6210_priv *wil)
|
||||
{
|
||||
struct net_device *ndev = wil_to_ndev(wil);
|
||||
|
||||
wil_dbg(wil, "%s()\n", __func__);
|
||||
wil_dbg_misc(wil, "%s()\n", __func__);
|
||||
|
||||
netif_tx_stop_all_queues(ndev);
|
||||
netif_carrier_off(ndev);
|
||||
@@ -311,27 +314,27 @@ static int __wil_up(struct wil6210_priv *wil)
|
||||
wmi_nettype = wil_iftype_nl2wmi(NL80211_IFTYPE_ADHOC);
|
||||
switch (wdev->iftype) {
|
||||
case NL80211_IFTYPE_STATION:
|
||||
wil_dbg(wil, "type: STATION\n");
|
||||
wil_dbg_misc(wil, "type: STATION\n");
|
||||
bi = 0;
|
||||
ndev->type = ARPHRD_ETHER;
|
||||
break;
|
||||
case NL80211_IFTYPE_AP:
|
||||
wil_dbg(wil, "type: AP\n");
|
||||
wil_dbg_misc(wil, "type: AP\n");
|
||||
bi = 100;
|
||||
ndev->type = ARPHRD_ETHER;
|
||||
break;
|
||||
case NL80211_IFTYPE_P2P_CLIENT:
|
||||
wil_dbg(wil, "type: P2P_CLIENT\n");
|
||||
wil_dbg_misc(wil, "type: P2P_CLIENT\n");
|
||||
bi = 0;
|
||||
ndev->type = ARPHRD_ETHER;
|
||||
break;
|
||||
case NL80211_IFTYPE_P2P_GO:
|
||||
wil_dbg(wil, "type: P2P_GO\n");
|
||||
wil_dbg_misc(wil, "type: P2P_GO\n");
|
||||
bi = 100;
|
||||
ndev->type = ARPHRD_ETHER;
|
||||
break;
|
||||
case NL80211_IFTYPE_MONITOR:
|
||||
wil_dbg(wil, "type: Monitor\n");
|
||||
wil_dbg_misc(wil, "type: Monitor\n");
|
||||
bi = 0;
|
||||
ndev->type = ARPHRD_IEEE80211_RADIOTAP;
|
||||
/* ARPHRD_IEEE80211 or ARPHRD_IEEE80211_RADIOTAP ? */
|
||||
@@ -354,7 +357,7 @@ static int __wil_up(struct wil6210_priv *wil)
|
||||
wmi_set_channel(wil, channel->hw_value);
|
||||
break;
|
||||
default:
|
||||
;
|
||||
break;
|
||||
}
|
||||
|
||||
/* MAC address - pre-requisite for other commands */
|
||||
|
||||
@@ -35,37 +35,12 @@ static int wil_stop(struct net_device *ndev)
|
||||
return wil_down(wil);
|
||||
}
|
||||
|
||||
/*
|
||||
* AC to queue mapping
|
||||
*
|
||||
* AC_VO -> queue 3
|
||||
* AC_VI -> queue 2
|
||||
* AC_BE -> queue 1
|
||||
* AC_BK -> queue 0
|
||||
*/
|
||||
static u16 wil_select_queue(struct net_device *ndev, struct sk_buff *skb)
|
||||
{
|
||||
static const u16 wil_1d_to_queue[8] = { 1, 0, 0, 1, 2, 2, 3, 3 };
|
||||
struct wil6210_priv *wil = ndev_to_wil(ndev);
|
||||
u16 rc;
|
||||
|
||||
skb->priority = cfg80211_classify8021d(skb);
|
||||
|
||||
rc = wil_1d_to_queue[skb->priority];
|
||||
|
||||
wil_dbg_TXRX(wil, "%s() %d -> %d\n", __func__, (int)skb->priority,
|
||||
(int)rc);
|
||||
|
||||
return rc;
|
||||
}
|
||||
|
||||
static const struct net_device_ops wil_netdev_ops = {
|
||||
.ndo_open = wil_open,
|
||||
.ndo_stop = wil_stop,
|
||||
.ndo_start_xmit = wil_start_xmit,
|
||||
.ndo_select_queue = wil_select_queue,
|
||||
.ndo_set_mac_address = eth_mac_addr,
|
||||
.ndo_validate_addr = eth_validate_addr,
|
||||
.ndo_set_mac_address = eth_mac_addr,
|
||||
.ndo_validate_addr = eth_validate_addr,
|
||||
};
|
||||
|
||||
void *wil_if_alloc(struct device *dev, void __iomem *csr)
|
||||
@@ -97,7 +72,7 @@ void *wil_if_alloc(struct device *dev, void __iomem *csr)
|
||||
ch = wdev->wiphy->bands[IEEE80211_BAND_60GHZ]->channels;
|
||||
cfg80211_chandef_create(&wdev->preset_chandef, ch, NL80211_CHAN_NO_HT);
|
||||
|
||||
ndev = alloc_netdev_mqs(0, "wlan%d", ether_setup, WIL6210_TX_QUEUES, 1);
|
||||
ndev = alloc_netdev(0, "wlan%d", ether_setup);
|
||||
if (!ndev) {
|
||||
dev_err(dev, "alloc_netdev_mqs failed\n");
|
||||
rc = -ENOMEM;
|
||||
|
||||
@@ -53,7 +53,7 @@ static int wil_if_pcie_enable(struct wil6210_priv *wil)
|
||||
}
|
||||
wil->n_msi = use_msi;
|
||||
if (wil->n_msi) {
|
||||
wil_dbg(wil, "Setup %d MSI interrupts\n", use_msi);
|
||||
wil_dbg_misc(wil, "Setup %d MSI interrupts\n", use_msi);
|
||||
rc = pci_enable_msi_block(pdev, wil->n_msi);
|
||||
if (rc && (wil->n_msi == 3)) {
|
||||
wil_err(wil, "3 MSI mode failed, try 1 MSI\n");
|
||||
@@ -65,7 +65,7 @@ static int wil_if_pcie_enable(struct wil6210_priv *wil)
|
||||
wil->n_msi = 0;
|
||||
}
|
||||
} else {
|
||||
wil_dbg(wil, "MSI interrupts disabled, use INTx\n");
|
||||
wil_dbg_misc(wil, "MSI interrupts disabled, use INTx\n");
|
||||
}
|
||||
|
||||
rc = wil6210_init_irq(wil, pdev->irq);
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user