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Merge branch 'at91' into devel
This commit is contained in:
Linus Walleij
@@ -9,6 +9,10 @@ Required properties:
|
||||
unused).
|
||||
- gpio-controller: Marks the device node as a GPIO controller.
|
||||
|
||||
optional properties:
|
||||
- #gpio-lines: Number of gpio if absent 32.
|
||||
|
||||
|
||||
Example:
|
||||
pioA: gpio@fffff200 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
@@ -16,5 +20,6 @@ Example:
|
||||
interrupts = <2 4>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
#gpio-lines = <19>;
|
||||
};
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||||
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||||
|
||||
@@ -0,0 +1,136 @@
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||||
* Atmel AT91 Pinmux Controller
|
||||
|
||||
The AT91 Pinmux Controler, enables the IC
|
||||
to share one PAD to several functional blocks. The sharing is done by
|
||||
multiplexing the PAD input/output signals. For each PAD there are up to
|
||||
8 muxing options (called periph modes). Since different modules require
|
||||
different PAD settings (like pull up, keeper, etc) the contoller controls
|
||||
also the PAD settings parameters.
|
||||
|
||||
Please refer to pinctrl-bindings.txt in this directory for details of the
|
||||
common pinctrl bindings used by client devices, including the meaning of the
|
||||
phrase "pin configuration node".
|
||||
|
||||
Atmel AT91 pin configuration node is a node of a group of pins which can be
|
||||
used for a specific device or function. This node represents both mux and config
|
||||
of the pins in that group. The 'pins' selects the function mode(also named pin
|
||||
mode) this pin can work on and the 'config' configures various pad settings
|
||||
such as pull-up, multi drive, etc.
|
||||
|
||||
Required properties for iomux controller:
|
||||
- compatible: "atmel,at91rm9200-pinctrl"
|
||||
- atmel,mux-mask: array of mask (periph per bank) to describe if a pin can be
|
||||
configured in this periph mode. All the periph and bank need to be describe.
|
||||
|
||||
How to create such array:
|
||||
|
||||
Each column will represent the possible peripheral of the pinctrl
|
||||
Each line will represent a pio bank
|
||||
|
||||
Take an example on the 9260
|
||||
Peripheral: 2 ( A and B)
|
||||
Bank: 3 (A, B and C)
|
||||
=>
|
||||
|
||||
/* A B */
|
||||
0xffffffff 0xffc00c3b /* pioA */
|
||||
0xffffffff 0x7fff3ccf /* pioB */
|
||||
0xffffffff 0x007fffff /* pioC */
|
||||
|
||||
For each peripheral/bank we will descibe in a u32 if a pin can can be
|
||||
configured in it by putting 1 to the pin bit (1 << pin)
|
||||
|
||||
Let's take the pioA on peripheral B
|
||||
From the datasheet Table 10-2.
|
||||
Peripheral B
|
||||
PA0 MCDB0
|
||||
PA1 MCCDB
|
||||
PA2
|
||||
PA3 MCDB3
|
||||
PA4 MCDB2
|
||||
PA5 MCDB1
|
||||
PA6
|
||||
PA7
|
||||
PA8
|
||||
PA9
|
||||
PA10 ETX2
|
||||
PA11 ETX3
|
||||
PA12
|
||||
PA13
|
||||
PA14
|
||||
PA15
|
||||
PA16
|
||||
PA17
|
||||
PA18
|
||||
PA19
|
||||
PA20
|
||||
PA21
|
||||
PA22 ETXER
|
||||
PA23 ETX2
|
||||
PA24 ETX3
|
||||
PA25 ERX2
|
||||
PA26 ERX3
|
||||
PA27 ERXCK
|
||||
PA28 ECRS
|
||||
PA29 ECOL
|
||||
PA30 RXD4
|
||||
PA31 TXD4
|
||||
|
||||
=> 0xffc00c3b
|
||||
|
||||
Required properties for pin configuration node:
|
||||
- atmel,pins: 4 integers array, represents a group of pins mux and config
|
||||
setting. The format is atmel,pins = <PIN_BANK PIN_BANK_NUM PERIPH CONFIG>.
|
||||
The PERIPH 0 means gpio.
|
||||
|
||||
Bits used for CONFIG:
|
||||
PULL_UP(1 << 0): indicate this pin need a pull up.
|
||||
MULTIDRIVE(1 << 1): indicate this pin need to be configured as multidrive.
|
||||
|
||||
NOTE:
|
||||
Some requirements for using atmel,at91rm9200-pinctrl binding:
|
||||
1. We have pin function node defined under at91 controller node to represent
|
||||
what pinmux functions this SoC supports.
|
||||
2. The driver can use the function node's name and pin configuration node's
|
||||
name describe the pin function and group hierarchy.
|
||||
For example, Linux at91 pinctrl driver takes the function node's name
|
||||
as the function name and pin configuration node's name as group name to
|
||||
create the map table.
|
||||
3. Each pin configuration node should have a phandle, devices can set pins
|
||||
configurations by referring to the phandle of that pin configuration node.
|
||||
4. The gpio controller must be describe in the pinctrl simple-bus.
|
||||
|
||||
Examples:
|
||||
|
||||
pinctrl@fffff400 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
|
||||
reg = <0xfffff400 0x600>;
|
||||
|
||||
atmel,mux-mask = <
|
||||
/* A B */
|
||||
0xffffffff 0xffc00c3b /* pioA */
|
||||
0xffffffff 0x7fff3ccf /* pioB */
|
||||
0xffffffff 0x007fffff /* pioC */
|
||||
>;
|
||||
|
||||
/* shared pinctrl settings */
|
||||
dbgu {
|
||||
pinctrl_dbgu: dbgu-0 {
|
||||
atmel,pins =
|
||||
<1 14 0x1 0x0 /* PB14 periph A */
|
||||
1 15 0x1 0x1>; /* PB15 periph with pullup */
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
dbgu: serial@fffff200 {
|
||||
compatible = "atmel,at91sam9260-usart";
|
||||
reg = <0xfffff200 0x200>;
|
||||
interrupts = <1 4 7>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_dbgu>;
|
||||
status = "disabled";
|
||||
};
|
||||
@@ -5639,6 +5639,12 @@ S: Maintained
|
||||
F: drivers/pinctrl/
|
||||
F: include/linux/pinctrl/
|
||||
|
||||
PIN CONTROLLER - ATMEL AT91
|
||||
M: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
F: drivers/pinctrl/pinctrl-at91.c
|
||||
|
||||
PIN CONTROLLER - ST SPEAR
|
||||
M: Viresh Kumar <viresh.linux@gmail.com>
|
||||
L: spear-devel@list.st.com
|
||||
|
||||
@@ -330,6 +330,8 @@ config ARCH_AT91
|
||||
select IRQ_DOMAIN
|
||||
select NEED_MACH_GPIO_H
|
||||
select NEED_MACH_IO_H if PCCARD
|
||||
select PINCTRL
|
||||
select PINCTRL_AT91 if USE_OF
|
||||
help
|
||||
This enables support for systems based on Atmel
|
||||
AT91RM9200 and AT91SAM9* processors.
|
||||
|
||||
+28
-16
@@ -1,21 +1,33 @@
|
||||
ifeq ($(CONFIG_OF),y)
|
||||
|
||||
dtb-$(CONFIG_ARCH_AT91) += aks-cdu.dtb \
|
||||
at91sam9263ek.dtb \
|
||||
at91sam9g20ek_2mmc.dtb \
|
||||
at91sam9g20ek.dtb \
|
||||
at91sam9g25ek.dtb \
|
||||
at91sam9m10g45ek.dtb \
|
||||
at91sam9n12ek.dtb \
|
||||
ethernut5.dtb \
|
||||
evk-pro3.dtb \
|
||||
kizbox.dtb \
|
||||
tny_a9260.dtb \
|
||||
tny_a9263.dtb \
|
||||
tny_a9g20.dtb \
|
||||
usb_a9260.dtb \
|
||||
usb_a9263.dtb \
|
||||
usb_a9g20.dtb
|
||||
# Keep at91 dtb files sorted alphabetically for each SoC
|
||||
# sam9260
|
||||
dtb-$(CONFIG_ARCH_AT91) += aks-cdu.dtb
|
||||
dtb-$(CONFIG_ARCH_AT91) += ethernut5.dtb
|
||||
dtb-$(CONFIG_ARCH_AT91) += evk-pro3.dtb
|
||||
dtb-$(CONFIG_ARCH_AT91) += tny_a9260.dtb
|
||||
dtb-$(CONFIG_ARCH_AT91) += usb_a9260.dtb
|
||||
# sam9263
|
||||
dtb-$(CONFIG_ARCH_AT91) += at91sam9263ek.dtb
|
||||
dtb-$(CONFIG_ARCH_AT91) += tny_a9263.dtb
|
||||
dtb-$(CONFIG_ARCH_AT91) += usb_a9263.dtb
|
||||
# sam9g20
|
||||
dtb-$(CONFIG_ARCH_AT91) += at91sam9g20ek.dtb
|
||||
dtb-$(CONFIG_ARCH_AT91) += at91sam9g20ek_2mmc.dtb
|
||||
dtb-$(CONFIG_ARCH_AT91) += kizbox.dtb
|
||||
dtb-$(CONFIG_ARCH_AT91) += tny_a9g20.dtb
|
||||
dtb-$(CONFIG_ARCH_AT91) += usb_a9g20.dtb
|
||||
# sam9g45
|
||||
dtb-$(CONFIG_ARCH_AT91) += at91sam9m10g45ek.dtb
|
||||
# sam9n12
|
||||
dtb-$(CONFIG_ARCH_AT91) += at91sam9n12ek.dtb
|
||||
# sam9x5
|
||||
dtb-$(CONFIG_ARCH_AT91) += at91sam9g15ek.dtb
|
||||
dtb-$(CONFIG_ARCH_AT91) += at91sam9g25ek.dtb
|
||||
dtb-$(CONFIG_ARCH_AT91) += at91sam9g35ek.dtb
|
||||
dtb-$(CONFIG_ARCH_AT91) += at91sam9x25ek.dtb
|
||||
dtb-$(CONFIG_ARCH_AT91) += at91sam9x35ek.dtb
|
||||
|
||||
dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb
|
||||
dtb-$(CONFIG_ARCH_DOVE) += dove-cm-a510.dtb \
|
||||
dove-cubox.dtb \
|
||||
|
||||
@@ -98,40 +98,161 @@
|
||||
interrupts = <26 4 0 27 4 0 28 4 0>;
|
||||
};
|
||||
|
||||
pioA: gpio@fffff400 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff400 0x100>;
|
||||
interrupts = <2 4 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
pinctrl@fffff400 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
|
||||
ranges = <0xfffff400 0xfffff400 0x600>;
|
||||
|
||||
pioB: gpio@fffff600 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff600 0x100>;
|
||||
interrupts = <3 4 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
atmel,mux-mask = <
|
||||
/* A B */
|
||||
0xffffffff 0xffc00c3b /* pioA */
|
||||
0xffffffff 0x7fff3ccf /* pioB */
|
||||
0xffffffff 0x007fffff /* pioC */
|
||||
>;
|
||||
|
||||
pioC: gpio@fffff800 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff800 0x100>;
|
||||
interrupts = <4 4 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
/* shared pinctrl settings */
|
||||
dbgu {
|
||||
pinctrl_dbgu: dbgu-0 {
|
||||
atmel,pins =
|
||||
<1 14 0x1 0x0 /* PB14 periph A */
|
||||
1 15 0x1 0x1>; /* PB15 periph with pullup */
|
||||
};
|
||||
};
|
||||
|
||||
uart0 {
|
||||
pinctrl_uart0: uart0-0 {
|
||||
atmel,pins =
|
||||
<1 4 0x1 0x0 /* PB4 periph A */
|
||||
1 5 0x1 0x0>; /* PB5 periph A */
|
||||
};
|
||||
|
||||
pinctrl_uart0_rts_cts: uart0_rts_cts-0 {
|
||||
atmel,pins =
|
||||
<1 26 0x1 0x0 /* PB26 periph A */
|
||||
1 27 0x1 0x0>; /* PB27 periph A */
|
||||
};
|
||||
|
||||
pinctrl_uart0_dtr_dsr: uart0_dtr_dsr-0 {
|
||||
atmel,pins =
|
||||
<1 24 0x1 0x0 /* PB24 periph A */
|
||||
1 22 0x1 0x0>; /* PB22 periph A */
|
||||
};
|
||||
|
||||
pinctrl_uart0_dcd: uart0_dcd-0 {
|
||||
atmel,pins =
|
||||
<1 23 0x1 0x0>; /* PB23 periph A */
|
||||
};
|
||||
|
||||
pinctrl_uart0_ri: uart0_ri-0 {
|
||||
atmel,pins =
|
||||
<1 25 0x1 0x0>; /* PB25 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
uart1 {
|
||||
pinctrl_uart1: uart1-0 {
|
||||
atmel,pins =
|
||||
<2 6 0x1 0x1 /* PB6 periph A with pullup */
|
||||
2 7 0x1 0x0>; /* PB7 periph A */
|
||||
};
|
||||
|
||||
pinctrl_uart1_rts_cts: uart1_rts_cts-0 {
|
||||
atmel,pins =
|
||||
<1 28 0x1 0x0 /* PB28 periph A */
|
||||
1 29 0x1 0x0>; /* PB29 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
uart2 {
|
||||
pinctrl_uart2: uart2-0 {
|
||||
atmel,pins =
|
||||
<1 8 0x1 0x1 /* PB8 periph A with pullup */
|
||||
1 9 0x1 0x0>; /* PB9 periph A */
|
||||
};
|
||||
|
||||
pinctrl_uart2_rts_cts: uart2_rts_cts-0 {
|
||||
atmel,pins =
|
||||
<0 4 0x1 0x0 /* PA4 periph A */
|
||||
0 5 0x1 0x0>; /* PA5 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
uart3 {
|
||||
pinctrl_uart3: uart3-0 {
|
||||
atmel,pins =
|
||||
<2 10 0x1 0x1 /* PB10 periph A with pullup */
|
||||
2 11 0x1 0x0>; /* PB11 periph A */
|
||||
};
|
||||
|
||||
pinctrl_uart3_rts_cts: uart3_rts_cts-0 {
|
||||
atmel,pins =
|
||||
<3 8 0x2 0x0 /* PB8 periph B */
|
||||
3 10 0x2 0x0>; /* PB10 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
uart4 {
|
||||
pinctrl_uart4: uart4-0 {
|
||||
atmel,pins =
|
||||
<0 31 0x2 0x1 /* PA31 periph B with pullup */
|
||||
0 30 0x2 0x0>; /* PA30 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
uart5 {
|
||||
pinctrl_uart5: uart5-0 {
|
||||
atmel,pins =
|
||||
<2 12 0x1 0x1 /* PB12 periph A with pullup */
|
||||
2 13 0x1 0x0>; /* PB13 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
nand {
|
||||
pinctrl_nand: nand-0 {
|
||||
atmel,pins =
|
||||
<2 13 0x0 0x1 /* PC13 gpio RDY pin pull_up */
|
||||
2 14 0x0 0x1>; /* PC14 gpio enable pin pull_up */
|
||||
};
|
||||
};
|
||||
|
||||
pioA: gpio@fffff400 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff400 0x200>;
|
||||
interrupts = <2 4 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
pioB: gpio@fffff600 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff600 0x200>;
|
||||
interrupts = <3 4 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
pioC: gpio@fffff800 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff800 0x200>;
|
||||
interrupts = <4 4 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
dbgu: serial@fffff200 {
|
||||
compatible = "atmel,at91sam9260-usart";
|
||||
reg = <0xfffff200 0x200>;
|
||||
interrupts = <1 4 7>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_dbgu>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@@ -141,6 +262,8 @@
|
||||
interrupts = <6 4 5>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@@ -150,6 +273,8 @@
|
||||
interrupts = <7 4 5>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@@ -159,6 +284,8 @@
|
||||
interrupts = <8 4 5>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@@ -168,6 +295,8 @@
|
||||
interrupts = <23 4 5>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@@ -177,6 +306,8 @@
|
||||
interrupts = <24 4 5>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart4>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@@ -186,6 +317,8 @@
|
||||
interrupts = <25 4 5>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart5>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@@ -257,6 +390,8 @@
|
||||
>;
|
||||
atmel,nand-addr-offset = <21>;
|
||||
atmel,nand-cmd-offset = <22>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_nand>;
|
||||
gpios = <&pioC 13 0
|
||||
&pioC 14 0
|
||||
0
|
||||
|
||||
@@ -89,60 +89,137 @@
|
||||
reg = <0xfffffd10 0x10>;
|
||||
};
|
||||
|
||||
pioA: gpio@fffff200 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff200 0x100>;
|
||||
interrupts = <2 4 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
pinctrl@fffff200 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
|
||||
ranges = <0xfffff200 0xfffff200 0xa00>;
|
||||
|
||||
pioB: gpio@fffff400 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff400 0x100>;
|
||||
interrupts = <3 4 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
atmel,mux-mask = <
|
||||
/* A B */
|
||||
0xfffffffb 0xffffe07f /* pioA */
|
||||
0x0007ffff 0x39072fff /* pioB */
|
||||
0xffffffff 0x3ffffff8 /* pioC */
|
||||
0xfffffbff 0xffffffff /* pioD */
|
||||
0xffe00fff 0xfbfcff00 /* pioE */
|
||||
>;
|
||||
|
||||
pioC: gpio@fffff600 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff600 0x100>;
|
||||
interrupts = <4 4 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
/* shared pinctrl settings */
|
||||
dbgu {
|
||||
pinctrl_dbgu: dbgu-0 {
|
||||
atmel,pins =
|
||||
<2 30 0x1 0x0 /* PC30 periph A */
|
||||
2 31 0x1 0x1>; /* PC31 periph with pullup */
|
||||
};
|
||||
};
|
||||
|
||||
pioD: gpio@fffff800 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff800 0x100>;
|
||||
interrupts = <4 4 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
uart0 {
|
||||
pinctrl_uart0: uart0-0 {
|
||||
atmel,pins =
|
||||
<0 26 0x1 0x1 /* PA26 periph A with pullup */
|
||||
0 27 0x1 0x0>; /* PA27 periph A */
|
||||
};
|
||||
|
||||
pioE: gpio@fffffa00 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffffa00 0x100>;
|
||||
interrupts = <4 4 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
pinctrl_uart0_rts_cts: uart0_rts_cts-0 {
|
||||
atmel,pins =
|
||||
<0 28 0x1 0x0 /* PA28 periph A */
|
||||
0 29 0x1 0x0>; /* PA29 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
uart1 {
|
||||
pinctrl_uart1: uart1-0 {
|
||||
atmel,pins =
|
||||
<3 0 0x1 0x1 /* PD0 periph A with pullup */
|
||||
3 1 0x1 0x0>; /* PD1 periph A */
|
||||
};
|
||||
|
||||
pinctrl_uart1_rts_cts: uart1_rts_cts-0 {
|
||||
atmel,pins =
|
||||
<3 7 0x2 0x0 /* PD7 periph B */
|
||||
3 8 0x2 0x0>; /* PD8 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
uart2 {
|
||||
pinctrl_uart2: uart2-0 {
|
||||
atmel,pins =
|
||||
<3 2 0x1 0x1 /* PD2 periph A with pullup */
|
||||
3 3 0x1 0x0>; /* PD3 periph A */
|
||||
};
|
||||
|
||||
pinctrl_uart2_rts_cts: uart2_rts_cts-0 {
|
||||
atmel,pins =
|
||||
<3 5 0x2 0x0 /* PD5 periph B */
|
||||
4 6 0x2 0x0>; /* PD6 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
nand {
|
||||
pinctrl_nand: nand-0 {
|
||||
atmel,pins =
|
||||
<0 22 0x0 0x1 /* PA22 gpio RDY pin pull_up*/
|
||||
3 15 0x0 0x1>; /* PD15 gpio enable pin pull_up */
|
||||
};
|
||||
};
|
||||
|
||||
pioA: gpio@fffff200 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff200 0x200>;
|
||||
interrupts = <2 4 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
pioB: gpio@fffff400 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff400 0x200>;
|
||||
interrupts = <3 4 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
pioC: gpio@fffff600 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff600 0x200>;
|
||||
interrupts = <4 4 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
pioD: gpio@fffff800 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff800 0x200>;
|
||||
interrupts = <4 4 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
pioE: gpio@fffffa00 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffffa00 0x200>;
|
||||
interrupts = <4 4 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
dbgu: serial@ffffee00 {
|
||||
compatible = "atmel,at91sam9260-usart";
|
||||
reg = <0xffffee00 0x200>;
|
||||
interrupts = <1 4 7>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_dbgu>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@@ -152,6 +229,8 @@
|
||||
interrupts = <7 4 5>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@@ -161,6 +240,8 @@
|
||||
interrupts = <8 4 5>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@@ -170,6 +251,8 @@
|
||||
interrupts = <9 4 5>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@@ -206,6 +289,8 @@
|
||||
>;
|
||||
atmel,nand-addr-offset = <21>;
|
||||
atmel,nand-cmd-offset = <22>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_nand>;
|
||||
gpios = <&pioA 22 0
|
||||
&pioD 15 0
|
||||
0
|
||||
|
||||
@@ -38,6 +38,7 @@
|
||||
};
|
||||
|
||||
usart0: serial@fff8c000 {
|
||||
pinctrl-0 = <&pinctrl_uart0 &pinctrl_uart0_rts_cts>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
||||
@@ -0,0 +1,28 @@
|
||||
/*
|
||||
* at91sam9g15.dtsi - Device Tree Include file for AT91SAM9G15 SoC
|
||||
*
|
||||
* Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
||||
*
|
||||
* Licensed under GPLv2.
|
||||
*/
|
||||
|
||||
/include/ "at91sam9x5.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Atmel AT91SAM9G15 SoC";
|
||||
compatible = "atmel, at91sam9g15, atmel,at91sam9x5";
|
||||
|
||||
ahb {
|
||||
apb {
|
||||
pinctrl@fffff400 {
|
||||
atmel,mux-mask = <
|
||||
/* A B C */
|
||||
0xffffffff 0xffe0399f 0x00000000 /* pioA */
|
||||
0x00040000 0x00047e3f 0x00000000 /* pioB */
|
||||
0xfdffffff 0x00000000 0xb83fffff /* pioC */
|
||||
0x003fffff 0x003f8000 0x00000000 /* pioD */
|
||||
>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
@@ -0,0 +1,16 @@
|
||||
/*
|
||||
* at91sam9g15ek.dts - Device Tree file for AT91SAM9G15-EK board
|
||||
*
|
||||
* Copyright (C) 2012 Atmel,
|
||||
* 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
/dts-v1/;
|
||||
/include/ "at91sam9g15.dtsi"
|
||||
/include/ "at91sam9x5ek.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Atmel AT91SAM9G25-EK";
|
||||
compatible = "atmel,at91sam9g15ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
|
||||
};
|
||||
@@ -35,6 +35,12 @@
|
||||
};
|
||||
|
||||
usart0: serial@fffb0000 {
|
||||
pinctrl-0 =
|
||||
<&pinctrl_uart0
|
||||
&pinctrl_uart0_rts_cts
|
||||
&pinctrl_uart0_dtr_dsr
|
||||
&pinctrl_uart0_dcd
|
||||
&pinctrl_uart0_ri>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
||||
@@ -0,0 +1,28 @@
|
||||
/*
|
||||
* at91sam9g25.dtsi - Device Tree Include file for AT91SAM9G25 SoC
|
||||
*
|
||||
* Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
||||
*
|
||||
* Licensed under GPLv2.
|
||||
*/
|
||||
|
||||
/include/ "at91sam9x5.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Atmel AT91SAM9G25 SoC";
|
||||
compatible = "atmel, at91sam9g25, atmel,at91sam9x5";
|
||||
|
||||
ahb {
|
||||
apb {
|
||||
pinctrl@fffff400 {
|
||||
atmel,mux-mask = <
|
||||
/* A B C */
|
||||
0xffffffff 0xffe0399f 0xc000001c /* pioA */
|
||||
0x0007ffff 0x8000fe3f 0x00000000 /* pioB */
|
||||
0x80000000 0x07c0ffff 0xb83fffff /* pioC */
|
||||
0x003fffff 0x003f8000 0x00000000 /* pioD */
|
||||
>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
@@ -7,55 +7,10 @@
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
/dts-v1/;
|
||||
/include/ "at91sam9x5.dtsi"
|
||||
/include/ "at91sam9x5cm.dtsi"
|
||||
/include/ "at91sam9g25.dtsi"
|
||||
/include/ "at91sam9x5ek.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Atmel AT91SAM9G25-EK";
|
||||
compatible = "atmel,at91sam9g25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200 root=/dev/mtdblock1 rw rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs";
|
||||
};
|
||||
|
||||
ahb {
|
||||
apb {
|
||||
dbgu: serial@fffff200 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usart0: serial@f801c000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
macb0: ethernet@f802c000 {
|
||||
phy-mode = "rmii";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
i2c0: i2c@f8010000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
i2c1: i2c@f8014000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
i2c2: i2c@f8018000 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
usb0: ohci@00600000 {
|
||||
status = "okay";
|
||||
num-ports = <2>;
|
||||
atmel,vbus-gpio = <&pioD 19 1
|
||||
&pioD 20 1
|
||||
>;
|
||||
};
|
||||
|
||||
usb1: ehci@00700000 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@@ -0,0 +1,28 @@
|
||||
/*
|
||||
* at91sam9g35.dtsi - Device Tree Include file for AT91SAM9G35 SoC
|
||||
*
|
||||
* Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
||||
*
|
||||
* Licensed under GPLv2.
|
||||
*/
|
||||
|
||||
/include/ "at91sam9x5.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Atmel AT91SAM9G35 SoC";
|
||||
compatible = "atmel, at91sam9g35, atmel,at91sam9x5";
|
||||
|
||||
ahb {
|
||||
apb {
|
||||
pinctrl@fffff400 {
|
||||
atmel,mux-mask = <
|
||||
/* A B C */
|
||||
0xffffffff 0xffe0399f 0xc000000c /* pioA */
|
||||
0x000406ff 0x00047e3f 0x00000000 /* pioB */
|
||||
0xfdffffff 0x00000000 0xb83fffff /* pioC */
|
||||
0x003fffff 0x003f8000 0x00000000 /* pioD */
|
||||
>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
@@ -0,0 +1,16 @@
|
||||
/*
|
||||
* at91sam9g35ek.dts - Device Tree file for AT91SAM9G35-EK board
|
||||
*
|
||||
* Copyright (C) 2012 Atmel,
|
||||
* 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
/dts-v1/;
|
||||
/include/ "at91sam9g35.dtsi"
|
||||
/include/ "at91sam9x5ek.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Atmel AT91SAM9G35-EK";
|
||||
compatible = "atmel,at91sam9g35ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
|
||||
};
|
||||
@@ -108,60 +108,151 @@
|
||||
interrupts = <21 4 0>;
|
||||
};
|
||||
|
||||
pioA: gpio@fffff200 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff200 0x100>;
|
||||
interrupts = <2 4 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
pinctrl@fffff200 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
|
||||
ranges = <0xfffff200 0xfffff200 0xa00>;
|
||||
|
||||
pioB: gpio@fffff400 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff400 0x100>;
|
||||
interrupts = <3 4 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
atmel,mux-mask = <
|
||||
/* A B */
|
||||
0xffffffff 0xffc003ff /* pioA */
|
||||
0xffffffff 0x800f8f00 /* pioB */
|
||||
0xffffffff 0x00000e00 /* pioC */
|
||||
0xffffffff 0xff0c1381 /* pioD */
|
||||
0xffffffff 0x81ffff81 /* pioE */
|
||||
>;
|
||||
|
||||
pioC: gpio@fffff600 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff600 0x100>;
|
||||
interrupts = <4 4 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
/* shared pinctrl settings */
|
||||
dbgu {
|
||||
pinctrl_dbgu: dbgu-0 {
|
||||
atmel,pins =
|
||||
<1 12 0x1 0x0 /* PB12 periph A */
|
||||
1 13 0x1 0x0>; /* PB13 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
pioD: gpio@fffff800 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff800 0x100>;
|
||||
interrupts = <5 4 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
uart0 {
|
||||
pinctrl_uart0: uart0-0 {
|
||||
atmel,pins =
|
||||
<1 19 0x1 0x1 /* PB19 periph A with pullup */
|
||||
1 18 0x1 0x0>; /* PB18 periph A */
|
||||
};
|
||||
|
||||
pioE: gpio@fffffa00 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffffa00 0x100>;
|
||||
interrupts = <5 4 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
pinctrl_uart0_rts_cts: uart0_rts_cts-0 {
|
||||
atmel,pins =
|
||||
<1 17 0x2 0x0 /* PB17 periph B */
|
||||
1 15 0x2 0x0>; /* PB15 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
uart1 {
|
||||
pinctrl_uart1: uart1-0 {
|
||||
atmel,pins =
|
||||
<1 4 0x1 0x1 /* PB4 periph A with pullup */
|
||||
1 5 0x1 0x0>; /* PB5 periph A */
|
||||
};
|
||||
|
||||
pinctrl_uart1_rts_cts: uart1_rts_cts-0 {
|
||||
atmel,pins =
|
||||
<3 16 0x1 0x0 /* PD16 periph A */
|
||||
3 17 0x1 0x0>; /* PD17 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
uart2 {
|
||||
pinctrl_uart2: uart2-0 {
|
||||
atmel,pins =
|
||||
<1 6 0x1 0x1 /* PB6 periph A with pullup */
|
||||
1 7 0x1 0x0>; /* PB7 periph A */
|
||||
};
|
||||
|
||||
pinctrl_uart2_rts_cts: uart2_rts_cts-0 {
|
||||
atmel,pins =
|
||||
<2 9 0x2 0x0 /* PC9 periph B */
|
||||
2 11 0x2 0x0>; /* PC11 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
uart3 {
|
||||
pinctrl_uart3: uart3-0 {
|
||||
atmel,pins =
|
||||
<1 8 0x1 0x1 /* PB9 periph A with pullup */
|
||||
1 9 0x1 0x0>; /* PB8 periph A */
|
||||
};
|
||||
|
||||
pinctrl_uart3_rts_cts: uart3_rts_cts-0 {
|
||||
atmel,pins =
|
||||
<0 23 0x2 0x0 /* PA23 periph B */
|
||||
0 24 0x2 0x0>; /* PA24 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
nand {
|
||||
pinctrl_nand: nand-0 {
|
||||
atmel,pins =
|
||||
<2 8 0x0 0x1 /* PC8 gpio RDY pin pull_up*/
|
||||
2 14 0x0 0x1>; /* PC14 gpio enable pin pull_up */
|
||||
};
|
||||
};
|
||||
|
||||
pioA: gpio@fffff200 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff200 0x200>;
|
||||
interrupts = <2 4 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
pioB: gpio@fffff400 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff400 0x200>;
|
||||
interrupts = <3 4 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
pioC: gpio@fffff600 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff600 0x200>;
|
||||
interrupts = <4 4 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
pioD: gpio@fffff800 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff800 0x200>;
|
||||
interrupts = <5 4 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
pioE: gpio@fffffa00 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffffa00 0x200>;
|
||||
interrupts = <5 4 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
dbgu: serial@ffffee00 {
|
||||
compatible = "atmel,at91sam9260-usart";
|
||||
reg = <0xffffee00 0x200>;
|
||||
interrupts = <1 4 7>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_dbgu>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@@ -171,6 +262,8 @@
|
||||
interrupts = <7 4 5>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@@ -180,6 +273,8 @@
|
||||
interrupts = <8 4 5>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@@ -189,6 +284,8 @@
|
||||
interrupts = <9 4 5>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@@ -198,6 +295,8 @@
|
||||
interrupts = <10 4 5>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@@ -273,6 +372,8 @@
|
||||
>;
|
||||
atmel,nand-addr-offset = <21>;
|
||||
atmel,nand-cmd-offset = <22>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_nand>;
|
||||
gpios = <&pioC 8 0
|
||||
&pioC 14 0
|
||||
0
|
||||
|
||||
@@ -39,6 +39,7 @@
|
||||
};
|
||||
|
||||
usart1: serial@fff90000 {
|
||||
pinctrl-0 = <&pinctrl_uart0 &pinctrl_uart1_rts_cts>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
||||
@@ -102,50 +102,150 @@
|
||||
interrupts = <20 4 0>;
|
||||
};
|
||||
|
||||
pioA: gpio@fffff400 {
|
||||
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff400 0x100>;
|
||||
interrupts = <2 4 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
pinctrl@fffff400 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
|
||||
ranges = <0xfffff400 0xfffff400 0x800>;
|
||||
|
||||
pioB: gpio@fffff600 {
|
||||
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff600 0x100>;
|
||||
interrupts = <2 4 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
atmel,mux-mask = <
|
||||
/* A B C */
|
||||
0xffffffff 0xffe07983 0x00000000 /* pioA */
|
||||
0x00040000 0x00047e0f 0x00000000 /* pioB */
|
||||
0xfdffffff 0x07c00000 0xb83fffff /* pioC */
|
||||
0x003fffff 0x003f8000 0x00000000 /* pioD */
|
||||
>;
|
||||
|
||||
pioC: gpio@fffff800 {
|
||||
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff800 0x100>;
|
||||
interrupts = <3 4 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
/* shared pinctrl settings */
|
||||
dbgu {
|
||||
pinctrl_dbgu: dbgu-0 {
|
||||
atmel,pins =
|
||||
<0 9 0x1 0x0 /* PA9 periph A */
|
||||
0 10 0x1 0x1>; /* PA10 periph with pullup */
|
||||
};
|
||||
};
|
||||
|
||||
pioD: gpio@fffffa00 {
|
||||
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffffa00 0x100>;
|
||||
interrupts = <3 4 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
uart0 {
|
||||
pinctrl_uart0: uart0-0 {
|
||||
atmel,pins =
|
||||
<0 1 0x1 0x1 /* PA1 periph A with pullup */
|
||||
0 0 0x1 0x0>; /* PA0 periph A */
|
||||
};
|
||||
|
||||
pinctrl_uart0_rts_cts: uart0_rts_cts-0 {
|
||||
atmel,pins =
|
||||
<0 2 0x1 0x0 /* PA2 periph A */
|
||||
0 3 0x1 0x0>; /* PA3 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
uart1 {
|
||||
pinctrl_uart1: uart1-0 {
|
||||
atmel,pins =
|
||||
<0 6 0x1 0x1 /* PA6 periph A with pullup */
|
||||
0 5 0x1 0x0>; /* PA5 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
uart2 {
|
||||
pinctrl_uart2: uart2-0 {
|
||||
atmel,pins =
|
||||
<0 8 0x1 0x1 /* PA8 periph A with pullup */
|
||||
0 7 0x1 0x0>; /* PA7 periph A */
|
||||
};
|
||||
|
||||
pinctrl_uart2_rts_cts: uart2_rts_cts-0 {
|
||||
atmel,pins =
|
||||
<1 0 0x2 0x0 /* PB0 periph B */
|
||||
1 1 0x2 0x0>; /* PB1 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
uart3 {
|
||||
pinctrl_uart3: uart3-0 {
|
||||
atmel,pins =
|
||||
<2 23 0x2 0x1 /* PC23 periph B with pullup */
|
||||
2 22 0x2 0x0>; /* PC22 periph B */
|
||||
};
|
||||
|
||||
pinctrl_uart3_rts_cts: uart3_rts_cts-0 {
|
||||
atmel,pins =
|
||||
<2 24 0x2 0x0 /* PC24 periph B */
|
||||
2 25 0x2 0x0>; /* PC25 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
usart0 {
|
||||
pinctrl_usart0: usart0-0 {
|
||||
atmel,pins =
|
||||
<2 9 0x3 0x1 /* PC9 periph C with pullup */
|
||||
2 8 0x3 0x0>; /* PC8 periph C */
|
||||
};
|
||||
};
|
||||
|
||||
usart1 {
|
||||
pinctrl_usart1: usart1-0 {
|
||||
atmel,pins =
|
||||
<2 16 0x3 0x1 /* PC17 periph C with pullup */
|
||||
2 17 0x3 0x0>; /* PC16 periph C */
|
||||
};
|
||||
};
|
||||
|
||||
nand {
|
||||
pinctrl_nand: nand-0 {
|
||||
atmel,pins =
|
||||
<3 5 0x0 0x1 /* PD5 gpio RDY pin pull_up*/
|
||||
3 4 0x0 0x1>; /* PD4 gpio enable pin pull_up */
|
||||
};
|
||||
};
|
||||
|
||||
pioA: gpio@fffff400 {
|
||||
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff400 0x200>;
|
||||
interrupts = <2 4 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
pioB: gpio@fffff600 {
|
||||
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff600 0x200>;
|
||||
interrupts = <2 4 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
pioC: gpio@fffff800 {
|
||||
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff800 0x200>;
|
||||
interrupts = <3 4 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
pioD: gpio@fffffa00 {
|
||||
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffffa00 0x200>;
|
||||
interrupts = <3 4 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
dbgu: serial@fffff200 {
|
||||
compatible = "atmel,at91sam9260-usart";
|
||||
reg = <0xfffff200 0x200>;
|
||||
interrupts = <1 4 7>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_dbgu>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@@ -155,6 +255,8 @@
|
||||
interrupts = <5 4 5>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@@ -164,6 +266,8 @@
|
||||
interrupts = <6 4 5>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@@ -173,6 +277,8 @@
|
||||
interrupts = <7 4 5>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@@ -182,6 +288,8 @@
|
||||
interrupts = <8 4 5>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@@ -215,6 +323,8 @@
|
||||
>;
|
||||
atmel,nand-addr-offset = <21>;
|
||||
atmel,nand-cmd-offset = <22>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_nand>;
|
||||
gpios = <&pioD 5 0
|
||||
&pioD 4 0
|
||||
0
|
||||
|
||||
@@ -0,0 +1,28 @@
|
||||
/*
|
||||
* at91sam9x25.dtsi - Device Tree Include file for AT91SAM9X25 SoC
|
||||
*
|
||||
* Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
||||
*
|
||||
* Licensed under GPLv2.
|
||||
*/
|
||||
|
||||
/include/ "at91sam9x5.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Atmel AT91SAM9X25 SoC";
|
||||
compatible = "atmel, at91sam9x25, atmel,at91sam9x5";
|
||||
|
||||
ahb {
|
||||
apb {
|
||||
pinctrl@fffff400 {
|
||||
atmel,mux-mask = <
|
||||
/* A B C */
|
||||
0xffffffff 0xffe03fff 0xc000001c /* pioA */
|
||||
0x0007ffff 0x00047e3f 0x00000000 /* pioB */
|
||||
0x80000000 0xfffd0000 0xb83fffff /* pioC */
|
||||
0x003fffff 0x003f8000 0x00000000 /* pioD */
|
||||
>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
@@ -0,0 +1,16 @@
|
||||
/*
|
||||
* at91sam9x25ek.dts - Device Tree file for AT91SAM9X25-EK board
|
||||
*
|
||||
* Copyright (C) 2012 Atmel,
|
||||
* 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
/dts-v1/;
|
||||
/include/ "at91sam9x25.dtsi"
|
||||
/include/ "at91sam9x5ek.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Atmel AT91SAM9G25-EK";
|
||||
compatible = "atmel,at91sam9x25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
|
||||
};
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user