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Merge branch 'imx/driver' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/drivers
* 'imx/driver' of git://git.linaro.org/people/shawnguo/linux-2.6: (3 commits) ARM: imx6q: add cko1 clock ARM: mxc: make imx_dma_is_general_purpose more generic for sdma ARM: imx6: Rename DEBUG_IMX6Q_UART to UART4
This commit is contained in:
Arnd Bergmann
+3
-6
@@ -269,7 +269,6 @@ S: Orphan
|
||||
F: drivers/platform/x86/wmi.c
|
||||
|
||||
AD1889 ALSA SOUND DRIVER
|
||||
M: Kyle McMartin <kyle@mcmartin.ca>
|
||||
M: Thibaut Varene <T-Bone@parisc-linux.org>
|
||||
W: http://wiki.parisc-linux.org/AD1889
|
||||
L: linux-parisc@vger.kernel.org
|
||||
@@ -3047,7 +3046,6 @@ F: drivers/hwspinlock/hwspinlock_*
|
||||
F: include/linux/hwspinlock.h
|
||||
|
||||
HARMONY SOUND DRIVER
|
||||
M: Kyle McMartin <kyle@mcmartin.ca>
|
||||
L: linux-parisc@vger.kernel.org
|
||||
S: Maintained
|
||||
F: sound/parisc/harmony.*
|
||||
@@ -5000,9 +4998,8 @@ F: Documentation/blockdev/paride.txt
|
||||
F: drivers/block/paride/
|
||||
|
||||
PARISC ARCHITECTURE
|
||||
M: Kyle McMartin <kyle@mcmartin.ca>
|
||||
M: Helge Deller <deller@gmx.de>
|
||||
M: "James E.J. Bottomley" <jejb@parisc-linux.org>
|
||||
M: Helge Deller <deller@gmx.de>
|
||||
L: linux-parisc@vger.kernel.org
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||||
W: http://www.parisc-linux.org/
|
||||
Q: http://patchwork.kernel.org/project/linux-parisc/list/
|
||||
@@ -5861,7 +5858,7 @@ S: Maintained
|
||||
F: drivers/mmc/host/sdhci-spear.c
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||||
|
||||
SECURITY SUBSYSTEM
|
||||
M: James Morris <jmorris@namei.org>
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||||
M: James Morris <james.l.morris@oracle.com>
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||||
L: linux-security-module@vger.kernel.org (suggested Cc:)
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||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/jmorris/linux-security.git
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||||
W: http://security.wiki.kernel.org/
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||||
@@ -5874,7 +5871,7 @@ S: Supported
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||||
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||||
SELINUX SECURITY MODULE
|
||||
M: Stephen Smalley <sds@tycho.nsa.gov>
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||||
M: James Morris <jmorris@namei.org>
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||||
M: James Morris <james.l.morris@oracle.com>
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||||
M: Eric Paris <eparis@parisplace.org>
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L: selinux@tycho.nsa.gov (subscribers-only, general discussion)
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||||
W: http://selinuxproject.org
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||||
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||||
@@ -1,7 +1,7 @@
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||||
VERSION = 3
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PATCHLEVEL = 3
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SUBLEVEL = 0
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EXTRAVERSION = -rc4
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EXTRAVERSION = -rc5
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||||
NAME = Saber-toothed Squirrel
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||||
|
||||
# *DOCUMENTATION*
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||||
@@ -180,12 +180,12 @@ choice
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Say Y here if you want kernel low-level debugging support
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on i.MX50 or i.MX53.
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config DEBUG_IMX6Q_UART
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bool "i.MX6Q Debug UART"
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config DEBUG_IMX6Q_UART4
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bool "i.MX6Q Debug UART4"
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depends on SOC_IMX6Q
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help
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Say Y here if you want kernel low-level debugging support
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on i.MX6Q.
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on i.MX6Q UART4.
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||||
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config DEBUG_MSM_UART1
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bool "Kernel low-level debugging messages via MSM UART1"
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@@ -320,13 +320,6 @@ err0:
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return -EBUSY;
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}
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||||
|
||||
/*
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* If we set up a device for bus mastering, we need to check the latency
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* timer as we don't have even crappy BIOSes to set it properly.
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* The implementation is from arch/i386/pci/i386.c
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*/
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unsigned int pcibios_max_latency = 255;
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||||
/* ITE bridge requires setting latency timer to avoid early bus access
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||||
termination by PCI bus master devices
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||||
*/
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||||
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||||
@@ -1502,12 +1502,13 @@ int pl330_chan_ctrl(void *ch_id, enum pl330_chan_op op)
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struct pl330_thread *thrd = ch_id;
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struct pl330_dmac *pl330;
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unsigned long flags;
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int ret = 0, active = thrd->req_running;
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int ret = 0, active;
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||||
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if (!thrd || thrd->free || thrd->dmac->state == DYING)
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return -EINVAL;
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||||
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pl330 = thrd->dmac;
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||||
active = thrd->req_running;
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||||
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||||
spin_lock_irqsave(&pl330->lock, flags);
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||||
|
||||
|
||||
@@ -137,6 +137,11 @@
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||||
disable_irq
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||||
.endm
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||||
|
||||
.macro save_and_disable_irqs_notrace, oldcpsr
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||||
mrs \oldcpsr, cpsr
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||||
disable_irq_notrace
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||||
.endm
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||||
|
||||
/*
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||||
* Restore interrupt state previously stored in a register. We don't
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||||
* guarantee that this will preserve the flags.
|
||||
|
||||
@@ -41,7 +41,7 @@ enum pl330_dstcachectrl {
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||||
DCCTRL1, /* Bufferable only */
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||||
DCCTRL2, /* Cacheable, but do not allocate */
|
||||
DCCTRL3, /* Cacheable and bufferable, but do not allocate */
|
||||
DINVALID1 = 8,
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||||
DINVALID1, /* AWCACHE = 0x1000 */
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||||
DINVALID2,
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||||
DCCTRL6, /* Cacheable write-through, allocate on writes only */
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||||
DCCTRL7, /* Cacheable write-back, allocate on writes only */
|
||||
|
||||
@@ -22,6 +22,7 @@
|
||||
#include <asm/hw_breakpoint.h>
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||||
#include <asm/ptrace.h>
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||||
#include <asm/types.h>
|
||||
#include <asm/system.h>
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||||
|
||||
#ifdef __KERNEL__
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||||
#define STACK_TOP ((current->personality & ADDR_LIMIT_32BIT) ? \
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||||
|
||||
@@ -23,6 +23,7 @@
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||||
#include <linux/perf_event.h>
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||||
#include <linux/hw_breakpoint.h>
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#include <linux/regset.h>
|
||||
#include <linux/audit.h>
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|
||||
#include <asm/pgtable.h>
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#include <asm/system.h>
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||||
@@ -904,6 +905,12 @@ long arch_ptrace(struct task_struct *child, long request,
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return ret;
|
||||
}
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||||
|
||||
#ifdef __ARMEB__
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#define AUDIT_ARCH_NR AUDIT_ARCH_ARMEB
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#else
|
||||
#define AUDIT_ARCH_NR AUDIT_ARCH_ARM
|
||||
#endif
|
||||
|
||||
asmlinkage int syscall_trace(int why, struct pt_regs *regs, int scno)
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{
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||||
unsigned long ip;
|
||||
@@ -918,7 +925,7 @@ asmlinkage int syscall_trace(int why, struct pt_regs *regs, int scno)
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if (!ip)
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||||
audit_syscall_exit(regs);
|
||||
else
|
||||
audit_syscall_entry(AUDIT_ARCH_ARMEB, scno, regs->ARM_r0,
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audit_syscall_entry(AUDIT_ARCH_NR, scno, regs->ARM_r0,
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||||
regs->ARM_r1, regs->ARM_r2, regs->ARM_r3);
|
||||
|
||||
if (!test_thread_flag(TIF_SYSCALL_TRACE))
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||||
|
||||
@@ -129,7 +129,7 @@ static struct notifier_block twd_cpufreq_nb = {
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||||
|
||||
static int twd_cpufreq_init(void)
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||||
{
|
||||
if (!IS_ERR(twd_clk))
|
||||
if (twd_evt && *__this_cpu_ptr(twd_evt) && !IS_ERR(twd_clk))
|
||||
return cpufreq_register_notifier(&twd_cpufreq_nb,
|
||||
CPUFREQ_TRANSITION_NOTIFIER);
|
||||
|
||||
|
||||
@@ -329,6 +329,12 @@
|
||||
#define BM_CLPCR_MASK_SCU_IDLE (0x1 << 26)
|
||||
#define BM_CLPCR_MASK_L2CC_IDLE (0x1 << 27)
|
||||
|
||||
#define BP_CCOSR_CKO1_EN 7
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#define BP_CCOSR_CKO1_PODF 4
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#define BM_CCOSR_CKO1_PODF (0x7 << 4)
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||||
#define BP_CCOSR_CKO1_SEL 0
|
||||
#define BM_CCOSR_CKO1_SEL (0xf << 0)
|
||||
|
||||
#define FREQ_480M 480000000
|
||||
#define FREQ_528M 528000000
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||||
#define FREQ_594M 594000000
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||||
@@ -393,6 +399,7 @@ static struct clk ipu1_di1_clk;
|
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static struct clk ipu2_di0_clk;
|
||||
static struct clk ipu2_di1_clk;
|
||||
static struct clk enfc_clk;
|
||||
static struct clk cko1_clk;
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||||
static struct clk dummy_clk = {};
|
||||
|
||||
static unsigned long external_high_reference;
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||||
@@ -938,6 +945,24 @@ static void _clk_disable(struct clk *clk)
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writel_relaxed(reg, clk->enable_reg);
|
||||
}
|
||||
|
||||
static int _clk_enable_1b(struct clk *clk)
|
||||
{
|
||||
u32 reg;
|
||||
reg = readl_relaxed(clk->enable_reg);
|
||||
reg |= 0x1 << clk->enable_shift;
|
||||
writel_relaxed(reg, clk->enable_reg);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void _clk_disable_1b(struct clk *clk)
|
||||
{
|
||||
u32 reg;
|
||||
reg = readl_relaxed(clk->enable_reg);
|
||||
reg &= ~(0x1 << clk->enable_shift);
|
||||
writel_relaxed(reg, clk->enable_reg);
|
||||
}
|
||||
|
||||
struct divider {
|
||||
struct clk *clk;
|
||||
void __iomem *reg;
|
||||
@@ -983,6 +1008,7 @@ DEF_CLK_DIV1(ipu2_di0_pre_div, &ipu2_di0_pre_clk, CSCDR2, IPU2_DI0_PRE);
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DEF_CLK_DIV1(ipu2_di1_pre_div, &ipu2_di1_pre_clk, CSCDR2, IPU2_DI1_PRE);
|
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DEF_CLK_DIV1(ipu1_div, &ipu1_clk, CSCDR3, IPU1_HSP);
|
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DEF_CLK_DIV1(ipu2_div, &ipu2_clk, CSCDR3, IPU2_HSP);
|
||||
DEF_CLK_DIV1(cko1_div, &cko1_clk, CCOSR, CKO1);
|
||||
|
||||
#define DEF_CLK_DIV2(d, c, r, b) \
|
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static struct divider d = { \
|
||||
@@ -1038,6 +1064,7 @@ static struct divider *dividers[] = {
|
||||
&enfc_div,
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&spdif_div,
|
||||
&asrc_serial_div,
|
||||
&cko1_div,
|
||||
};
|
||||
|
||||
static unsigned long ldb_di_clk_get_rate(struct clk *clk)
|
||||
@@ -1625,6 +1652,32 @@ DEF_IPU_DI_MUX(CSCDR2, 2, 1);
|
||||
DEF_IPU_MUX(1);
|
||||
DEF_IPU_MUX(2);
|
||||
|
||||
static struct multiplexer cko1_mux = {
|
||||
.clk = &cko1_clk,
|
||||
.reg = CCOSR,
|
||||
.bp = BP_CCOSR_CKO1_SEL,
|
||||
.bm = BM_CCOSR_CKO1_SEL,
|
||||
.parents = {
|
||||
&pll3_usb_otg,
|
||||
&pll2_bus,
|
||||
&pll1_sys,
|
||||
&pll5_video,
|
||||
&dummy_clk,
|
||||
&axi_clk,
|
||||
&enfc_clk,
|
||||
&ipu1_di0_clk,
|
||||
&ipu1_di1_clk,
|
||||
&ipu2_di0_clk,
|
||||
&ipu2_di1_clk,
|
||||
&ahb_clk,
|
||||
&ipg_clk,
|
||||
&ipg_perclk,
|
||||
&ckil_clk,
|
||||
&pll4_audio,
|
||||
NULL
|
||||
},
|
||||
};
|
||||
|
||||
static struct multiplexer *multiplexers[] = {
|
||||
&axi_mux,
|
||||
&periph_mux,
|
||||
@@ -1667,6 +1720,7 @@ static struct multiplexer *multiplexers[] = {
|
||||
&ipu2_di1_mux,
|
||||
&ipu1_mux,
|
||||
&ipu2_mux,
|
||||
&cko1_mux,
|
||||
};
|
||||
|
||||
static int _clk_set_parent(struct clk *clk, struct clk *parent)
|
||||
@@ -1690,7 +1744,7 @@ static int _clk_set_parent(struct clk *clk, struct clk *parent)
|
||||
break;
|
||||
i++;
|
||||
}
|
||||
if (!m->parents[i])
|
||||
if (!m->parents[i] || m->parents[i] == &dummy_clk)
|
||||
return -EINVAL;
|
||||
|
||||
val = readl_relaxed(m->reg);
|
||||
@@ -1745,6 +1799,20 @@ DEF_NG_CLK(asrc_serial_clk, &pll3_usb_otg);
|
||||
.secondary = s, \
|
||||
}
|
||||
|
||||
#define DEF_CLK_1B(name, er, es, p, s) \
|
||||
static struct clk name = { \
|
||||
.enable_reg = er, \
|
||||
.enable_shift = es, \
|
||||
.enable = _clk_enable_1b, \
|
||||
.disable = _clk_disable_1b, \
|
||||
.get_rate = _clk_get_rate, \
|
||||
.set_rate = _clk_set_rate, \
|
||||
.round_rate = _clk_round_rate, \
|
||||
.set_parent = _clk_set_parent, \
|
||||
.parent = p, \
|
||||
.secondary = s, \
|
||||
}
|
||||
|
||||
DEF_CLK(aips_tz1_clk, CCGR0, CG0, &ahb_clk, NULL);
|
||||
DEF_CLK(aips_tz2_clk, CCGR0, CG1, &ahb_clk, NULL);
|
||||
DEF_CLK(apbh_dma_clk, CCGR0, CG2, &ahb_clk, NULL);
|
||||
@@ -1811,6 +1879,7 @@ DEF_CLK(usdhc4_clk, CCGR6, CG4, &pll2_pfd_400m, NULL);
|
||||
DEF_CLK(emi_slow_clk, CCGR6, CG5, &axi_clk, NULL);
|
||||
DEF_CLK(vdo_axi_clk, CCGR6, CG6, &axi_clk, NULL);
|
||||
DEF_CLK(vpu_clk, CCGR6, CG7, &axi_clk, NULL);
|
||||
DEF_CLK_1B(cko1_clk, CCOSR, BP_CCOSR_CKO1_EN, &pll2_bus, NULL);
|
||||
|
||||
static int pcie_clk_enable(struct clk *clk)
|
||||
{
|
||||
@@ -1922,6 +1991,7 @@ static struct clk_lookup lookups[] = {
|
||||
_REGISTER_CLOCK(NULL, "gpmi_io_clk", gpmi_io_clk),
|
||||
_REGISTER_CLOCK(NULL, "usboh3_clk", usboh3_clk),
|
||||
_REGISTER_CLOCK(NULL, "sata_clk", sata_clk),
|
||||
_REGISTER_CLOCK(NULL, "cko1_clk", cko1_clk),
|
||||
};
|
||||
|
||||
int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode)
|
||||
@@ -2029,6 +2099,8 @@ int __init mx6q_clocks_init(void)
|
||||
clk_set_rate(&usdhc3_clk, 49500000);
|
||||
clk_set_rate(&usdhc4_clk, 49500000);
|
||||
|
||||
clk_set_parent(&cko1_clk, &ahb_clk);
|
||||
|
||||
np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-gpt");
|
||||
base = of_iomap(np, 0);
|
||||
WARN_ON(!base);
|
||||
|
||||
@@ -17,7 +17,7 @@
|
||||
#include <mach/hardware.h>
|
||||
|
||||
static struct map_desc imx_lluart_desc = {
|
||||
#ifdef CONFIG_DEBUG_IMX6Q_UART
|
||||
#ifdef CONFIG_DEBUG_IMX6Q_UART4
|
||||
.virtual = MX6Q_IO_P2V(MX6Q_UART4_BASE_ADDR),
|
||||
.pfn = __phys_to_pfn(MX6Q_UART4_BASE_ADDR),
|
||||
.length = MX6Q_UART4_SIZE,
|
||||
|
||||
@@ -108,6 +108,7 @@ void __init omap3xxx_voltagedomains_init(void)
|
||||
* XXX Will depend on the process, validation, and binning
|
||||
* for the currently-running IC
|
||||
*/
|
||||
#ifdef CONFIG_PM_OPP
|
||||
if (cpu_is_omap3630()) {
|
||||
omap3_voltdm_mpu.volt_data = omap36xx_vddmpu_volt_data;
|
||||
omap3_voltdm_core.volt_data = omap36xx_vddcore_volt_data;
|
||||
@@ -115,6 +116,7 @@ void __init omap3xxx_voltagedomains_init(void)
|
||||
omap3_voltdm_mpu.volt_data = omap34xx_vddmpu_volt_data;
|
||||
omap3_voltdm_core.volt_data = omap34xx_vddcore_volt_data;
|
||||
}
|
||||
#endif
|
||||
|
||||
if (cpu_is_omap3517() || cpu_is_omap3505())
|
||||
voltdms = voltagedomains_am35xx;
|
||||
|
||||
@@ -100,9 +100,11 @@ void __init omap44xx_voltagedomains_init(void)
|
||||
* XXX Will depend on the process, validation, and binning
|
||||
* for the currently-running IC
|
||||
*/
|
||||
#ifdef CONFIG_PM_OPP
|
||||
omap4_voltdm_mpu.volt_data = omap44xx_vdd_mpu_volt_data;
|
||||
omap4_voltdm_iva.volt_data = omap44xx_vdd_iva_volt_data;
|
||||
omap4_voltdm_core.volt_data = omap44xx_vdd_core_volt_data;
|
||||
#endif
|
||||
|
||||
for (i = 0; voltdm = voltagedomains_omap4[i], voltdm; i++)
|
||||
voltdm->sys_clk.name = sys_clk_name;
|
||||
|
||||
@@ -30,6 +30,7 @@
|
||||
#include <linux/serial_sci.h>
|
||||
#include <linux/smsc911x.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/videodev2.h>
|
||||
#include <linux/input.h>
|
||||
#include <linux/input/sh_keysc.h>
|
||||
#include <linux/mmc/host.h>
|
||||
@@ -37,7 +38,6 @@
|
||||
#include <linux/mmc/sh_mobile_sdhi.h>
|
||||
#include <linux/mfd/tmio.h>
|
||||
#include <linux/sh_clk.h>
|
||||
#include <linux/dma-mapping.h>
|
||||
#include <video/sh_mobile_lcdc.h>
|
||||
#include <video/sh_mipi_dsi.h>
|
||||
#include <sound/sh_fsi.h>
|
||||
@@ -159,19 +159,12 @@ static struct resource sh_mmcif_resources[] = {
|
||||
},
|
||||
};
|
||||
|
||||
static struct sh_mmcif_dma sh_mmcif_dma = {
|
||||
.chan_priv_rx = {
|
||||
.slave_id = SHDMA_SLAVE_MMCIF_RX,
|
||||
},
|
||||
.chan_priv_tx = {
|
||||
.slave_id = SHDMA_SLAVE_MMCIF_TX,
|
||||
},
|
||||
};
|
||||
static struct sh_mmcif_plat_data sh_mmcif_platdata = {
|
||||
.sup_pclk = 0,
|
||||
.ocr = MMC_VDD_165_195,
|
||||
.caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
|
||||
.dma = &sh_mmcif_dma,
|
||||
.slave_id_tx = SHDMA_SLAVE_MMCIF_TX,
|
||||
.slave_id_rx = SHDMA_SLAVE_MMCIF_RX,
|
||||
};
|
||||
|
||||
static struct platform_device mmc_device = {
|
||||
@@ -321,12 +314,11 @@ static struct resource mipidsi0_resources[] = {
|
||||
},
|
||||
};
|
||||
|
||||
#define DSI0PHYCR 0xe615006c
|
||||
static int sh_mipi_set_dot_clock(struct platform_device *pdev,
|
||||
void __iomem *base,
|
||||
int enable)
|
||||
{
|
||||
struct clk *pck;
|
||||
struct clk *pck, *phy;
|
||||
int ret;
|
||||
|
||||
pck = clk_get(&pdev->dev, "dsip_clk");
|
||||
@@ -335,18 +327,27 @@ static int sh_mipi_set_dot_clock(struct platform_device *pdev,
|
||||
goto sh_mipi_set_dot_clock_pck_err;
|
||||
}
|
||||
|
||||
phy = clk_get(&pdev->dev, "dsiphy_clk");
|
||||
if (IS_ERR(phy)) {
|
||||
ret = PTR_ERR(phy);
|
||||
goto sh_mipi_set_dot_clock_phy_err;
|
||||
}
|
||||
|
||||
if (enable) {
|
||||
clk_set_rate(pck, clk_round_rate(pck, 24000000));
|
||||
__raw_writel(0x2a809010, DSI0PHYCR);
|
||||
clk_set_rate(phy, clk_round_rate(pck, 510000000));
|
||||
clk_enable(pck);
|
||||
clk_enable(phy);
|
||||
} else {
|
||||
clk_disable(pck);
|
||||
clk_disable(phy);
|
||||
}
|
||||
|
||||
ret = 0;
|
||||
|
||||
clk_put(phy);
|
||||
sh_mipi_set_dot_clock_phy_err:
|
||||
clk_put(pck);
|
||||
|
||||
sh_mipi_set_dot_clock_pck_err:
|
||||
return ret;
|
||||
}
|
||||
|
||||
@@ -295,15 +295,6 @@ static struct resource sh_mmcif_resources[] = {
|
||||
},
|
||||
};
|
||||
|
||||
static struct sh_mmcif_dma sh_mmcif_dma = {
|
||||
.chan_priv_rx = {
|
||||
.slave_id = SHDMA_SLAVE_MMCIF_RX,
|
||||
},
|
||||
.chan_priv_tx = {
|
||||
.slave_id = SHDMA_SLAVE_MMCIF_TX,
|
||||
},
|
||||
};
|
||||
|
||||
static struct sh_mmcif_plat_data sh_mmcif_plat = {
|
||||
.sup_pclk = 0,
|
||||
.ocr = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
|
||||
@@ -311,7 +302,8 @@ static struct sh_mmcif_plat_data sh_mmcif_plat = {
|
||||
MMC_CAP_8_BIT_DATA |
|
||||
MMC_CAP_NEEDS_POLL,
|
||||
.get_cd = slot_cn7_get_cd,
|
||||
.dma = &sh_mmcif_dma,
|
||||
.slave_id_tx = SHDMA_SLAVE_MMCIF_TX,
|
||||
.slave_id_rx = SHDMA_SLAVE_MMCIF_RX,
|
||||
};
|
||||
|
||||
static struct platform_device sh_mmcif_device = {
|
||||
|
||||
@@ -143,11 +143,10 @@ static struct gpio_keys_button gpio_buttons[] = {
|
||||
static struct gpio_keys_platform_data gpio_key_info = {
|
||||
.buttons = gpio_buttons,
|
||||
.nbuttons = ARRAY_SIZE(gpio_buttons),
|
||||
.poll_interval = 250, /* polled for now */
|
||||
};
|
||||
|
||||
static struct platform_device gpio_keys_device = {
|
||||
.name = "gpio-keys-polled", /* polled for now */
|
||||
.name = "gpio-keys",
|
||||
.id = -1,
|
||||
.dev = {
|
||||
.platform_data = &gpio_key_info,
|
||||
|
||||
@@ -43,7 +43,6 @@
|
||||
#include <linux/smsc911x.h>
|
||||
#include <linux/sh_intc.h>
|
||||
#include <linux/tca6416_keypad.h>
|
||||
#include <linux/usb/r8a66597.h>
|
||||
#include <linux/usb/renesas_usbhs.h>
|
||||
#include <linux/dma-mapping.h>
|
||||
|
||||
@@ -145,11 +144,6 @@
|
||||
* 1-2 short | VBUS 5V | Host
|
||||
* open | external VBUS | Function
|
||||
*
|
||||
* *1
|
||||
* CN31 is used as
|
||||
* CONFIG_USB_R8A66597_HCD Host
|
||||
* CONFIG_USB_RENESAS_USBHS Function
|
||||
*
|
||||
* CAUTION
|
||||
*
|
||||
* renesas_usbhs driver can use external interrupt mode
|
||||
@@ -161,15 +155,6 @@
|
||||
* mackerel can not use external interrupt (IRQ7-PORT167) mode on "USB0",
|
||||
* because Touchscreen is using IRQ7-PORT40.
|
||||
* It is impossible to use IRQ7 demux on this board.
|
||||
*
|
||||
* We can use external interrupt mode USB-Function on "USB1".
|
||||
* USB1 can become Host by r8a66597, and become Function by renesas_usbhs.
|
||||
* But don't select both drivers in same time.
|
||||
* These uses same IRQ number for request_irq(), and aren't supporting
|
||||
* IRQF_SHARED / IORESOURCE_IRQ_SHAREABLE.
|
||||
*
|
||||
* Actually these are old/new version of USB driver.
|
||||
* This mean its register will be broken if it supports shared IRQ,
|
||||
*/
|
||||
|
||||
/*
|
||||
@@ -207,6 +192,16 @@
|
||||
*
|
||||
*/
|
||||
|
||||
/*
|
||||
* FSI - AK4642
|
||||
*
|
||||
* it needs amixer settings for playing
|
||||
*
|
||||
* amixer set "Headphone" on
|
||||
* amixer set "HPOUTL Mixer DACH" on
|
||||
* amixer set "HPOUTR Mixer DACH" on
|
||||
*/
|
||||
|
||||
/*
|
||||
* FIXME !!
|
||||
*
|
||||
@@ -676,51 +671,16 @@ static struct platform_device usbhs0_device = {
|
||||
* Use J30 to select between Host and Function. This setting
|
||||
* can however not be detected by software. Hotplug of USBHS1
|
||||
* is provided via IRQ8.
|
||||
*
|
||||
* Current USB1 works as "USB Host".
|
||||
* - set J30 "short"
|
||||
*
|
||||
* If you want to use it as "USB gadget",
|
||||
* - J30 "open"
|
||||
* - modify usbhs1_get_id() USBHS_HOST -> USBHS_GADGET
|
||||
* - add .get_vbus = usbhs_get_vbus in usbhs1_private
|
||||
*/
|
||||
#define IRQ8 evt2irq(0x0300)
|
||||
|
||||
/* USBHS1 USB Host support via r8a66597_hcd */
|
||||
static void usb1_host_port_power(int port, int power)
|
||||
{
|
||||
if (!power) /* only power-on is supported for now */
|
||||
return;
|
||||
|
||||
/* set VBOUT/PWEN and EXTLP1 in DVSTCTR */
|
||||
__raw_writew(__raw_readw(0xE68B0008) | 0x600, 0xE68B0008);
|
||||
}
|
||||
|
||||
static struct r8a66597_platdata usb1_host_data = {
|
||||
.on_chip = 1,
|
||||
.port_power = usb1_host_port_power,
|
||||
};
|
||||
|
||||
static struct resource usb1_host_resources[] = {
|
||||
[0] = {
|
||||
.name = "USBHS1",
|
||||
.start = 0xe68b0000,
|
||||
.end = 0xe68b00e6 - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = evt2irq(0x1ce0) /* USB1_USB1I0 */,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device usb1_host_device = {
|
||||
.name = "r8a66597_hcd",
|
||||
.id = 1,
|
||||
.dev = {
|
||||
.dma_mask = NULL, /* not use dma */
|
||||
.coherent_dma_mask = 0xffffffff,
|
||||
.platform_data = &usb1_host_data,
|
||||
},
|
||||
.num_resources = ARRAY_SIZE(usb1_host_resources),
|
||||
.resource = usb1_host_resources,
|
||||
};
|
||||
|
||||
/* USBHS1 USB Function support via renesas_usbhs */
|
||||
|
||||
#define USB_PHY_MODE (1 << 4)
|
||||
#define USB_PHY_INT_EN ((1 << 3) | (1 << 2))
|
||||
#define USB_PHY_ON (1 << 1)
|
||||
@@ -776,7 +736,7 @@ static void usbhs1_hardware_exit(struct platform_device *pdev)
|
||||
|
||||
static int usbhs1_get_id(struct platform_device *pdev)
|
||||
{
|
||||
return USBHS_GADGET;
|
||||
return USBHS_HOST;
|
||||
}
|
||||
|
||||
static u32 usbhs1_pipe_cfg[] = {
|
||||
@@ -807,7 +767,6 @@ static struct usbhs_private usbhs1_private = {
|
||||
.hardware_exit = usbhs1_hardware_exit,
|
||||
.get_id = usbhs1_get_id,
|
||||
.phy_reset = usbhs_phy_reset,
|
||||
.get_vbus = usbhs_get_vbus,
|
||||
},
|
||||
.driver_param = {
|
||||
.buswait_bwait = 4,
|
||||
@@ -1184,15 +1143,6 @@ static struct resource sh_mmcif_resources[] = {
|
||||
},
|
||||
};
|
||||
|
||||
static struct sh_mmcif_dma sh_mmcif_dma = {
|
||||
.chan_priv_rx = {
|
||||
.slave_id = SHDMA_SLAVE_MMCIF_RX,
|
||||
},
|
||||
.chan_priv_tx = {
|
||||
.slave_id = SHDMA_SLAVE_MMCIF_TX,
|
||||
},
|
||||
};
|
||||
|
||||
static struct sh_mmcif_plat_data sh_mmcif_plat = {
|
||||
.sup_pclk = 0,
|
||||
.ocr = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
|
||||
@@ -1200,7 +1150,8 @@ static struct sh_mmcif_plat_data sh_mmcif_plat = {
|
||||
MMC_CAP_8_BIT_DATA |
|
||||
MMC_CAP_NEEDS_POLL,
|
||||
.get_cd = slot_cn7_get_cd,
|
||||
.dma = &sh_mmcif_dma,
|
||||
.slave_id_tx = SHDMA_SLAVE_MMCIF_TX,
|
||||
.slave_id_rx = SHDMA_SLAVE_MMCIF_RX,
|
||||
};
|
||||
|
||||
static struct platform_device sh_mmcif_device = {
|
||||
@@ -1311,7 +1262,6 @@ static struct platform_device *mackerel_devices[] __initdata = {
|
||||
&nor_flash_device,
|
||||
&smc911x_device,
|
||||
&lcdc_device,
|
||||
&usb1_host_device,
|
||||
&usbhs1_device,
|
||||
&usbhs0_device,
|
||||
&leds_device,
|
||||
@@ -1473,9 +1423,6 @@ static void __init mackerel_init(void)
|
||||
gpio_pull_down(GPIO_PORT167CR); /* VBUS0_1 pull down */
|
||||
gpio_request(GPIO_FN_IDIN_1_113, NULL);
|
||||
|
||||
/* USB phy tweak to make the r8a66597_hcd host driver work */
|
||||
__raw_writew(0x8a0a, 0xe6058130); /* USBCR4 */
|
||||
|
||||
/* enable FSI2 port A (ak4643) */
|
||||
gpio_request(GPIO_FN_FSIAIBT, NULL);
|
||||
gpio_request(GPIO_FN_FSIAILR, NULL);
|
||||
|
||||
@@ -365,6 +365,114 @@ static struct clk div6_clks[DIV6_NR] = {
|
||||
dsi_parent, ARRAY_SIZE(dsi_parent), 12, 3),
|
||||
};
|
||||
|
||||
/* DSI DIV */
|
||||
static unsigned long dsiphy_recalc(struct clk *clk)
|
||||
{
|
||||
u32 value;
|
||||
|
||||
value = __raw_readl(clk->mapping->base);
|
||||
|
||||
/* FIXME */
|
||||
if (!(value & 0x000B8000))
|
||||
return clk->parent->rate;
|
||||
|
||||
value &= 0x3f;
|
||||
value += 1;
|
||||
|
||||
if ((value < 12) ||
|
||||
(value > 33)) {
|
||||
pr_err("DSIPHY has wrong value (%d)", value);
|
||||
return 0;
|
||||
}
|
||||
|
||||
return clk->parent->rate / value;
|
||||
}
|
||||
|
||||
static long dsiphy_round_rate(struct clk *clk, unsigned long rate)
|
||||
{
|
||||
return clk_rate_mult_range_round(clk, 12, 33, rate);
|
||||
}
|
||||
|
||||
static void dsiphy_disable(struct clk *clk)
|
||||
{
|
||||
u32 value;
|
||||
|
||||
value = __raw_readl(clk->mapping->base);
|
||||
value &= ~0x000B8000;
|
||||
|
||||
__raw_writel(value , clk->mapping->base);
|
||||
}
|
||||
|
||||
static int dsiphy_enable(struct clk *clk)
|
||||
{
|
||||
u32 value;
|
||||
int multi;
|
||||
|
||||
value = __raw_readl(clk->mapping->base);
|
||||
multi = (value & 0x3f) + 1;
|
||||
|
||||
if ((multi < 12) || (multi > 33))
|
||||
return -EIO;
|
||||
|
||||
__raw_writel(value | 0x000B8000, clk->mapping->base);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int dsiphy_set_rate(struct clk *clk, unsigned long rate)
|
||||
{
|
||||
u32 value;
|
||||
int idx;
|
||||
|
||||
idx = rate / clk->parent->rate;
|
||||
if ((idx < 12) || (idx > 33))
|
||||
return -EINVAL;
|
||||
|
||||
idx += -1;
|
||||
|
||||
value = __raw_readl(clk->mapping->base);
|
||||
value = (value & ~0x3f) + idx;
|
||||
|
||||
__raw_writel(value, clk->mapping->base);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct clk_ops dsiphy_clk_ops = {
|
||||
.recalc = dsiphy_recalc,
|
||||
.round_rate = dsiphy_round_rate,
|
||||
.set_rate = dsiphy_set_rate,
|
||||
.enable = dsiphy_enable,
|
||||
.disable = dsiphy_disable,
|
||||
};
|
||||
|
||||
static struct clk_mapping dsi0phy_clk_mapping = {
|
||||
.phys = DSI0PHYCR,
|
||||
.len = 4,
|
||||
};
|
||||
|
||||
static struct clk_mapping dsi1phy_clk_mapping = {
|
||||
.phys = DSI1PHYCR,
|
||||
.len = 4,
|
||||
};
|
||||
|
||||
static struct clk dsi0phy_clk = {
|
||||
.ops = &dsiphy_clk_ops,
|
||||
.parent = &div6_clks[DIV6_DSI0P], /* late install */
|
||||
.mapping = &dsi0phy_clk_mapping,
|
||||
};
|
||||
|
||||
static struct clk dsi1phy_clk = {
|
||||
.ops = &dsiphy_clk_ops,
|
||||
.parent = &div6_clks[DIV6_DSI1P], /* late install */
|
||||
.mapping = &dsi1phy_clk_mapping,
|
||||
};
|
||||
|
||||
static struct clk *late_main_clks[] = {
|
||||
&dsi0phy_clk,
|
||||
&dsi1phy_clk,
|
||||
};
|
||||
|
||||
enum { MSTP001,
|
||||
MSTP129, MSTP128, MSTP127, MSTP126, MSTP125, MSTP118, MSTP116, MSTP100,
|
||||
MSTP219,
|
||||
@@ -429,6 +537,8 @@ static struct clk_lookup lookups[] = {
|
||||
CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSIT]),
|
||||
CLKDEV_ICK_ID("dsip_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSI0P]),
|
||||
CLKDEV_ICK_ID("dsip_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSI1P]),
|
||||
CLKDEV_ICK_ID("dsiphy_clk", "sh-mipi-dsi.0", &dsi0phy_clk),
|
||||
CLKDEV_ICK_ID("dsiphy_clk", "sh-mipi-dsi.1", &dsi1phy_clk),
|
||||
|
||||
/* MSTP32 clocks */
|
||||
CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* I2C2 */
|
||||
@@ -504,6 +614,9 @@ void __init sh73a0_clock_init(void)
|
||||
if (!ret)
|
||||
ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR);
|
||||
|
||||
for (k = 0; !ret && (k < ARRAY_SIZE(late_main_clks)); k++)
|
||||
ret = clk_register(late_main_clks[k]);
|
||||
|
||||
clkdev_add_table(lookups, ARRAY_SIZE(lookups));
|
||||
|
||||
if (!ret)
|
||||
|
||||
@@ -515,8 +515,8 @@ enum {
|
||||
SHDMA_SLAVE_MMCIF_RX,
|
||||
};
|
||||
|
||||
/* PINT interrupts are located at Linux IRQ 768 and up */
|
||||
#define SH73A0_PINT0_IRQ(irq) ((irq) + 768)
|
||||
#define SH73A0_PINT1_IRQ(irq) ((irq) + 800)
|
||||
/* PINT interrupts are located at Linux IRQ 800 and up */
|
||||
#define SH73A0_PINT0_IRQ(irq) ((irq) + 800)
|
||||
#define SH73A0_PINT1_IRQ(irq) ((irq) + 832)
|
||||
|
||||
#endif /* __ASM_SH73A0_H__ */
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user