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Merge branch 'tracing/urgent' into tracing/ftrace
Conflicts: kernel/trace/trace.c
This commit is contained in:
Ingo Molnar
@@ -21,11 +21,14 @@ This driver is known to work with the following cards:
|
||||
* SA E200
|
||||
* SA E200i
|
||||
* SA E500
|
||||
* SA P700m
|
||||
* SA P212
|
||||
* SA P410
|
||||
* SA P410i
|
||||
* SA P411
|
||||
* SA P812
|
||||
* SA P712m
|
||||
* SA P711m
|
||||
|
||||
Detecting drive failures:
|
||||
-------------------------
|
||||
|
||||
@@ -213,4 +213,29 @@ TkRat (GUI)
|
||||
|
||||
Works. Use "Insert file..." or external editor.
|
||||
|
||||
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
Gmail (Web GUI)
|
||||
|
||||
If you just have to use Gmail to send patches, it CAN be made to work. It
|
||||
requires a bit of external help, though.
|
||||
|
||||
The first problem is that Gmail converts tabs to spaces. This will
|
||||
totally break your patches. To prevent this, you have to use a different
|
||||
editor. There is a firefox extension called "ViewSourceWith"
|
||||
(https://addons.mozilla.org/en-US/firefox/addon/394) which allows you to
|
||||
edit any text box in the editor of your choice. Configure it to launch
|
||||
your favorite editor. When you want to send a patch, use this technique.
|
||||
Once you have crafted your messsage + patch, save and exit the editor,
|
||||
which should reload the Gmail edit box. GMAIL WILL PRESERVE THE TABS.
|
||||
Hoorah. Apparently you can cut-n-paste literal tabs, but Gmail will
|
||||
convert those to spaces upon sending!
|
||||
|
||||
The second problem is that Gmail converts tabs to spaces on replies. If
|
||||
you reply to a patch, don't expect to be able to apply it as a patch.
|
||||
|
||||
The last problem is that Gmail will base64-encode any message that has a
|
||||
non-ASCII character. That includes things like European names. Be aware.
|
||||
|
||||
Gmail is not convenient for lkml patches, but CAN be made to work.
|
||||
|
||||
###
|
||||
|
||||
@@ -8,6 +8,12 @@ if you want to format from within Linux.
|
||||
|
||||
VFAT MOUNT OPTIONS
|
||||
----------------------------------------------------------------------
|
||||
uid=### -- Set the owner of all files on this filesystem.
|
||||
The default is the uid of current process.
|
||||
|
||||
gid=### -- Set the group of all files on this filesystem.
|
||||
The default is the gid of current process.
|
||||
|
||||
umask=### -- The permission mask (for files and directories, see umask(1)).
|
||||
The default is the umask of current process.
|
||||
|
||||
@@ -36,7 +42,7 @@ codepage=### -- Sets the codepage number for converting to shortname
|
||||
characters on FAT filesystem.
|
||||
By default, FAT_DEFAULT_CODEPAGE setting is used.
|
||||
|
||||
iocharset=name -- Character set to use for converting between the
|
||||
iocharset=<name> -- Character set to use for converting between the
|
||||
encoding is used for user visible filename and 16 bit
|
||||
Unicode characters. Long filenames are stored on disk
|
||||
in Unicode format, but Unix for the most part doesn't
|
||||
@@ -86,6 +92,8 @@ check=s|r|n -- Case sensitivity checking setting.
|
||||
r: relaxed, case insensitive
|
||||
n: normal, default setting, currently case insensitive
|
||||
|
||||
nocase -- This was deprecated for vfat. Use shortname=win95 instead.
|
||||
|
||||
shortname=lower|win95|winnt|mixed
|
||||
-- Shortname display/create setting.
|
||||
lower: convert to lowercase for display,
|
||||
@@ -99,11 +107,31 @@ shortname=lower|win95|winnt|mixed
|
||||
tz=UTC -- Interpret timestamps as UTC rather than local time.
|
||||
This option disables the conversion of timestamps
|
||||
between local time (as used by Windows on FAT) and UTC
|
||||
(which Linux uses internally). This is particuluarly
|
||||
(which Linux uses internally). This is particularly
|
||||
useful when mounting devices (like digital cameras)
|
||||
that are set to UTC in order to avoid the pitfalls of
|
||||
local time.
|
||||
|
||||
showexec -- If set, the execute permission bits of the file will be
|
||||
allowed only if the extension part of the name is .EXE,
|
||||
.COM, or .BAT. Not set by default.
|
||||
|
||||
debug -- Can be set, but unused by the current implementation.
|
||||
|
||||
sys_immutable -- If set, ATTR_SYS attribute on FAT is handled as
|
||||
IMMUTABLE flag on Linux. Not set by default.
|
||||
|
||||
flush -- If set, the filesystem will try to flush to disk more
|
||||
early than normal. Not set by default.
|
||||
|
||||
rodir -- FAT has the ATTR_RO (read-only) attribute. But on Windows,
|
||||
the ATTR_RO of the directory will be just ignored actually,
|
||||
and is used by only applications as flag. E.g. it's setted
|
||||
for the customized folder.
|
||||
|
||||
If you want to use ATTR_RO as read-only flag even for
|
||||
the directory, set this option.
|
||||
|
||||
<bool>: 0,1,yes,no,true,false
|
||||
|
||||
TODO
|
||||
|
||||
@@ -1003,13 +1003,15 @@ and is between 256 and 4096 characters. It is defined in the file
|
||||
Format:
|
||||
<cpu number>,...,<cpu number>
|
||||
or
|
||||
<cpu number>-<cpu number> (must be a positive range in ascending order)
|
||||
<cpu number>-<cpu number>
|
||||
(must be a positive range in ascending order)
|
||||
or a mixture
|
||||
<cpu number>,...,<cpu number>-<cpu number>
|
||||
|
||||
This option can be used to specify one or more CPUs
|
||||
to isolate from the general SMP balancing and scheduling
|
||||
algorithms. The only way to move a process onto or off
|
||||
an "isolated" CPU is via the CPU affinity syscalls.
|
||||
algorithms. You can move a process onto or off an
|
||||
"isolated" CPU via the CPU affinity syscalls or cpuset.
|
||||
<cpu number> begins at 0 and the maximum value is
|
||||
"number of CPUs in system - 1".
|
||||
|
||||
@@ -1478,8 +1480,6 @@ and is between 256 and 4096 characters. It is defined in the file
|
||||
Valid arguments: on, off
|
||||
Default: on
|
||||
|
||||
noirqbalance [X86-32,SMP,KNL] Disable kernel irq balancing
|
||||
|
||||
noirqdebug [X86-32] Disables the code which attempts to detect and
|
||||
disable unhandled interrupt sources.
|
||||
|
||||
|
||||
+1
-1
@@ -721,7 +721,7 @@ W: http://sourceforge.net/projects/acpi4asus
|
||||
W: http://xf.iksaif.net/acpi4asus
|
||||
S: Maintained
|
||||
|
||||
ASYNCHRONOUS TRANSFERS/TRANSFORMS API
|
||||
ASYNCHRONOUS TRANSFERS/TRANSFORMS (IOAT) API
|
||||
P: Dan Williams
|
||||
M: dan.j.williams@intel.com
|
||||
P: Maciej Sosnowski
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
VERSION = 2
|
||||
PATCHLEVEL = 6
|
||||
SUBLEVEL = 28
|
||||
EXTRAVERSION = -rc3
|
||||
EXTRAVERSION = -rc4
|
||||
NAME = Killer Bat of Doom
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
||||
+1
-1
@@ -21,7 +21,7 @@ config OPROFILE_IBS
|
||||
Instruction-Based Sampling (IBS) is a new profiling
|
||||
technique that provides rich, precise program performance
|
||||
information. IBS is introduced by AMD Family10h processors
|
||||
(AMD Opteron Quad-Core processor “Barcelona”) to overcome
|
||||
(AMD Opteron Quad-Core processor "Barcelona") to overcome
|
||||
the limitations of conventional performance counter
|
||||
sampling.
|
||||
|
||||
|
||||
@@ -44,10 +44,10 @@
|
||||
* The module space lives between the addresses given by TASK_SIZE
|
||||
* and PAGE_OFFSET - it must be within 32MB of the kernel text.
|
||||
*/
|
||||
#define MODULE_END (PAGE_OFFSET)
|
||||
#define MODULE_START (MODULE_END - 16*1048576)
|
||||
#define MODULES_END (PAGE_OFFSET)
|
||||
#define MODULES_VADDR (MODULES_END - 16*1048576)
|
||||
|
||||
#if TASK_SIZE > MODULE_START
|
||||
#if TASK_SIZE > MODULES_VADDR
|
||||
#error Top of user space clashes with start of module space
|
||||
#endif
|
||||
|
||||
@@ -56,7 +56,7 @@
|
||||
* Since we use sections to map it, this macro replaces the physical address
|
||||
* with its virtual address while keeping offset from the base section.
|
||||
*/
|
||||
#define XIP_VIRT_ADDR(physaddr) (MODULE_START + ((physaddr) & 0x000fffff))
|
||||
#define XIP_VIRT_ADDR(physaddr) (MODULES_VADDR + ((physaddr) & 0x000fffff))
|
||||
|
||||
/*
|
||||
* Allow 16MB-aligned ioremap pages
|
||||
@@ -94,8 +94,8 @@
|
||||
/*
|
||||
* The module can be at any place in ram in nommu mode.
|
||||
*/
|
||||
#define MODULE_END (END_MEM)
|
||||
#define MODULE_START (PHYS_OFFSET)
|
||||
#define MODULES_END (END_MEM)
|
||||
#define MODULES_VADDR (PHYS_OFFSET)
|
||||
|
||||
#endif /* !CONFIG_MMU */
|
||||
|
||||
|
||||
@@ -42,6 +42,10 @@
|
||||
#define CR_U (1 << 22) /* Unaligned access operation */
|
||||
#define CR_XP (1 << 23) /* Extended page tables */
|
||||
#define CR_VE (1 << 24) /* Vectored interrupts */
|
||||
#define CR_EE (1 << 25) /* Exception (Big) Endian */
|
||||
#define CR_TRE (1 << 28) /* TEX remap enable */
|
||||
#define CR_AFE (1 << 29) /* Access flag enable */
|
||||
#define CR_TE (1 << 30) /* Thumb exception enable */
|
||||
|
||||
/*
|
||||
* This is used to ensure the compiler did actually allocate the register we
|
||||
|
||||
@@ -21,12 +21,16 @@ int elf_check_arch(const struct elf32_hdr *x)
|
||||
|
||||
eflags = x->e_flags;
|
||||
if ((eflags & EF_ARM_EABI_MASK) == EF_ARM_EABI_UNKNOWN) {
|
||||
unsigned int flt_fmt;
|
||||
|
||||
/* APCS26 is only allowed if the CPU supports it */
|
||||
if ((eflags & EF_ARM_APCS_26) && !(elf_hwcap & HWCAP_26BIT))
|
||||
return 0;
|
||||
|
||||
flt_fmt = eflags & (EF_ARM_VFP_FLOAT | EF_ARM_SOFT_FLOAT);
|
||||
|
||||
/* VFP requires the supporting code */
|
||||
if ((eflags & EF_ARM_VFP_FLOAT) && !(elf_hwcap & HWCAP_VFP))
|
||||
if (flt_fmt == EF_ARM_VFP_FLOAT && !(elf_hwcap & HWCAP_VFP))
|
||||
return 0;
|
||||
}
|
||||
return 1;
|
||||
|
||||
@@ -26,12 +26,12 @@
|
||||
/*
|
||||
* The XIP kernel text is mapped in the module area for modules and
|
||||
* some other stuff to work without any indirect relocations.
|
||||
* MODULE_START is redefined here and not in asm/memory.h to avoid
|
||||
* MODULES_VADDR is redefined here and not in asm/memory.h to avoid
|
||||
* recompiling the whole kernel when CONFIG_XIP_KERNEL is turned on/off.
|
||||
*/
|
||||
extern void _etext;
|
||||
#undef MODULE_START
|
||||
#define MODULE_START (((unsigned long)&_etext + ~PGDIR_MASK) & PGDIR_MASK)
|
||||
#undef MODULES_VADDR
|
||||
#define MODULES_VADDR (((unsigned long)&_etext + ~PGDIR_MASK) & PGDIR_MASK)
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_MMU
|
||||
@@ -43,7 +43,7 @@ void *module_alloc(unsigned long size)
|
||||
if (!size)
|
||||
return NULL;
|
||||
|
||||
area = __get_vm_area(size, VM_ALLOC, MODULE_START, MODULE_END);
|
||||
area = __get_vm_area(size, VM_ALLOC, MODULES_VADDR, MODULES_END);
|
||||
if (!area)
|
||||
return NULL;
|
||||
|
||||
|
||||
@@ -429,18 +429,16 @@ void __init gpmc_init(void)
|
||||
gpmc_l3_clk = clk_get(NULL, ck);
|
||||
if (IS_ERR(gpmc_l3_clk)) {
|
||||
printk(KERN_ERR "Could not get GPMC clock %s\n", ck);
|
||||
return -ENODEV;
|
||||
BUG();
|
||||
}
|
||||
|
||||
gpmc_base = ioremap(l, SZ_4K);
|
||||
if (!gpmc_base) {
|
||||
clk_put(gpmc_l3_clk);
|
||||
printk(KERN_ERR "Could not get GPMC register memory\n");
|
||||
return -ENOMEM;
|
||||
BUG();
|
||||
}
|
||||
|
||||
BUG_ON(IS_ERR(gpmc_l3_clk));
|
||||
|
||||
l = gpmc_read_reg(GPMC_REVISION);
|
||||
printk(KERN_INFO "GPMC revision %d.%d\n", (l >> 4) & 0x0f, l & 0x0f);
|
||||
/* Set smart idle mode and automatic L3 clock gating */
|
||||
|
||||
@@ -98,7 +98,7 @@ static void xsc3_l2_inv_range(unsigned long start, unsigned long end)
|
||||
/*
|
||||
* Clean and invalidate partial last cache line.
|
||||
*/
|
||||
if (end & (CACHE_LINE_SIZE - 1)) {
|
||||
if (start < end && (end & (CACHE_LINE_SIZE - 1))) {
|
||||
xsc3_l2_clean_pa(end & ~(CACHE_LINE_SIZE - 1));
|
||||
xsc3_l2_inv_pa(end & ~(CACHE_LINE_SIZE - 1));
|
||||
end &= ~(CACHE_LINE_SIZE - 1);
|
||||
@@ -107,7 +107,7 @@ static void xsc3_l2_inv_range(unsigned long start, unsigned long end)
|
||||
/*
|
||||
* Invalidate all full cache lines between 'start' and 'end'.
|
||||
*/
|
||||
while (start != end) {
|
||||
while (start < end) {
|
||||
xsc3_l2_inv_pa(start);
|
||||
start += CACHE_LINE_SIZE;
|
||||
}
|
||||
|
||||
+79
-32
@@ -180,20 +180,20 @@ void adjust_cr(unsigned long mask, unsigned long set)
|
||||
#endif
|
||||
|
||||
#define PROT_PTE_DEVICE L_PTE_PRESENT|L_PTE_YOUNG|L_PTE_DIRTY|L_PTE_WRITE
|
||||
#define PROT_SECT_DEVICE PMD_TYPE_SECT|PMD_SECT_XN|PMD_SECT_AP_WRITE
|
||||
#define PROT_SECT_DEVICE PMD_TYPE_SECT|PMD_SECT_AP_WRITE
|
||||
|
||||
static struct mem_type mem_types[] = {
|
||||
[MT_DEVICE] = { /* Strongly ordered / ARMv6 shared device */
|
||||
.prot_pte = PROT_PTE_DEVICE | L_PTE_MT_DEV_SHARED |
|
||||
L_PTE_SHARED,
|
||||
.prot_l1 = PMD_TYPE_TABLE,
|
||||
.prot_sect = PROT_SECT_DEVICE | PMD_SECT_UNCACHED,
|
||||
.prot_sect = PROT_SECT_DEVICE | PMD_SECT_S,
|
||||
.domain = DOMAIN_IO,
|
||||
},
|
||||
[MT_DEVICE_NONSHARED] = { /* ARMv6 non-shared device */
|
||||
.prot_pte = PROT_PTE_DEVICE | L_PTE_MT_DEV_NONSHARED,
|
||||
.prot_l1 = PMD_TYPE_TABLE,
|
||||
.prot_sect = PROT_SECT_DEVICE | PMD_SECT_TEX(2),
|
||||
.prot_sect = PROT_SECT_DEVICE,
|
||||
.domain = DOMAIN_IO,
|
||||
},
|
||||
[MT_DEVICE_CACHED] = { /* ioremap_cached */
|
||||
@@ -205,7 +205,7 @@ static struct mem_type mem_types[] = {
|
||||
[MT_DEVICE_WC] = { /* ioremap_wc */
|
||||
.prot_pte = PROT_PTE_DEVICE | L_PTE_MT_DEV_WC,
|
||||
.prot_l1 = PMD_TYPE_TABLE,
|
||||
.prot_sect = PROT_SECT_DEVICE | PMD_SECT_BUFFERABLE,
|
||||
.prot_sect = PROT_SECT_DEVICE,
|
||||
.domain = DOMAIN_IO,
|
||||
},
|
||||
[MT_CACHECLEAN] = {
|
||||
@@ -273,22 +273,23 @@ static void __init build_mem_type_table(void)
|
||||
#endif
|
||||
|
||||
/*
|
||||
* On non-Xscale3 ARMv5-and-older systems, use CB=01
|
||||
* (Uncached/Buffered) for ioremap_wc() mappings. On XScale3
|
||||
* and ARMv6+, use TEXCB=00100 mappings (Inner/Outer Uncacheable
|
||||
* in xsc3 parlance, Uncached Normal in ARMv6 parlance).
|
||||
* Strip out features not present on earlier architectures.
|
||||
* Pre-ARMv5 CPUs don't have TEX bits. Pre-ARMv6 CPUs or those
|
||||
* without extended page tables don't have the 'Shared' bit.
|
||||
*/
|
||||
if (cpu_is_xsc3() || cpu_arch >= CPU_ARCH_ARMv6) {
|
||||
mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_TEX(1);
|
||||
mem_types[MT_DEVICE_WC].prot_sect &= ~PMD_SECT_BUFFERABLE;
|
||||
}
|
||||
if (cpu_arch < CPU_ARCH_ARMv5)
|
||||
for (i = 0; i < ARRAY_SIZE(mem_types); i++)
|
||||
mem_types[i].prot_sect &= ~PMD_SECT_TEX(7);
|
||||
if ((cpu_arch < CPU_ARCH_ARMv6 || !(cr & CR_XP)) && !cpu_is_xsc3())
|
||||
for (i = 0; i < ARRAY_SIZE(mem_types); i++)
|
||||
mem_types[i].prot_sect &= ~PMD_SECT_S;
|
||||
|
||||
/*
|
||||
* ARMv5 and lower, bit 4 must be set for page tables.
|
||||
* (was: cache "update-able on write" bit on ARM610)
|
||||
* However, Xscale cores require this bit to be cleared.
|
||||
* ARMv5 and lower, bit 4 must be set for page tables (was: cache
|
||||
* "update-able on write" bit on ARM610). However, Xscale and
|
||||
* Xscale3 require this bit to be cleared.
|
||||
*/
|
||||
if (cpu_is_xscale()) {
|
||||
if (cpu_is_xscale() || cpu_is_xsc3()) {
|
||||
for (i = 0; i < ARRAY_SIZE(mem_types); i++) {
|
||||
mem_types[i].prot_sect &= ~PMD_BIT4;
|
||||
mem_types[i].prot_l1 &= ~PMD_BIT4;
|
||||
@@ -302,6 +303,64 @@ static void __init build_mem_type_table(void)
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* Mark the device areas according to the CPU/architecture.
|
||||
*/
|
||||
if (cpu_is_xsc3() || (cpu_arch >= CPU_ARCH_ARMv6 && (cr & CR_XP))) {
|
||||
if (!cpu_is_xsc3()) {
|
||||
/*
|
||||
* Mark device regions on ARMv6+ as execute-never
|
||||
* to prevent speculative instruction fetches.
|
||||
*/
|
||||
mem_types[MT_DEVICE].prot_sect |= PMD_SECT_XN;
|
||||
mem_types[MT_DEVICE_NONSHARED].prot_sect |= PMD_SECT_XN;
|
||||
mem_types[MT_DEVICE_CACHED].prot_sect |= PMD_SECT_XN;
|
||||
mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_XN;
|
||||
}
|
||||
if (cpu_arch >= CPU_ARCH_ARMv7 && (cr & CR_TRE)) {
|
||||
/*
|
||||
* For ARMv7 with TEX remapping,
|
||||
* - shared device is SXCB=1100
|
||||
* - nonshared device is SXCB=0100
|
||||
* - write combine device mem is SXCB=0001
|
||||
* (Uncached Normal memory)
|
||||
*/
|
||||
mem_types[MT_DEVICE].prot_sect |= PMD_SECT_TEX(1);
|
||||
mem_types[MT_DEVICE_NONSHARED].prot_sect |= PMD_SECT_TEX(1);
|
||||
mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_BUFFERABLE;
|
||||
} else if (cpu_is_xsc3()) {
|
||||
/*
|
||||
* For Xscale3,
|
||||
* - shared device is TEXCB=00101
|
||||
* - nonshared device is TEXCB=01000
|
||||
* - write combine device mem is TEXCB=00100
|
||||
* (Inner/Outer Uncacheable in xsc3 parlance)
|
||||
*/
|
||||
mem_types[MT_DEVICE].prot_sect |= PMD_SECT_TEX(1) | PMD_SECT_BUFFERED;
|
||||
mem_types[MT_DEVICE_NONSHARED].prot_sect |= PMD_SECT_TEX(2);
|
||||
mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_TEX(1);
|
||||
} else {
|
||||
/*
|
||||
* For ARMv6 and ARMv7 without TEX remapping,
|
||||
* - shared device is TEXCB=00001
|
||||
* - nonshared device is TEXCB=01000
|
||||
* - write combine device mem is TEXCB=00100
|
||||
* (Uncached Normal in ARMv6 parlance).
|
||||
*/
|
||||
mem_types[MT_DEVICE].prot_sect |= PMD_SECT_BUFFERED;
|
||||
mem_types[MT_DEVICE_NONSHARED].prot_sect |= PMD_SECT_TEX(2);
|
||||
mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_TEX(1);
|
||||
}
|
||||
} else {
|
||||
/*
|
||||
* On others, write combining is "Uncached/Buffered"
|
||||
*/
|
||||
mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_BUFFERABLE;
|
||||
}
|
||||
|
||||
/*
|
||||
* Now deal with the memory-type mappings
|
||||
*/
|
||||
cp = &cache_policies[cachepolicy];
|
||||
vecs_pgprot = kern_pgprot = user_pgprot = cp->pte;
|
||||
|
||||
@@ -317,12 +376,8 @@ static void __init build_mem_type_table(void)
|
||||
* Enable CPU-specific coherency if supported.
|
||||
* (Only available on XSC3 at the moment.)
|
||||
*/
|
||||
if (arch_is_coherent()) {
|
||||
if (cpu_is_xsc3()) {
|
||||
mem_types[MT_MEMORY].prot_sect |= PMD_SECT_S;
|
||||
mem_types[MT_MEMORY].prot_pte |= L_PTE_SHARED;
|
||||
}
|
||||
}
|
||||
if (arch_is_coherent() && cpu_is_xsc3())
|
||||
mem_types[MT_MEMORY].prot_sect |= PMD_SECT_S;
|
||||
|
||||
/*
|
||||
* ARMv6 and above have extended page tables.
|
||||
@@ -336,11 +391,6 @@ static void __init build_mem_type_table(void)
|
||||
mem_types[MT_MINICLEAN].prot_sect |= PMD_SECT_APX|PMD_SECT_AP_WRITE;
|
||||
mem_types[MT_CACHECLEAN].prot_sect |= PMD_SECT_APX|PMD_SECT_AP_WRITE;
|
||||
|
||||
/*
|
||||
* Mark the device area as "shared device"
|
||||
*/
|
||||
mem_types[MT_DEVICE].prot_sect |= PMD_SECT_BUFFERED;
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
/*
|
||||
* Mark memory with the "shared" attribute for SMP systems
|
||||
@@ -360,9 +410,6 @@ static void __init build_mem_type_table(void)
|
||||
mem_types[MT_LOW_VECTORS].prot_pte |= vecs_pgprot;
|
||||
mem_types[MT_HIGH_VECTORS].prot_pte |= vecs_pgprot;
|
||||
|
||||
if (cpu_arch < CPU_ARCH_ARMv5)
|
||||
mem_types[MT_MINICLEAN].prot_sect &= ~PMD_SECT_TEX(1);
|
||||
|
||||
pgprot_user = __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | user_pgprot);
|
||||
pgprot_kernel = __pgprot(L_PTE_PRESENT | L_PTE_YOUNG |
|
||||
L_PTE_DIRTY | L_PTE_WRITE |
|
||||
@@ -654,7 +701,7 @@ static inline void prepare_page_table(struct meminfo *mi)
|
||||
/*
|
||||
* Clear out all the mappings below the kernel image.
|
||||
*/
|
||||
for (addr = 0; addr < MODULE_START; addr += PGDIR_SIZE)
|
||||
for (addr = 0; addr < MODULES_VADDR; addr += PGDIR_SIZE)
|
||||
pmd_clear(pmd_off_k(addr));
|
||||
|
||||
#ifdef CONFIG_XIP_KERNEL
|
||||
@@ -766,7 +813,7 @@ static void __init devicemaps_init(struct machine_desc *mdesc)
|
||||
*/
|
||||
#ifdef CONFIG_XIP_KERNEL
|
||||
map.pfn = __phys_to_pfn(CONFIG_XIP_PHYS_ADDR & SECTION_MASK);
|
||||
map.virtual = MODULE_START;
|
||||
map.virtual = MODULES_VADDR;
|
||||
map.length = ((unsigned long)&_etext - map.virtual + ~SECTION_MASK) & SECTION_MASK;
|
||||
map.type = MT_ROM;
|
||||
create_mapping(&map);
|
||||
|
||||
@@ -115,7 +115,7 @@ ENTRY(cpu_v7_set_pte_ext)
|
||||
orr r3, r3, r2
|
||||
orr r3, r3, #PTE_EXT_AP0 | 2
|
||||
|
||||
tst r2, #1 << 4
|
||||
tst r1, #1 << 4
|
||||
orrne r3, r3, #PTE_EXT_TEX(1)
|
||||
|
||||
tst r1, #L_PTE_WRITE
|
||||
@@ -192,11 +192,11 @@ __v7_setup:
|
||||
mov pc, lr @ return to head.S:__ret
|
||||
ENDPROC(__v7_setup)
|
||||
|
||||
/*
|
||||
* V X F I D LR
|
||||
* .... ...E PUI. .T.T 4RVI ZFRS BLDP WCAM
|
||||
* rrrr rrrx xxx0 0101 xxxx xxxx x111 xxxx < forced
|
||||
* 0 110 0011 1.00 .111 1101 < we want
|
||||
/* AT
|
||||
* TFR EV X F I D LR
|
||||
* .EEE ..EE PUI. .T.T 4RVI ZFRS BLDP WCAM
|
||||
* rxxx rrxx xxx0 0101 xxxx xxxx x111 xxxx < forced
|
||||
* 1 0 110 0011 1.00 .111 1101 < we want
|
||||
*/
|
||||
.type v7_crval, #object
|
||||
v7_crval:
|
||||
|
||||
+10
-10
@@ -428,23 +428,23 @@ static int clk_debugfs_register_one(struct clk *c)
|
||||
if (c->id != 0)
|
||||
sprintf(p, ":%d", c->id);
|
||||
d = debugfs_create_dir(s, pa ? pa->dent : clk_debugfs_root);
|
||||
if (IS_ERR(d))
|
||||
return PTR_ERR(d);
|
||||
if (!d)
|
||||
return -ENOMEM;
|
||||
c->dent = d;
|
||||
|
||||
d = debugfs_create_u8("usecount", S_IRUGO, c->dent, (u8 *)&c->usecount);
|
||||
if (IS_ERR(d)) {
|
||||
err = PTR_ERR(d);
|
||||
if (!d) {
|
||||
err = -ENOMEM;
|
||||
goto err_out;
|
||||
}
|
||||
d = debugfs_create_u32("rate", S_IRUGO, c->dent, (u32 *)&c->rate);
|
||||
if (IS_ERR(d)) {
|
||||
err = PTR_ERR(d);
|
||||
if (!d) {
|
||||
err = -ENOMEM;
|
||||
goto err_out;
|
||||
}
|
||||
d = debugfs_create_x32("flags", S_IRUGO, c->dent, (u32 *)&c->flags);
|
||||
if (IS_ERR(d)) {
|
||||
err = PTR_ERR(d);
|
||||
if (!d) {
|
||||
err = -ENOMEM;
|
||||
goto err_out;
|
||||
}
|
||||
return 0;
|
||||
@@ -483,8 +483,8 @@ static int __init clk_debugfs_init(void)
|
||||
int err;
|
||||
|
||||
d = debugfs_create_dir("clock", NULL);
|
||||
if (IS_ERR(d))
|
||||
return PTR_ERR(d);
|
||||
if (!d)
|
||||
return -ENOMEM;
|
||||
clk_debugfs_root = d;
|
||||
|
||||
list_for_each_entry(c, &clocks, node) {
|
||||
|
||||
@@ -65,7 +65,8 @@
|
||||
#include <mach/omap34xx.h>
|
||||
#endif
|
||||
|
||||
#define INTCPS_SIR_IRQ_OFFSET 0x0040 /* Active interrupt number */
|
||||
#define INTCPS_SIR_IRQ_OFFSET 0x0040 /* Active interrupt offset */
|
||||
#define ACTIVEIRQ_MASK 0x7f /* Active interrupt bits */
|
||||
|
||||
.macro disable_fiq
|
||||
.endm
|
||||
@@ -88,6 +89,7 @@
|
||||
cmp \irqnr, #0x0
|
||||
2222:
|
||||
ldrne \irqnr, [\base, #INTCPS_SIR_IRQ_OFFSET]
|
||||
and \irqnr, \irqnr, #ACTIVEIRQ_MASK /* Clear spurious bits */
|
||||
|
||||
.endm
|
||||
|
||||
|
||||
@@ -372,7 +372,7 @@
|
||||
|
||||
/* External TWL4030 gpio interrupts are optional */
|
||||
#define TWL4030_GPIO_IRQ_BASE TWL4030_PWR_IRQ_END
|
||||
#ifdef CONFIG_TWL4030_GPIO
|
||||
#ifdef CONFIG_GPIO_TWL4030
|
||||
#define TWL4030_GPIO_NR_IRQS 18
|
||||
#else
|
||||
#define TWL4030_GPIO_NR_IRQS 0
|
||||
|
||||
+10
-9
@@ -148,6 +148,7 @@ config IA64_GENERIC
|
||||
select ACPI_NUMA
|
||||
select SWIOTLB
|
||||
select PCI_MSI
|
||||
select DMAR
|
||||
help
|
||||
This selects the system type of your hardware. A "generic" kernel
|
||||
will run on any supported IA-64 system. However, if you configure
|
||||
@@ -585,7 +586,7 @@ source "fs/Kconfig.binfmt"
|
||||
|
||||
endmenu
|
||||
|
||||
menu "Power management and ACPI"
|
||||
menu "Power management and ACPI options"
|
||||
|
||||
source "kernel/power/Kconfig"
|
||||
|
||||
@@ -641,6 +642,8 @@ source "net/Kconfig"
|
||||
|
||||
source "drivers/Kconfig"
|
||||
|
||||
source "arch/ia64/hp/sim/Kconfig"
|
||||
|
||||
config MSPEC
|
||||
tristate "Memory special operations driver"
|
||||
depends on IA64
|
||||
@@ -652,6 +655,12 @@ config MSPEC
|
||||
|
||||
source "fs/Kconfig"
|
||||
|
||||
source "arch/ia64/Kconfig.debug"
|
||||
|
||||
source "security/Kconfig"
|
||||
|
||||
source "crypto/Kconfig"
|
||||
|
||||
source "arch/ia64/kvm/Kconfig"
|
||||
|
||||
source "lib/Kconfig"
|
||||
@@ -678,11 +687,3 @@ config IRQ_PER_CPU
|
||||
|
||||
config IOMMU_HELPER
|
||||
def_bool (IA64_HP_ZX1 || IA64_HP_ZX1_SWIOTLB || IA64_GENERIC || SWIOTLB)
|
||||
|
||||
source "arch/ia64/hp/sim/Kconfig"
|
||||
|
||||
source "arch/ia64/Kconfig.debug"
|
||||
|
||||
source "security/Kconfig"
|
||||
|
||||
source "crypto/Kconfig"
|
||||
|
||||
@@ -13,19 +13,12 @@
|
||||
*/
|
||||
|
||||
#include <linux/device.h>
|
||||
#include <linux/swiotlb.h>
|
||||
|
||||
#include <asm/machvec.h>
|
||||
|
||||
/* swiotlb declarations & definitions: */
|
||||
extern int swiotlb_late_init_with_default_size (size_t size);
|
||||
extern ia64_mv_dma_alloc_coherent swiotlb_alloc_coherent;
|
||||
extern ia64_mv_dma_free_coherent swiotlb_free_coherent;
|
||||
extern ia64_mv_dma_map_single_attrs swiotlb_map_single_attrs;
|
||||
extern ia64_mv_dma_unmap_single_attrs swiotlb_unmap_single_attrs;
|
||||
extern ia64_mv_dma_map_sg_attrs swiotlb_map_sg_attrs;
|
||||
extern ia64_mv_dma_unmap_sg_attrs swiotlb_unmap_sg_attrs;
|
||||
extern ia64_mv_dma_supported swiotlb_dma_supported;
|
||||
extern ia64_mv_dma_mapping_error swiotlb_dma_mapping_error;
|
||||
|
||||
/* hwiommu declarations & definitions: */
|
||||
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user