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Merge tag 'powerpc-4.9-2' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux
Pull more powerpc updates from Michael Ellerman: "Some more powerpc updates for 4.9: Freescale updates from Scott Wood: - qbman support (a prerequisite for datapath drivers such as ethernet) - a PCI DMA fix+improvement - reset handler changes - more 8xx optimizations - some cleanups and fixes.' Fixes: - selftests/powerpc: Add missing binaries to .gitignores (Michael Ellerman) - selftests/powerpc: Fix build break caused by EXPORT_SYMBOL changes (Michael Ellerman) - powerpc/pseries: Fix stack corruption in htpe code (Laurent Dufour) - powerpc/64s: Fix power4_fixup_nap placement (Nicholas Piggin) - powerpc/64: Fix incorrect return value from __copy_tofrom_user (Paul Mackerras) - powerpc/mm/hash64: Fix might_have_hea() check (Michael Ellerman) Other: - MAINTAINERS: Remove myself from PA Semi entries (Olof Johansson) - MAINTAINERS: Drop separate pseries entry (Michael Ellerman) - MAINTAINERS: Update powerpc website & add selftests (Michael Ellerman): * tag 'powerpc-4.9-2' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux: (35 commits) powerpc/mm/hash64: Fix might_have_hea() check powerpc/64: Fix incorrect return value from __copy_tofrom_user powerpc/64s: Fix power4_fixup_nap placement powerpc/pseries: Fix stack corruption in htpe code selftests/powerpc: Fix build break caused by EXPORT_SYMBOL changes MAINTAINERS: Update powerpc website & add selftests MAINTAINERS: Drop separate pseries entry MAINTAINERS: Remove myself from PA Semi entries selftests/powerpc: Add missing binaries to .gitignores arch/powerpc: Add CONFIG_FSL_DPAA to corenetXX_smp_defconfig soc/qman: Add self-test for QMan driver soc/bman: Add self-test for BMan driver soc/fsl: Introduce DPAA 1.x QMan device driver soc/fsl: Introduce DPAA 1.x BMan device driver powerpc/8xx: make user addr DTLB miss the short path powerpc/8xx: Move additional DTLBMiss handlers out of exception area powerpc/8xx: use r3 to scratch CR in ITLBmiss soc/fsl/qe: fix gpio save_regs functions powerpc/8xx: add dedicated machine check handler powerpc/8xx: add system_reset_exception ...
This commit is contained in:
Linus Torvalds
+5
-13
@@ -7201,17 +7201,11 @@ F: drivers/lightnvm/
|
||||
F: include/linux/lightnvm.h
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F: include/uapi/linux/lightnvm.h
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LINUX FOR IBM pSERIES (RS/6000)
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M: Paul Mackerras <paulus@au.ibm.com>
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W: http://www.ibm.com/linux/ltc/projects/ppc
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S: Supported
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F: arch/powerpc/boot/rs6000.h
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LINUX FOR POWERPC (32-BIT AND 64-BIT)
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M: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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M: Paul Mackerras <paulus@samba.org>
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M: Michael Ellerman <mpe@ellerman.id.au>
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W: http://www.penguinppc.org/
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W: https://github.com/linuxppc/linux/wiki
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L: linuxppc-dev@lists.ozlabs.org
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Q: http://patchwork.ozlabs.org/project/linuxppc-dev/list/
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T: git git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git
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@@ -7226,6 +7220,7 @@ F: drivers/net/ethernet/ibm/ibmvnic.*
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F: drivers/pci/hotplug/pnv_php.c
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F: drivers/pci/hotplug/rpa*
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F: drivers/scsi/ibmvscsi/
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F: tools/testing/selftests/powerpc
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N: opal
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N: /pmac
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N: powermac
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@@ -7282,9 +7277,8 @@ F: arch/powerpc/platforms/83xx/
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F: arch/powerpc/platforms/85xx/
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LINUX FOR POWERPC PA SEMI PWRFICIENT
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M: Olof Johansson <olof@lixom.net>
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L: linuxppc-dev@lists.ozlabs.org
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S: Maintained
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S: Orphan
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F: arch/powerpc/platforms/pasemi/
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F: drivers/*/*pasemi*
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F: drivers/*/*/*pasemi*
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@@ -9019,15 +9013,13 @@ S: Maintained
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F: drivers/net/wireless/intersil/p54/
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PA SEMI ETHERNET DRIVER
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M: Olof Johansson <olof@lixom.net>
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L: netdev@vger.kernel.org
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S: Maintained
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S: Orphan
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F: drivers/net/ethernet/pasemi/*
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PA SEMI SMBUS DRIVER
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M: Olof Johansson <olof@lixom.net>
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L: linux-i2c@vger.kernel.org
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S: Maintained
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S: Orphan
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F: drivers/i2c/busses/i2c-pasemi.c
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PADATA PARALLEL EXECUTION MECHANISM
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@@ -318,12 +318,12 @@ mpc85xx_smp_defconfig:
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PHONY += corenet32_smp_defconfig
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corenet32_smp_defconfig:
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$(call merge_into_defconfig,corenet_basic_defconfig,\
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85xx-32bit 85xx-smp 85xx-hw fsl-emb-nonhw)
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85xx-32bit 85xx-smp 85xx-hw fsl-emb-nonhw dpaa)
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PHONY += corenet64_smp_defconfig
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corenet64_smp_defconfig:
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$(call merge_into_defconfig,corenet_basic_defconfig,\
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85xx-64bit 85xx-smp altivec 85xx-hw fsl-emb-nonhw)
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85xx-64bit 85xx-smp altivec 85xx-hw fsl-emb-nonhw dpaa)
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PHONY += mpc86xx_defconfig
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mpc86xx_defconfig:
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@@ -0,0 +1 @@
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CONFIG_FSL_DPAA=y
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@@ -43,6 +43,7 @@ extern int machine_check_e500mc(struct pt_regs *regs);
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extern int machine_check_e500(struct pt_regs *regs);
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extern int machine_check_e200(struct pt_regs *regs);
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extern int machine_check_47x(struct pt_regs *regs);
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int machine_check_8xx(struct pt_regs *regs);
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extern void cpu_down_flush_e500v2(void);
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extern void cpu_down_flush_e500mc(void);
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@@ -155,6 +155,8 @@ static inline unsigned long arch_local_irq_save(void)
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unsigned long flags = arch_local_save_flags();
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#ifdef CONFIG_BOOKE
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asm volatile("wrteei 0" : : : "memory");
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#elif defined(CONFIG_PPC_8xx)
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wrtspr(SPRN_EID);
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#else
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SET_MSR_EE(flags & ~MSR_EE);
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#endif
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@@ -165,6 +167,8 @@ static inline void arch_local_irq_disable(void)
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{
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#ifdef CONFIG_BOOKE
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asm volatile("wrteei 0" : : : "memory");
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#elif defined(CONFIG_PPC_8xx)
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wrtspr(SPRN_EID);
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#else
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arch_local_irq_save();
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#endif
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@@ -174,6 +178,8 @@ static inline void arch_local_irq_enable(void)
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{
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#ifdef CONFIG_BOOKE
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asm volatile("wrteei 1" : : : "memory");
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#elif defined(CONFIG_PPC_8xx)
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wrtspr(SPRN_EIE);
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#else
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unsigned long msr = mfmsr();
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SET_MSR_EE(msr | MSR_EE);
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@@ -152,6 +152,7 @@
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#define PPC_INST_LWSYNC 0x7c2004ac
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#define PPC_INST_SYNC 0x7c0004ac
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#define PPC_INST_SYNC_MASK 0xfc0007fe
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#define PPC_INST_ISYNC 0x4c00012c
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#define PPC_INST_LXVD2X 0x7c000698
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#define PPC_INST_MCRXR 0x7c000400
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#define PPC_INST_MCRXR_MASK 0xfc0007fe
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@@ -1250,6 +1250,8 @@ static inline void mtmsr_isync(unsigned long val)
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: "r" ((unsigned long)(v)) \
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: "memory")
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#endif
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#define wrtspr(rn) asm volatile("mtspr " __stringify(rn) ",0" : \
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: : "memory")
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extern unsigned long msr_check_and_set(unsigned long bits);
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extern bool strict_msr_control;
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@@ -25,6 +25,10 @@
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#define SPRN_MD_RAM0 825
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#define SPRN_MD_RAM1 826
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/* Special MSR manipulation registers */
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#define SPRN_EIE 80 /* External interrupt enable (EE=1, RI=1) */
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#define SPRN_EID 81 /* External interrupt disable (EE=0, RI=1) */
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/* Commands. Only the first few are available to the instruction cache.
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*/
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#define IDC_ENABLE 0x02000000 /* Cache enable */
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@@ -1248,6 +1248,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
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.mmu_features = MMU_FTR_TYPE_8xx,
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.icache_bsize = 16,
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.dcache_bsize = 16,
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.machine_check = machine_check_8xx,
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.platform = "ppc823",
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},
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#endif /* CONFIG_8xx */
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@@ -1377,7 +1377,7 @@ __end_interrupts:
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DEFINE_FIXED_SYMBOL(__end_interrupts)
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#ifdef CONFIG_PPC_970_NAP
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TRAMP_REAL_BEGIN(power4_fixup_nap)
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EXC_COMMON_BEGIN(power4_fixup_nap)
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andc r9,r9,r10
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std r9,TI_LOCAL_FLAGS(r11)
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ld r10,_LINK(r1) /* make idle task do the */
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@@ -226,7 +226,7 @@ i##n: \
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ret_from_except)
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/* System reset */
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EXCEPTION(0x100, Reset, unknown_exception, EXC_XFER_STD)
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EXCEPTION(0x100, Reset, system_reset_exception, EXC_XFER_STD)
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/* Machine check */
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. = 0x200
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@@ -321,7 +321,7 @@ SystemCall:
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#endif
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InstructionTLBMiss:
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#ifdef CONFIG_8xx_CPU6
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#if defined(CONFIG_8xx_CPU6) || defined(CONFIG_MODULES) || defined (CONFIG_DEBUG_PAGEALLOC)
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mtspr SPRN_SPRG_SCRATCH2, r3
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#endif
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EXCEPTION_PROLOG_0
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@@ -329,23 +329,20 @@ InstructionTLBMiss:
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/* If we are faulting a kernel address, we have to use the
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* kernel page tables.
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*/
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mfspr r10, SPRN_SRR0 /* Get effective address of fault */
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INVALIDATE_ADJACENT_PAGES_CPU15(r11, r10)
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#if defined(CONFIG_MODULES) || defined (CONFIG_DEBUG_PAGEALLOC)
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/* Only modules will cause ITLB Misses as we always
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* pin the first 8MB of kernel memory */
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mfspr r11, SPRN_SRR0 /* Get effective address of fault */
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INVALIDATE_ADJACENT_PAGES_CPU15(r10, r11)
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mfcr r10
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IS_KERNEL(r11, r11)
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mfcr r3
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IS_KERNEL(r11, r10)
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#endif
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mfspr r11, SPRN_M_TW /* Get level 1 table */
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#if defined(CONFIG_MODULES) || defined (CONFIG_DEBUG_PAGEALLOC)
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BRANCH_UNLESS_KERNEL(3f)
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lis r11, (swapper_pg_dir-PAGE_OFFSET)@ha
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3:
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mtcr r10
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mfspr r10, SPRN_SRR0 /* Get effective address of fault */
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#else
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mfspr r10, SPRN_SRR0 /* Get effective address of fault */
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INVALIDATE_ADJACENT_PAGES_CPU15(r11, r10)
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mfspr r11, SPRN_M_TW /* Get level 1 table base address */
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mtcr r3
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#endif
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/* Insert level 1 index */
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rlwimi r11, r10, 32 - ((PAGE_SHIFT - 2) << 1), (PAGE_SHIFT - 2) << 1, 29
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@@ -377,58 +374,39 @@ InstructionTLBMiss:
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MTSPR_CPU6(SPRN_MI_RPN, r10, r3) /* Update TLB entry */
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/* Restore registers */
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#ifdef CONFIG_8xx_CPU6
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#if defined(CONFIG_8xx_CPU6) || defined(CONFIG_MODULES) || defined (CONFIG_DEBUG_PAGEALLOC)
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mfspr r3, SPRN_SPRG_SCRATCH2
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#endif
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EXCEPTION_EPILOG_0
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rfi
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/*
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* Bottom part of DataStoreTLBMiss handler for IMMR area
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* not enough space in the DataStoreTLBMiss area
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*/
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DTLBMissIMMR:
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mtcr r10
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/* Set 512k byte guarded page and mark it valid */
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li r10, MD_PS512K | MD_GUARDED | MD_SVALID
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MTSPR_CPU6(SPRN_MD_TWC, r10, r11)
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mfspr r10, SPRN_IMMR /* Get current IMMR */
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rlwinm r10, r10, 0, 0xfff80000 /* Get 512 kbytes boundary */
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ori r10, r10, 0xf0 | MD_SPS16K | _PAGE_SHARED | _PAGE_DIRTY | \
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_PAGE_PRESENT | _PAGE_NO_CACHE
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MTSPR_CPU6(SPRN_MD_RPN, r10, r11) /* Update TLB entry */
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li r11, RPN_PATTERN
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mtspr SPRN_DAR, r11 /* Tag DAR */
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EXCEPTION_EPILOG_0
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rfi
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. = 0x1200
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DataStoreTLBMiss:
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mtspr SPRN_SPRG_SCRATCH2, r3
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EXCEPTION_PROLOG_0
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mfcr r10
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mfcr r3
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/* If we are faulting a kernel address, we have to use the
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* kernel page tables.
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*/
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mfspr r11, SPRN_MD_EPN
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rlwinm r11, r11, 16, 0xfff8
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mfspr r10, SPRN_MD_EPN
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rlwinm r10, r10, 16, 0xfff8
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cmpli cr0, r10, PAGE_OFFSET@h
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mfspr r11, SPRN_M_TW /* Get level 1 table */
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blt+ 3f
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#ifndef CONFIG_PIN_TLB_IMMR
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cmpli cr0, r11, VIRT_IMMR_BASE@h
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cmpli cr0, r10, VIRT_IMMR_BASE@h
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#endif
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cmpli cr7, r11, PAGE_OFFSET@h
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_ENTRY(DTLBMiss_cmp)
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cmpli cr7, r10, (PAGE_OFFSET + 0x1800000)@h
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lis r11, (swapper_pg_dir-PAGE_OFFSET)@ha
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#ifndef CONFIG_PIN_TLB_IMMR
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_ENTRY(DTLBMiss_jmp)
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beq- DTLBMissIMMR
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#endif
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bge- cr7, 4f
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mfspr r11, SPRN_M_TW /* Get level 1 table */
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blt cr7, DTLBMissLinear
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3:
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mtcr r10
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#ifdef CONFIG_8xx_CPU6
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mtspr SPRN_SPRG_SCRATCH2, r3
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#endif
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mtcr r3
|
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mfspr r10, SPRN_MD_EPN
|
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|
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/* Insert level 1 index */
|
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@@ -481,30 +459,7 @@ _ENTRY(DTLBMiss_jmp)
|
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MTSPR_CPU6(SPRN_MD_RPN, r10, r3) /* Update TLB entry */
|
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|
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/* Restore registers */
|
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#ifdef CONFIG_8xx_CPU6
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mfspr r3, SPRN_SPRG_SCRATCH2
|
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#endif
|
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mtspr SPRN_DAR, r11 /* Tag DAR */
|
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EXCEPTION_EPILOG_0
|
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rfi
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|
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4:
|
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_ENTRY(DTLBMiss_cmp)
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cmpli cr0, r11, (PAGE_OFFSET + 0x1800000)@h
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lis r11, (swapper_pg_dir-PAGE_OFFSET)@ha
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bge- 3b
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mtcr r10
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/* Set 8M byte page and mark it valid */
|
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li r10, MD_PS8MEG | MD_SVALID
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MTSPR_CPU6(SPRN_MD_TWC, r10, r11)
|
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mfspr r10, SPRN_MD_EPN
|
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rlwinm r10, r10, 0, 0x0f800000 /* 8xx supports max 256Mb RAM */
|
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ori r10, r10, 0xf0 | MD_SPS16K | _PAGE_SHARED | _PAGE_DIRTY | \
|
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_PAGE_PRESENT
|
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MTSPR_CPU6(SPRN_MD_RPN, r10, r11) /* Update TLB entry */
|
||||
|
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li r11, RPN_PATTERN
|
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mtspr SPRN_DAR, r11 /* Tag DAR */
|
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EXCEPTION_EPILOG_0
|
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rfi
|
||||
@@ -570,6 +525,43 @@ DARFixed:/* Return from dcbx instruction bug workaround */
|
||||
|
||||
. = 0x2000
|
||||
|
||||
/*
|
||||
* Bottom part of DataStoreTLBMiss handlers for IMMR area and linear RAM.
|
||||
* not enough space in the DataStoreTLBMiss area.
|
||||
*/
|
||||
DTLBMissIMMR:
|
||||
mtcr r3
|
||||
/* Set 512k byte guarded page and mark it valid */
|
||||
li r10, MD_PS512K | MD_GUARDED | MD_SVALID
|
||||
MTSPR_CPU6(SPRN_MD_TWC, r10, r11)
|
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mfspr r10, SPRN_IMMR /* Get current IMMR */
|
||||
rlwinm r10, r10, 0, 0xfff80000 /* Get 512 kbytes boundary */
|
||||
ori r10, r10, 0xf0 | MD_SPS16K | _PAGE_SHARED | _PAGE_DIRTY | \
|
||||
_PAGE_PRESENT | _PAGE_NO_CACHE
|
||||
MTSPR_CPU6(SPRN_MD_RPN, r10, r11) /* Update TLB entry */
|
||||
|
||||
li r11, RPN_PATTERN
|
||||
mtspr SPRN_DAR, r11 /* Tag DAR */
|
||||
mfspr r3, SPRN_SPRG_SCRATCH2
|
||||
EXCEPTION_EPILOG_0
|
||||
rfi
|
||||
|
||||
DTLBMissLinear:
|
||||
mtcr r3
|
||||
/* Set 8M byte page and mark it valid */
|
||||
li r11, MD_PS8MEG | MD_SVALID
|
||||
MTSPR_CPU6(SPRN_MD_TWC, r11, r3)
|
||||
rlwinm r10, r10, 16, 0x0f800000 /* 8xx supports max 256Mb RAM */
|
||||
ori r10, r10, 0xf0 | MD_SPS16K | _PAGE_SHARED | _PAGE_DIRTY | \
|
||||
_PAGE_PRESENT
|
||||
MTSPR_CPU6(SPRN_MD_RPN, r10, r11) /* Update TLB entry */
|
||||
|
||||
li r11, RPN_PATTERN
|
||||
mtspr SPRN_DAR, r11 /* Tag DAR */
|
||||
mfspr r3, SPRN_SPRG_SCRATCH2
|
||||
EXCEPTION_EPILOG_0
|
||||
rfi
|
||||
|
||||
/* This is the procedure to calculate the data EA for buggy dcbx,dcbi instructions
|
||||
* by decoding the registers used by the dcbx instruction and adding them.
|
||||
* DAR is set to the calculated address.
|
||||
@@ -586,7 +578,9 @@ FixupDAR:/* Entry point for dcbx workaround. */
|
||||
rlwinm r11, r10, 16, 0xfff8
|
||||
_ENTRY(FixupDAR_cmp)
|
||||
cmpli cr7, r11, (PAGE_OFFSET + 0x1800000)@h
|
||||
blt- cr7, 200f
|
||||
/* create physical page address from effective address */
|
||||
tophys(r11, r10)
|
||||
blt- cr7, 201f
|
||||
lis r11, (swapper_pg_dir-PAGE_OFFSET)@ha
|
||||
/* Insert level 1 index */
|
||||
3: rlwimi r11, r10, 32 - ((PAGE_SHIFT - 2) << 1), (PAGE_SHIFT - 2) << 1, 29
|
||||
@@ -616,10 +610,6 @@ _ENTRY(FixupDAR_cmp)
|
||||
141: mfspr r10,SPRN_SPRG_SCRATCH2
|
||||
b DARFixed /* Nope, go back to normal TLB processing */
|
||||
|
||||
/* create physical page address from effective address */
|
||||
200: tophys(r11, r10)
|
||||
b 201b
|
||||
|
||||
144: mfspr r10, SPRN_DSISR
|
||||
rlwinm r10, r10,0,7,5 /* Clear store bit for buggy dcbst insn */
|
||||
mtspr SPRN_DSISR, r10
|
||||
|
||||
@@ -131,15 +131,26 @@ void machine_shutdown(void)
|
||||
ppc_md.machine_shutdown();
|
||||
}
|
||||
|
||||
static void machine_hang(void)
|
||||
{
|
||||
pr_emerg("System Halted, OK to turn off power\n");
|
||||
local_irq_disable();
|
||||
while (1)
|
||||
;
|
||||
}
|
||||
|
||||
void machine_restart(char *cmd)
|
||||
{
|
||||
machine_shutdown();
|
||||
if (ppc_md.restart)
|
||||
ppc_md.restart(cmd);
|
||||
|
||||
smp_send_stop();
|
||||
printk(KERN_EMERG "System Halted, OK to turn off power\n");
|
||||
local_irq_disable();
|
||||
while (1) ;
|
||||
|
||||
do_kernel_restart(cmd);
|
||||
mdelay(1000);
|
||||
|
||||
machine_hang();
|
||||
}
|
||||
|
||||
void machine_power_off(void)
|
||||
@@ -147,10 +158,9 @@ void machine_power_off(void)
|
||||
machine_shutdown();
|
||||
if (pm_power_off)
|
||||
pm_power_off();
|
||||
|
||||
smp_send_stop();
|
||||
printk(KERN_EMERG "System Halted, OK to turn off power\n");
|
||||
local_irq_disable();
|
||||
while (1) ;
|
||||
machine_hang();
|
||||
}
|
||||
/* Used by the G5 thermal driver */
|
||||
EXPORT_SYMBOL_GPL(machine_power_off);
|
||||
@@ -163,10 +173,9 @@ void machine_halt(void)
|
||||
machine_shutdown();
|
||||
if (ppc_md.halt)
|
||||
ppc_md.halt();
|
||||
|
||||
smp_send_stop();
|
||||
printk(KERN_EMERG "System Halted, OK to turn off power\n");
|
||||
local_irq_disable();
|
||||
while (1) ;
|
||||
machine_hang();
|
||||
}
|
||||
|
||||
|
||||
|
||||
+29
-16
@@ -273,7 +273,6 @@ void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr)
|
||||
force_sig_info(signr, &info, current);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PPC64
|
||||
void system_reset_exception(struct pt_regs *regs)
|
||||
{
|
||||
/* See if any machine dependent calls */
|
||||
@@ -291,6 +290,7 @@ void system_reset_exception(struct pt_regs *regs)
|
||||
/* What should we do here? We could issue a shutdown or hard reset. */
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PPC64
|
||||
/*
|
||||
* This function is called in real mode. Strictly no printk's please.
|
||||
*
|
||||
@@ -352,12 +352,11 @@ static inline int check_io_access(struct pt_regs *regs)
|
||||
* For the debug message, we look at the preceding
|
||||
* load or store.
|
||||
*/
|
||||
if (*nip == 0x60000000) /* nop */
|
||||
if (*nip == PPC_INST_NOP)
|
||||
nip -= 2;
|
||||
else if (*nip == 0x4c00012c) /* isync */
|
||||
else if (*nip == PPC_INST_ISYNC)
|
||||
--nip;
|
||||
if (*nip == 0x7c0004ac || (*nip >> 26) == 3) {
|
||||
/* sync or twi */
|
||||
if (*nip == PPC_INST_SYNC || (*nip >> 26) == OP_TRAP) {
|
||||
unsigned int rb;
|
||||
|
||||
--nip;
|
||||
@@ -668,6 +667,31 @@ int machine_check_e200(struct pt_regs *regs)
|
||||
|
||||
return 0;
|
||||
}
|
||||
#elif defined(CONFIG_PPC_8xx)
|
||||
int machine_check_8xx(struct pt_regs *regs)
|
||||
{
|
||||
unsigned long reason = get_mc_reason(regs);
|
||||
|
||||
pr_err("Machine check in kernel mode.\n");
|
||||
pr_err("Caused by (from SRR1=%lx): ", reason);
|
||||
if (reason & 0x40000000)
|
||||
pr_err("Fetch error at address %lx\n", regs->nip);
|
||||
else
|
||||
pr_err("Data access error at address %lx\n", regs->dar);
|
||||
|
||||
#ifdef CONFIG_PCI
|
||||
/* the qspan pci read routines can cause machine checks -- Cort
|
||||
*
|
||||
* yuck !!! that totally needs to go away ! There are better ways
|
||||
* to deal with that than having a wart in the mcheck handler.
|
||||
* -- BenH
|
||||
*/
|
||||
bad_page_fault(regs, regs->dar, SIGBUS);
|
||||
return 1;
|
||||
#else
|
||||
return 0;
|
||||
#endif
|
||||
}
|
||||
#else
|
||||
int machine_check_generic(struct pt_regs *regs)
|
||||
{
|
||||
@@ -727,17 +751,6 @@ void machine_check_exception(struct pt_regs *regs)
|
||||
if (recover > 0)
|
||||
goto bail;
|
||||
|
||||
#if defined(CONFIG_8xx) && defined(CONFIG_PCI)
|
||||
/* the qspan pci read routines can cause machine checks -- Cort
|
||||
*
|
||||
* yuck !!! that totally needs to go away ! There are better ways
|
||||
* to deal with that than having a wart in the mcheck handler.
|
||||
* -- BenH
|
||||
*/
|
||||
bad_page_fault(regs, regs->dar, SIGBUS);
|
||||
goto bail;
|
||||
#endif
|
||||
|
||||
if (debugger_fault_handler(regs))
|
||||
goto bail;
|
||||
|
||||
|
||||
@@ -359,6 +359,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_UNALIGNED_LD_STD)
|
||||
addi r3,r3,8
|
||||
171:
|
||||
177:
|
||||
179:
|
||||
addi r3,r3,8
|
||||
370:
|
||||
372:
|
||||
@@ -373,7 +374,6 @@ END_FTR_SECTION_IFCLR(CPU_FTR_UNALIGNED_LD_STD)
|
||||
173:
|
||||
174:
|
||||
175:
|
||||
179:
|
||||
181:
|
||||
184:
|
||||
186:
|
||||
|
||||
@@ -529,7 +529,7 @@ static bool might_have_hea(void)
|
||||
*/
|
||||
#ifdef CONFIG_IBMEBUS
|
||||
return !cpu_has_feature(CPU_FTR_ARCH_207S) &&
|
||||
!firmware_has_feature(FW_FEATURE_SPLPAR);
|
||||
firmware_has_feature(FW_FEATURE_SPLPAR);
|
||||
#else
|
||||
return false;
|
||||
#endif
|
||||
|
||||
@@ -30,8 +30,8 @@ config EP8248E
|
||||
select 8272
|
||||
select 8260
|
||||
select FSL_SOC
|
||||
select PHYLIB
|
||||
select MDIO_BITBANG
|
||||
select PHYLIB if NETDEVICES
|
||||
select MDIO_BITBANG if PHYLIB
|
||||
help
|
||||
This enables support for the Embedded Planet EP8248E board.
|
||||
|
||||
|
||||
@@ -298,7 +298,9 @@ static const struct of_device_id of_bus_ids[] __initconst = {
|
||||
static int __init declare_of_platform_devices(void)
|
||||
{
|
||||
of_platform_bus_probe(NULL, of_bus_ids, NULL);
|
||||
platform_driver_register(&ep8248e_mdio_driver);
|
||||
|
||||
if (IS_ENABLED(CONFIG_MDIO_BITBANG))
|
||||
platform_driver_register(&ep8248e_mdio_driver);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -30,9 +30,7 @@
|
||||
*/
|
||||
static void __init asp834x_setup_arch(void)
|
||||
{
|
||||
if (ppc_md.progress)
|
||||
ppc_md.progress("asp834x_setup_arch()", 0);
|
||||
|
||||
mpc83xx_setup_arch();
|
||||
mpc834x_usb_cfg();
|
||||
}
|
||||
|
||||
|
||||
@@ -130,10 +130,7 @@ static void __init mpc83xx_km_setup_arch(void)
|
||||
struct device_node *np;
|
||||
#endif
|
||||
|
||||
if (ppc_md.progress)
|
||||
ppc_md.progress("kmpbec83xx_setup_arch()", 0);
|
||||
|
||||
mpc83xx_setup_pci();
|
||||
mpc83xx_setup_arch();
|
||||
|
||||
#ifdef CONFIG_QUICC_ENGINE
|
||||
np = of_find_node_by_name(NULL, "par_io");
|
||||
|
||||
@@ -142,3 +142,11 @@ void __init mpc83xx_setup_pci(void)
|
||||
mpc83xx_add_bridge(np);
|
||||
}
|
||||
#endif
|
||||
|
||||
void __init mpc83xx_setup_arch(void)
|
||||
{
|
||||
if (ppc_md.progress)
|
||||
ppc_md.progress("mpc83xx_setup_arch()", 0);
|
||||
|
||||
mpc83xx_setup_pci();
|
||||
}
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user