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Merge branch 'master' into upstream

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This commit is contained in:
Jeff Garzik
2006-06-08 15:24:46 -04:00
parent b53471711f 1def630a6a
commit d15a88fc21
171 changed files with 1323 additions and 794 deletions
Download Patch File Download Diff File Expand all files Collapse all files
Documentation/serial/driver
+5 -4
View File
@@ -214,12 +214,13 @@ hardware.
The interaction of the iflag bits is as follows (parity error
given as an example):
Parity error INPCK IGNPAR
None n/a n/a character received
Yes n/a 0 character discarded
Yes 0 1 character received, marked as
n/a 0 n/a character received, marked as
TTY_NORMAL
Yes 1 1 character received, marked as
None 1 n/a character received, marked as
TTY_NORMAL
Yes 1 0 character received, marked as
TTY_PARITY
Yes 1 1 character discarded
Other flags may be used (eg, xon/xoff characters) if your
hardware supports hardware "soft" flow control.
MAINTAINERS
+17
View File
@@ -568,6 +568,18 @@ L: linuxppc-dev@ozlabs.org
W: http://www.penguinppc.org/ppc64/
S: Supported
BROADCOM BNX2 GIGABIT ETHERNET DRIVER
P: Michael Chan
M: mchan@broadcom.com
L: netdev@vger.kernel.org
S: Supported
BROADCOM TG3 GIGABIT ETHERNET DRIVER
P: Michael Chan
M: mchan@broadcom.com
L: netdev@vger.kernel.org
S: Supported
BTTV VIDEO4LINUX DRIVER
P: Mauro Carvalho Chehab
M: mchehab@infradead.org
@@ -1883,6 +1895,11 @@ L: linux-kernel@vger.kernel.org
W: http://www.atnf.csiro.au/~rgooch/linux/kernel-patches.html
S: Maintained
MULTIMEDIA CARD SUBSYSTEM
P: Russell King
M: rmk+mmc@arm.linux.org.uk
S: Maintained
MULTISOUND SOUND DRIVER
P: Andrew Veliath
M: andrewtv@usa.net
Makefile
+2 -2
View File
@@ -1,8 +1,8 @@
VERSION = 2
PATCHLEVEL = 6
SUBLEVEL = 17
EXTRAVERSION =-rc5
NAME=Lordi Rules
EXTRAVERSION =-rc6
NAME=Crazed Snow-Weasel
# *DOCUMENTATION*
# To see a list of typical targets execute "make help"
arch/alpha/kernel/alpha_ksyms.c
-1
View File
@@ -182,7 +182,6 @@ EXPORT_SYMBOL(smp_num_cpus);
EXPORT_SYMBOL(smp_call_function);
EXPORT_SYMBOL(smp_call_function_on_cpu);
EXPORT_SYMBOL(_atomic_dec_and_lock);
EXPORT_SYMBOL(cpu_present_mask);
#endif /* CONFIG_SMP */
/*
arch/alpha/kernel/process.c
+3 -3
View File
@@ -94,7 +94,7 @@ common_shutdown_1(void *generic_ptr)
if (cpuid != boot_cpuid) {
flags |= 0x00040000UL; /* "remain halted" */
*pflags = flags;
clear_bit(cpuid, &cpu_present_mask);
cpu_clear(cpuid, cpu_present_map);
halt();
}
#endif
@@ -120,8 +120,8 @@ common_shutdown_1(void *generic_ptr)
#ifdef CONFIG_SMP
/* Wait for the secondaries to halt. */
cpu_clear(boot_cpuid, cpu_possible_map);
while (cpus_weight(cpu_possible_map))
cpu_clear(boot_cpuid, cpu_present_map);
while (cpus_weight(cpu_present_map))
barrier();
#endif
arch/alpha/kernel/smp.c
+4 -10
View File
@@ -68,7 +68,6 @@ enum ipi_message_type {
static int smp_secondary_alive __initdata = 0;
/* Which cpus ids came online. */
cpumask_t cpu_present_mask;
cpumask_t cpu_online_map;
EXPORT_SYMBOL(cpu_online_map);
@@ -439,7 +438,7 @@ setup_smp(void)
if ((cpu->flags & 0x1cc) == 0x1cc) {
smp_num_probed++;
/* Assume here that "whami" == index */
cpu_set(i, cpu_present_mask);
cpu_set(i, cpu_present_map);
cpu->pal_revision = boot_cpu_palrev;
}
@@ -450,11 +449,10 @@ setup_smp(void)
}
} else {
smp_num_probed = 1;
cpu_set(boot_cpuid, cpu_present_mask);
}
printk(KERN_INFO "SMP: %d CPUs probed -- cpu_present_mask = %lx\n",
smp_num_probed, cpu_possible_map.bits[0]);
printk(KERN_INFO "SMP: %d CPUs probed -- cpu_present_map = %lx\n",
smp_num_probed, cpu_present_map.bits[0]);
}
/*
@@ -473,7 +471,7 @@ smp_prepare_cpus(unsigned int max_cpus)
/* Nothing to do on a UP box, or when told not to. */
if (smp_num_probed == 1 || max_cpus == 0) {
cpu_present_mask = cpumask_of_cpu(boot_cpuid);
cpu_present_map = cpumask_of_cpu(boot_cpuid);
printk(KERN_INFO "SMP mode deactivated.\n");
return;
}
@@ -486,10 +484,6 @@ smp_prepare_cpus(unsigned int max_cpus)
void __devinit
smp_prepare_boot_cpu(void)
{
/*
* Mark the boot cpu (current cpu) as online
*/
cpu_set(smp_processor_id(), cpu_online_map);
}
int __devinit
arch/alpha/kernel/sys_titan.c
+1 -1
View File
@@ -66,7 +66,7 @@ titan_update_irq_hw(unsigned long mask)
register int bcpu = boot_cpuid;
#ifdef CONFIG_SMP
cpumask_t cpm = cpu_present_mask;
cpumask_t cpm = cpu_present_map;
volatile unsigned long *dim0, *dim1, *dim2, *dim3;
unsigned long mask0, mask1, mask2, mask3, dummy;
arch/arm/Kconfig.debug
+1 -1
View File
@@ -101,7 +101,7 @@ config DEBUG_S3C2410_UART
help
Choice for UART for kernel low-level using S3C2410 UARTS,
should be between zero and two. The port must have been
initalised by the boot-loader before use.
initialised by the boot-loader before use.
The uncompressor code port configuration is now handled
by CONFIG_S3C2410_LOWLEVEL_UART_PORT.
arch/arm/mach-ixp23xx/core.c
+15 -3
View File
@@ -178,8 +178,12 @@ static int ixp23xx_irq_set_type(unsigned int irq, unsigned int type)
static void ixp23xx_irq_mask(unsigned int irq)
{
volatile unsigned long *intr_reg = IXP23XX_INTR_EN1 + (irq / 32);
volatile unsigned long *intr_reg;
if (irq >= 56)
irq += 8;
intr_reg = IXP23XX_INTR_EN1 + (irq / 32);
*intr_reg &= ~(1 << (irq % 32));
}
@@ -199,17 +203,25 @@ static void ixp23xx_irq_ack(unsigned int irq)
*/
static void ixp23xx_irq_level_unmask(unsigned int irq)
{
volatile unsigned long *intr_reg = IXP23XX_INTR_EN1 + (irq / 32);
volatile unsigned long *intr_reg;
ixp23xx_irq_ack(irq);
if (irq >= 56)
irq += 8;
intr_reg = IXP23XX_INTR_EN1 + (irq / 32);
*intr_reg |= (1 << (irq % 32));
}
static void ixp23xx_irq_edge_unmask(unsigned int irq)
{
volatile unsigned long *intr_reg = IXP23XX_INTR_EN1 + (irq / 32);
volatile unsigned long *intr_reg;
if (irq >= 56)
irq += 8;
intr_reg = IXP23XX_INTR_EN1 + (irq / 32);
*intr_reg |= (1 << (irq % 32));
}
arch/arm/mach-ixp4xx/Kconfig
+1 -1
View File
@@ -141,7 +141,7 @@ config IXP4XX_INDIRECT_PCI
2) If > 64MB of memory space is required, the IXP4xx can be
configured to use indirect registers to access PCI This allows
for up to 128MB (0x48000000 to 0x4fffffff) of memory on the bus.
The disadvantadge of this is that every PCI access requires
The disadvantage of this is that every PCI access requires
three local register accesses plus a spinlock, but in some
cases the performance hit is acceptable. In addition, you cannot
mmap() PCI devices in this case due to the indirect nature
arch/arm/mach-pxa/mainstone.c
+1
View File
@@ -493,6 +493,7 @@ static void __init mainstone_map_io(void)
MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)")
/* Maintainer: MontaVista Software Inc. */
.phys_io = 0x40000000,
.boot_params = 0xa0000100, /* BLOB boot parameter setting */
.io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
.map_io = mainstone_map_io,
.init_irq = mainstone_init_irq,
arch/arm/mach-s3c2410/Kconfig
+1 -1
View File
@@ -170,7 +170,7 @@ config S3C2410_PM_DEBUG
depends on ARCH_S3C2410 && PM
help
Say Y here if you want verbose debugging from the PM Suspend and
Resume code. See `Documentation/arm/Samsing-S3C24XX/Suspend.txt`
Resume code. See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
for more information.
config S3C2410_PM_CHECK
arch/arm/mm/mm-armv.c
+2 -2
View File
@@ -376,7 +376,7 @@ void __init build_mem_type_table(void)
ecc_mask = 0;
}
if (cpu_arch <= CPU_ARCH_ARMv5TEJ) {
if (cpu_arch <= CPU_ARCH_ARMv5TEJ && !cpu_is_xscale()) {
for (i = 0; i < ARRAY_SIZE(mem_types); i++) {
if (mem_types[i].prot_l1)
mem_types[i].prot_l1 |= PMD_BIT4;
@@ -631,7 +631,7 @@ void setup_mm_for_reboot(char mode)
pgd = init_mm.pgd;
base_pmdval = PMD_SECT_AP_WRITE | PMD_SECT_AP_READ | PMD_TYPE_SECT;
if (cpu_architecture() <= CPU_ARCH_ARMv5TEJ)
if (cpu_architecture() <= CPU_ARCH_ARMv5TEJ && !cpu_is_xscale())
base_pmdval |= PMD_BIT4;
for (i = 0; i < FIRST_USER_PGD_NR + USER_PTRS_PER_PGD; i++, pgd++) {
arch/arm/mm/proc-xsc3.S
+2 -1
View File
@@ -427,12 +427,13 @@ __xsc3_setup:
#endif
mcr p15, 0, r0, c1, c0, 1 @ set auxiliary control reg
mrc p15, 0, r0, c1, c0, 0 @ get control register
bic r0, r0, #0x0200 @ .... ..R. .... ....
bic r0, r0, #0x0002 @ .... .... .... ..A.
orr r0, r0, #0x0005 @ .... .... .... .C.M
#if BTB_ENABLE
bic r0, r0, #0x0200 @ .... ..R. .... ....
orr r0, r0, #0x3900 @ ..VI Z..S .... ....
#else
bic r0, r0, #0x0a00 @ .... Z.R. .... ....
orr r0, r0, #0x3100 @ ..VI ...S .... ....
#endif
#if L2_CACHE_ENABLE
arch/i386/kernel/acpi/boot.c
-8
View File
@@ -1066,14 +1066,6 @@ static struct dmi_system_id __initdata acpi_dmi_table[] = {
DMI_MATCH(DMI_PRODUCT_NAME, "TravelMate 360"),
},
},
{
.callback = disable_acpi_pci,
.ident = "HP xw9300",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
DMI_MATCH(DMI_PRODUCT_NAME, "HP xw9300 Workstation"),
},
},
{}
};
arch/i386/mach-generic/probe.c
+10 -6
View File
@@ -93,9 +93,11 @@ int __init mps_oem_check(struct mp_config_table *mpc, char *oem, char *productid
int i;
for (i = 0; apic_probe[i]; ++i) {
if (apic_probe[i]->mps_oem_check(mpc,oem,productid)) {
genapic = apic_probe[i];
printk(KERN_INFO "Switched to APIC driver `%s'.\n",
genapic->name);
if (!cmdline_apic) {
genapic = apic_probe[i];
printk(KERN_INFO "Switched to APIC driver `%s'.\n",
genapic->name);
}
return 1;
}
}
@@ -107,9 +109,11 @@ int __init acpi_madt_oem_check(char *oem_id, char *oem_table_id)
int i;
for (i = 0; apic_probe[i]; ++i) {
if (apic_probe[i]->acpi_madt_oem_check(oem_id, oem_table_id)) {
genapic = apic_probe[i];
printk(KERN_INFO "Switched to APIC driver `%s'.\n",
genapic->name);
if (!cmdline_apic) {
genapic = apic_probe[i];
printk(KERN_INFO "Switched to APIC driver `%s'.\n",
genapic->name);
}
return 1;
}
}
arch/mips/Kconfig
+47 -49
View File
@@ -13,7 +13,7 @@ choice
default SGI_IP22
config MIPS_MTX1
bool "Support for 4G Systems MTX-1 board"
bool "4G Systems MTX-1 board"
select DMA_NONCOHERENT
select HW_HAS_PCI
select SOC_AU1500
@@ -120,7 +120,7 @@ config MIPS_MIRAGE
select SYS_SUPPORTS_LITTLE_ENDIAN
config MIPS_COBALT
bool "Support for Cobalt Server"
bool "Cobalt Server"
select DMA_NONCOHERENT
select HW_HAS_PCI
select I8259
@@ -132,7 +132,7 @@ config MIPS_COBALT
select SYS_SUPPORTS_LITTLE_ENDIAN
config MACH_DECSTATION
bool "Support for DECstations"
bool "DECstations"
select BOOT_ELF32
select DMA_NONCOHERENT
select EARLY_PRINTK
@@ -158,7 +158,7 @@ config MACH_DECSTATION
otherwise choose R3000.
config MIPS_EV64120
bool "Support for Galileo EV64120 Evaluation board (EXPERIMENTAL)"
bool "Galileo EV64120 Evaluation board (EXPERIMENTAL)"
depends on EXPERIMENTAL
select DMA_NONCOHERENT
select HW_HAS_PCI
@@ -175,7 +175,7 @@ config MIPS_EV64120
kernel for this platform.
config MIPS_EV96100
bool "Support for Galileo EV96100 Evaluation board (EXPERIMENTAL)"
bool "Galileo EV96100 Evaluation board (EXPERIMENTAL)"
depends on EXPERIMENTAL
select DMA_NONCOHERENT
select HW_HAS_PCI
@@ -195,7 +195,7 @@ config MIPS_EV96100
here if you wish to build a kernel for this platform.
config MIPS_IVR
bool "Support for Globespan IVR board"
bool "Globespan IVR board"
select DMA_NONCOHERENT
select HW_HAS_PCI
select ITE_BOARD_GEN
@@ -211,7 +211,7 @@ config MIPS_IVR
build a kernel for this platform.
config MIPS_ITE8172
bool "Support for ITE 8172G board"
bool "ITE 8172G board"
select DMA_NONCOHERENT
select HW_HAS_PCI
select ITE_BOARD_GEN
@@ -228,7 +228,7 @@ config MIPS_ITE8172
a kernel for this platform.
config MACH_JAZZ
bool "Support for the Jazz family of machines"
bool "Jazz family of machines"
select ARC
select ARC32
select ARCH_MAY_HAVE_PC_FDC
@@ -246,7 +246,7 @@ config MACH_JAZZ
Olivetti M700-10 workstations.
config LASAT
bool "Support for LASAT Networks platforms"
bool "LASAT Networks platforms"
select DMA_NONCOHERENT
select HW_HAS_PCI
select MIPS_GT64120
@@ -258,7 +258,7 @@ config LASAT
select SYS_SUPPORTS_LITTLE_ENDIAN
config MIPS_ATLAS
bool "Support for MIPS Atlas board"
bool "MIPS Atlas board"
select BOOT_ELF32
select DMA_NONCOHERENT
select IRQ_CPU
@@ -283,7 +283,7 @@ config MIPS_ATLAS
board.
config MIPS_MALTA
bool "Support for MIPS Malta board"
bool "MIPS Malta board"
select ARCH_MAY_HAVE_PC_FDC
select BOOT_ELF32
select HAVE_STD_PC_SERIAL_PORT
@@ -311,7 +311,7 @@ config MIPS_MALTA
board.
config MIPS_SEAD
bool "Support for MIPS SEAD board (EXPERIMENTAL)"
bool "MIPS SEAD board (EXPERIMENTAL)"
depends on EXPERIMENTAL
select IRQ_CPU
select DMA_NONCOHERENT
@@ -328,7 +328,7 @@ config MIPS_SEAD
board.
config MIPS_SIM
bool 'Support for MIPS simulator (MIPSsim)'
bool 'MIPS simulator (MIPSsim)'
select DMA_NONCOHERENT
select IRQ_CPU
select SYS_HAS_CPU_MIPS32_R1
@@ -341,7 +341,7 @@ config MIPS_SIM
emulator.
config MOMENCO_JAGUAR_ATX
bool "Support for Momentum Jaguar board"
bool "Momentum Jaguar board"
select BOOT_ELF32
select DMA_NONCOHERENT
select HW_HAS_PCI
@@ -361,7 +361,7 @@ config MOMENCO_JAGUAR_ATX
Momentum Computer <http://www.momenco.com/>.
config MOMENCO_OCELOT
bool "Support for Momentum Ocelot board"
bool "Momentum Ocelot board"
select DMA_NONCOHERENT
select HW_HAS_PCI
select IRQ_CPU
@@ -378,7 +378,7 @@ config MOMENCO_OCELOT
Momentum Computer <http://www.momenco.com/>.
config MOMENCO_OCELOT_3
bool "Support for Momentum Ocelot-3 board"
bool "Momentum Ocelot-3 board"
select BOOT_ELF32
select DMA_NONCOHERENT
select HW_HAS_PCI
@@ -397,7 +397,7 @@ config MOMENCO_OCELOT_3
PMC-Sierra Rm79000 core.
config MOMENCO_OCELOT_C
bool "Support for Momentum Ocelot-C board"
bool "Momentum Ocelot-C board"
select DMA_NONCOHERENT
select HW_HAS_PCI
select IRQ_CPU
@@ -414,7 +414,7 @@ config MOMENCO_OCELOT_C
Momentum Computer <http://www.momenco.com/>.
config MOMENCO_OCELOT_G
bool "Support for Momentum Ocelot-G board"
bool "Momentum Ocelot-G board"
select DMA_NONCOHERENT
select HW_HAS_PCI
select IRQ_CPU
@@ -431,23 +431,23 @@ config MOMENCO_OCELOT_G
Momentum Computer <http://www.momenco.com/>.
config MIPS_XXS1500
bool "Support for MyCable XXS1500 board"
bool "MyCable XXS1500 board"
select DMA_NONCOHERENT
select SOC_AU1500
select SYS_SUPPORTS_LITTLE_ENDIAN
config PNX8550_V2PCI
bool "Support for Philips PNX8550 based Viper2-PCI board"
bool "Philips PNX8550 based Viper2-PCI board"
select PNX8550
select SYS_SUPPORTS_LITTLE_ENDIAN
config PNX8550_JBS
bool "Support for Philips PNX8550 based JBS board"
bool "Philips PNX8550 based JBS board"
select PNX8550
select SYS_SUPPORTS_LITTLE_ENDIAN
config DDB5074
bool "Support for NEC DDB Vrc-5074 (EXPERIMENTAL)"
bool "NEC DDB Vrc-5074 (EXPERIMENTAL)"
depends on EXPERIMENTAL
select DDB5XXX_COMMON
select DMA_NONCOHERENT
@@ -465,7 +465,7 @@ config DDB5074
evaluation board.
config DDB5476
bool "Support for NEC DDB Vrc-5476"
bool "NEC DDB Vrc-5476"
select DDB5XXX_COMMON
select DMA_NONCOHERENT
select HAVE_STD_PC_SERIAL_PORT
@@ -486,7 +486,7 @@ config DDB5476
IDE controller, PS2 keyboard, PS2 mouse, etc.
config DDB5477
bool "Support for NEC DDB Vrc-5477"
bool "NEC DDB Vrc-5477"
select DDB5XXX_COMMON
select DMA_NONCOHERENT
select HW_HAS_PCI
@@ -504,13 +504,13 @@ config DDB5477
ether port USB, AC97, PCI, etc.
config MACH_VR41XX
bool "Support for NEC VR4100 series based machines"
bool "NEC VR41XX-based machines"
select SYS_HAS_CPU_VR41XX
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
config PMC_YOSEMITE
bool "Support for PMC-Sierra Yosemite eval board"
bool "PMC-Sierra Yosemite eval board"
select DMA_COHERENT
select HW_HAS_PCI
select IRQ_CPU
@@ -527,7 +527,7 @@ config PMC_YOSEMITE
manufactured by PMC-Sierra.
config QEMU
bool "Support for Qemu"
bool "Qemu"
select DMA_COHERENT
select GENERIC_ISA_DMA
select HAVE_STD_PC_SERIAL_PORT
@@ -547,7 +547,7 @@ config QEMU
can be found at http://www.linux-mips.org/wiki/Qemu.
config SGI_IP22
bool "Support for SGI IP22 (Indy/Indigo2)"
bool "SGI IP22 (Indy/Indigo2)"
select ARC
select ARC32
select BOOT_ELF32
@@ -567,7 +567,7 @@ config SGI_IP22
that runs on these, say Y here.
config SGI_IP27
bool "Support for SGI IP27 (Origin200/2000)"
bool "SGI IP27 (Origin200/2000)"
select ARC
select ARC64
select BOOT_ELF64
@@ -583,7 +583,7 @@ config SGI_IP27
here.
config SGI_IP32
bool "Support for SGI IP32 (O2) (EXPERIMENTAL)"
bool "SGI IP32 (O2) (EXPERIMENTAL)"
depends on EXPERIMENTAL
select ARC
select ARC32
@@ -604,7 +604,7 @@ config SGI_IP32
If you want this kernel to run on SGI O2 workstation, say Y here.
config SIBYTE_BIGSUR
bool "Support for Sibyte BCM91480B-BigSur"
bool "Sibyte BCM91480B-BigSur"
select BOOT_ELF32
select DMA_COHERENT
select PCI_DOMAINS
@@ -615,7 +615,7 @@ config SIBYTE_BIGSUR
select SYS_SUPPORTS_LITTLE_ENDIAN
config SIBYTE_SWARM
bool "Support for Sibyte BCM91250A-SWARM"
bool "Sibyte BCM91250A-SWARM"
select BOOT_ELF32
select DMA_COHERENT
select SIBYTE_SB1250
@@ -626,7 +626,7 @@ config SIBYTE_SWARM
select SYS_SUPPORTS_LITTLE_ENDIAN
config SIBYTE_SENTOSA
bool "Support for Sibyte BCM91250E-Sentosa"
bool "Sibyte BCM91250E-Sentosa"
depends on EXPERIMENTAL
select BOOT_ELF32
select DMA_COHERENT
@@ -637,7 +637,7 @@ config SIBYTE_SENTOSA
select SYS_SUPPORTS_LITTLE_ENDIAN
config SIBYTE_RHONE
bool "Support for Sibyte BCM91125E-Rhone"
bool "Sibyte BCM91125E-Rhone"
depends on EXPERIMENTAL
select BOOT_ELF32
select DMA_COHERENT
@@ -648,7 +648,7 @@ config SIBYTE_RHONE
select SYS_SUPPORTS_LITTLE_ENDIAN
config SIBYTE_CARMEL
bool "Support for Sibyte BCM91120x-Carmel"
bool "Sibyte BCM91120x-Carmel"
depends on EXPERIMENTAL
select BOOT_ELF32
select DMA_COHERENT
@@ -659,7 +659,7 @@ config SIBYTE_CARMEL
select SYS_SUPPORTS_LITTLE_ENDIAN
config SIBYTE_PTSWARM
bool "Support for Sibyte BCM91250PT-PTSWARM"
bool "Sibyte BCM91250PT-PTSWARM"
depends on EXPERIMENTAL
select BOOT_ELF32
select DMA_COHERENT
@@ -671,7 +671,7 @@ config SIBYTE_PTSWARM
select SYS_SUPPORTS_LITTLE_ENDIAN
config SIBYTE_LITTLESUR
bool "Support for Sibyte BCM91250C2-LittleSur"
bool "Sibyte BCM91250C2-LittleSur"
depends on EXPERIMENTAL
select BOOT_ELF32
select DMA_COHERENT
@@ -683,7 +683,7 @@ config SIBYTE_LITTLESUR
select SYS_SUPPORTS_LITTLE_ENDIAN
config SIBYTE_CRHINE
bool "Support for Sibyte BCM91120C-CRhine"
bool "Sibyte BCM91120C-CRhine"
depends on EXPERIMENTAL
select BOOT_ELF32
select DMA_COHERENT
@@ -694,7 +694,7 @@ config SIBYTE_CRHINE
select SYS_SUPPORTS_LITTLE_ENDIAN
config SIBYTE_CRHONE
bool "Support for Sibyte BCM91125C-CRhone"
bool "Sibyte BCM91125C-CRhone"
depends on EXPERIMENTAL
select BOOT_ELF32
select DMA_COHERENT
@@ -706,7 +706,7 @@ config SIBYTE_CRHONE
select SYS_SUPPORTS_LITTLE_ENDIAN
config SNI_RM200_PCI
bool "Support for SNI RM200 PCI"
bool "SNI RM200 PCI"
select ARC
select ARC32
select ARCH_MAY_HAVE_PC_FDC
@@ -732,7 +732,7 @@ config SNI_RM200_PCI
support this machine type.
config TOSHIBA_JMR3927
bool "Support for Toshiba JMR-TX3927 board"
bool "Toshiba JMR-TX3927 board"
select DMA_NONCOHERENT
select HW_HAS_PCI
select MIPS_TX3927
@@ -743,7 +743,7 @@ config TOSHIBA_JMR3927
select TOSHIBA_BOARDS
config TOSHIBA_RBTX4927
bool "Support for Toshiba TBTX49[23]7 board"
bool "Toshiba TBTX49[23]7 board"
select DMA_NONCOHERENT
select HAS_TXX9_SERIAL
select HW_HAS_PCI
@@ -760,7 +760,7 @@ config TOSHIBA_RBTX4927
support this machine type
config TOSHIBA_RBTX4938
bool "Support for Toshiba RBTX4938 board"
bool "Toshiba RBTX4938 board"
select HAVE_STD_PC_SERIAL_PORT
select DMA_NONCOHERENT
select GENERIC_ISA_DMA
@@ -1411,13 +1411,12 @@ config PAGE_SIZE_8KB
config PAGE_SIZE_16KB
bool "16kB"
depends on EXPERIMENTAL && !CPU_R3000 && !CPU_TX39XX
depends on !CPU_R3000 && !CPU_TX39XX
help
Using 16kB page size will result in higher performance kernel at
the price of higher memory consumption. This option is available on
all non-R3000 family processor. Not that at the time of this
writing this option is still high experimental; there are also
issues with compatibility of user applications.
all non-R3000 family processors. Note that you will need a suitable
Linux distribution to support this.
config PAGE_SIZE_64KB
bool "64kB"
@@ -1426,8 +1425,7 @@ config PAGE_SIZE_64KB
Using 64kB page size will result in higher performance kernel at
the price of higher memory consumption. This option is available on
all non-R3000 family processor. Not that at the time of this
writing this option is still high experimental; there are also
issues with compatibility of user applications.
writing this option is still high experimental.
endchoice
arch/mips/au1000/common/irq.c
+1
View File
@@ -68,6 +68,7 @@
extern void set_debug_traps(void);
extern irq_cpustat_t irq_stat [NR_CPUS];
extern void mips_timer_interrupt(struct pt_regs *regs);
static void setup_local_irq(unsigned int irq, int type, int int_req);
static unsigned int startup_irq(unsigned int irq);
arch/mips/au1000/common/prom.c
+9 -15
View File
@@ -1,10 +1,9 @@
/*
*
* BRIEF MODULE DESCRIPTION
* PROM library initialisation code, assuming a version of
* pmon is the boot code.
* PROM library initialisation code, assuming YAMON is the boot loader.
*
* Copyright 2000,2001 MontaVista Software Inc.
* Copyright 2000, 2001, 2006 MontaVista Software Inc.
* Author: MontaVista Software, Inc.
* ppopov@mvista.com or source@mvista.com
*
@@ -49,9 +48,9 @@ extern char **prom_argv, **prom_envp;
typedef struct
{
char *name;
/* char *val; */
}t_env_var;
char *name;
char *val;
} t_env_var;
char * prom_getcmdline(void)
@@ -85,21 +84,16 @@ char *prom_getenv(char *envname)
{
/*
* Return a pointer to the given environment variable.
* Environment variables are stored in the form of "memsize=64".
*/
t_env_var *env = (t_env_var *)prom_envp;
int i;
i = strlen(envname);
while(env->name) {
if(strncmp(envname, env->name, i) == 0) {
return(env->name + strlen(envname) + 1);
}
while (env->name) {
if (strcmp(envname, env->name) == 0)
return env->val;
env++;
}
return(NULL);
return NULL;
}
inline unsigned char str2hexnum(unsigned char c)
arch/mips/au1000/common/sleeper.S
+5
View File
@@ -112,6 +112,11 @@ sdsleep:
mtc0 k0, CP0_PAGEMASK
lw k0, 0x14(sp)
mtc0 k0, CP0_CONFIG
/* We need to catch the ealry Alchemy SOCs with
* the write-only Config[OD] bit and set it back to one...
*/
jal au1x00_fixup_config_od
lw $1, PT_R1(sp)
lw $2, PT_R2(sp)
lw $3, PT_R3(sp)

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