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[PATCH] pciehp: remove redundant data structures
State information is currently stored in per-slot as well as per-pci-function data structures in pciehp. There's a lot of overlap in the information kept, and some of it is never used. This patch consolidates the state information to per-slot and eliminates unused data structures. The biggest change is to eliminate the pci_func structure and the code around managing its lists. Signed-off-by: Rajesh Shah <rajesh.shah@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
rajesh.shah@intel.com
committed by
Greg Kroah-Hartman
Greg Kroah-Hartman
parent
a8a2be9492
commit
ca22a5e4d7
@@ -56,25 +56,11 @@ struct hotplug_params {
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u8 enable_perr;
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};
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struct pci_func {
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struct pci_func *next;
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u8 bus;
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u8 device;
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u8 function;
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u8 is_a_board;
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u16 status;
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u8 configured;
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u8 switch_save;
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u8 presence_save;
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u16 reserved2;
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u32 config_space[0x20];
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struct pci_dev* pci_dev;
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};
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struct slot {
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struct slot *next;
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u8 bus;
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u8 device;
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u16 status;
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u32 number;
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u8 is_a_board;
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u8 configured;
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@@ -177,9 +163,6 @@ struct controller {
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* error Messages
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*/
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#define msg_initialization_err "Initialization failure, error=%d\n"
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#define msg_HPC_rev_error "Unsupported revision of the PCI hot plug controller found.\n"
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#define msg_HPC_non_pcie "The PCI hot plug controller is not supported by this driver.\n"
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#define msg_HPC_not_supported "This system is not supported by this version of pciephd module. Upgrade to a newer version of pciehpd\n"
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#define msg_button_on "PCI slot #%d - powering on due to button press.\n"
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#define msg_button_off "PCI slot #%d - powering off due to button press.\n"
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#define msg_button_cancel "PCI slot #%d - action canceled due to button press.\n"
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@@ -188,8 +171,6 @@ struct controller {
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/* controller functions */
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extern int pciehp_event_start_thread (void);
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extern void pciehp_event_stop_thread (void);
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extern struct pci_func *pciehp_slot_create (unsigned char busnumber);
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extern struct pci_func *pciehp_slot_find (unsigned char bus, unsigned char device, unsigned char index);
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extern int pciehp_enable_slot (struct slot *slot);
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extern int pciehp_disable_slot (struct slot *slot);
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@@ -200,12 +181,8 @@ extern u8 pciehp_handle_power_fault (u8 hp_slot, void *inst_id);
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/* extern void long_delay (int delay); */
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/* pci functions */
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extern int pciehp_set_irq (u8 bus_num, u8 dev_num, u8 int_pin, u8 irq_num);
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/*extern int pciehp_get_bus_dev (struct controller *ctrl, u8 *bus_num, u8 *dev_num, struct slot *slot);*/
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extern int pciehp_save_config (struct controller *ctrl, int busnumber, int num_ctlr_slots, int first_device_num);
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extern int pciehp_save_slot_config (struct controller *ctrl, struct pci_func * new_slot);
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extern int pciehp_configure_device (struct slot *ctrl);
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extern int pciehp_unconfigure_device (struct pci_func* func);
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extern int pciehp_configure_device (struct slot *p_slot);
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extern int pciehp_unconfigure_device (struct slot *p_slot);
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extern int get_hp_hw_control_from_firmware(struct pci_dev *dev);
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extern void get_hp_params_from_firmware(struct pci_dev *dev,
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struct hotplug_params *hpp);
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@@ -214,7 +191,6 @@ extern void get_hp_params_from_firmware(struct pci_dev *dev,
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/* Global variables */
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extern struct controller *pciehp_ctrl_list;
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extern struct pci_func *pciehp_slot_list[256];
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/* Inline functions */
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@@ -46,7 +46,6 @@ int pciehp_debug;
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int pciehp_poll_mode;
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int pciehp_poll_time;
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struct controller *pciehp_ctrl_list;
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struct pci_func *pciehp_slot_list[256];
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#define DRIVER_VERSION "0.4"
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#define DRIVER_AUTHOR "Dan Zink <dan.zink@compaq.com>, Greg Kroah-Hartman <greg@kroah.com>, Dely Sy <dely.l.sy@intel.com>"
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@@ -422,15 +421,6 @@ static int pciehp_probe(struct pcie_device *dev, const struct pcie_port_service_
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first_device_num = ctrl->slot_device_offset;
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num_ctlr_slots = ctrl->num_slots;
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/* Store PCI Config Space for all devices on this bus */
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dbg("%s: Before calling pciehp_save_config, ctrl->bus %x,ctrl->slot_bus %x\n",
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__FUNCTION__,ctrl->bus, ctrl->slot_bus);
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rc = pciehp_save_config(ctrl, ctrl->slot_bus, num_ctlr_slots, first_device_num);
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if (rc) {
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err("%s: unable to save PCI configuration data, error %d\n", __FUNCTION__, rc);
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goto err_out_free_ctrl_bus;
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}
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ctrl->add_support = 1;
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/* Setup the slot information structures */
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@@ -491,7 +481,6 @@ err_out_none:
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static int pcie_start_thread(void)
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{
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int loop;
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int retval = 0;
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dbg("Initialize + Start the notification/polling mechanism \n");
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@@ -502,20 +491,11 @@ static int pcie_start_thread(void)
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return retval;
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}
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dbg("Initialize slot lists\n");
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/* One slot list for each bus in the system */
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for (loop = 0; loop < 256; loop++) {
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pciehp_slot_list[loop] = NULL;
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}
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return retval;
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}
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static void __exit unload_pciehpd(void)
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{
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struct pci_func *next;
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struct pci_func *TempSlot;
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int loop;
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struct controller *ctrl;
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struct controller *tctrl;
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@@ -534,15 +514,6 @@ static void __exit unload_pciehpd(void)
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kfree(tctrl);
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}
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for (loop = 0; loop < 256; loop++) {
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next = pciehp_slot_list[loop];
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while (next != NULL) {
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TempSlot = next;
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next = next->next;
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kfree(TempSlot);
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}
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}
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/* Stop the notification mechanism */
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pciehp_event_stop_thread();
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File diff suppressed because it is too large
Load Diff
@@ -101,346 +101,41 @@ int pciehp_configure_device(struct slot *p_slot)
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return 0;
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}
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int pciehp_unconfigure_device(struct pci_func* func)
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int pciehp_unconfigure_device(struct slot *p_slot)
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{
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int rc = 0;
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int j;
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struct pci_bus *pbus;
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u8 bctl = 0;
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dbg("%s: bus/dev/func = %x/%x/%x\n", __FUNCTION__, func->bus,
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func->device, func->function);
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pbus = func->pci_dev->bus;
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dbg("%s: bus/dev = %x/%x\n", __FUNCTION__, p_slot->bus,
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p_slot->device);
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for (j=0; j<8 ; j++) {
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struct pci_dev* temp = pci_find_slot(func->bus,
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(func->device << 3) | j);
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if (temp) {
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pci_remove_bus_device(temp);
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struct pci_dev* temp = pci_find_slot(p_slot->bus,
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(p_slot->device << 3) | j);
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if (!temp)
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continue;
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if ((temp->class >> 16) == PCI_BASE_CLASS_DISPLAY) {
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err("Cannot remove display device %s\n",
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pci_name(temp));
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continue;
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}
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if (temp->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
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pci_read_config_byte(temp, PCI_BRIDGE_CONTROL, &bctl);
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if (bctl & PCI_BRIDGE_CTL_VGA) {
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err("Cannot remove display device %s\n",
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pci_name(temp));
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continue;
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}
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}
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pci_remove_bus_device(temp);
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}
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/*
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* Some PCI Express root ports require fixup after hot-plug operation.
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*/
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if (pcie_mch_quirk)
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pci_fixup_device(pci_fixup_final, pbus->self);
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pci_fixup_device(pci_fixup_final, p_slot->ctrl->pci_dev);
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return rc;
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}
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/*
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* pciehp_save_config
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*
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* Reads configuration for all slots in a PCI bus and saves info.
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*
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* Note: For non-hot plug busses, the slot # saved is the device #
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*
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* returns 0 if success
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*/
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int pciehp_save_config(struct controller *ctrl, int busnumber, int num_ctlr_slots, int first_device_num)
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{
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int rc;
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u8 class_code;
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u8 header_type;
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u32 ID;
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u8 secondary_bus;
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struct pci_func *new_slot;
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int sub_bus;
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int max_functions;
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int function;
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u8 DevError;
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int device = 0;
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int cloop = 0;
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int stop_it;
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int index;
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int is_hot_plug = num_ctlr_slots || first_device_num;
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struct pci_bus lpci_bus, *pci_bus;
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int FirstSupported, LastSupported;
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dbg("%s: Enter\n", __FUNCTION__);
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memcpy(&lpci_bus, ctrl->pci_dev->subordinate, sizeof(lpci_bus));
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pci_bus = &lpci_bus;
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dbg("%s: num_ctlr_slots = %d, first_device_num = %d\n", __FUNCTION__,
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num_ctlr_slots, first_device_num);
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/* Decide which slots are supported */
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if (is_hot_plug) {
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/*********************************
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* is_hot_plug is the slot mask
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*********************************/
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FirstSupported = first_device_num;
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LastSupported = FirstSupported + num_ctlr_slots - 1;
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} else {
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FirstSupported = 0;
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LastSupported = 0x1F;
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}
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dbg("FirstSupported = %d, LastSupported = %d\n", FirstSupported,
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LastSupported);
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/* Save PCI configuration space for all devices in supported slots */
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dbg("%s: pci_bus->number = %x\n", __FUNCTION__, pci_bus->number);
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pci_bus->number = busnumber;
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dbg("%s: bus = %x, dev = %x\n", __FUNCTION__, busnumber, device);
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for (device = FirstSupported; device <= LastSupported; device++) {
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ID = 0xFFFFFFFF;
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rc = pci_bus_read_config_dword(pci_bus, PCI_DEVFN(device, 0),
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PCI_VENDOR_ID, &ID);
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if (ID != 0xFFFFFFFF) { /* device in slot */
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dbg("%s: ID = %x\n", __FUNCTION__, ID);
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rc = pci_bus_read_config_byte(pci_bus, PCI_DEVFN(device, 0),
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0x0B, &class_code);
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if (rc)
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return rc;
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rc = pci_bus_read_config_byte(pci_bus, PCI_DEVFN(device, 0),
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PCI_HEADER_TYPE, &header_type);
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if (rc)
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return rc;
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dbg("class_code = %x, header_type = %x\n", class_code, header_type);
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/* If multi-function device, set max_functions to 8 */
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if (header_type & 0x80)
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max_functions = 8;
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else
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max_functions = 1;
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function = 0;
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do {
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DevError = 0;
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dbg("%s: In do loop\n", __FUNCTION__);
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if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) { /* P-P Bridge */
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/* Recurse the subordinate bus
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* get the subordinate bus number
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*/
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rc = pci_bus_read_config_byte(pci_bus,
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PCI_DEVFN(device, function),
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PCI_SECONDARY_BUS, &secondary_bus);
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if (rc) {
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return rc;
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} else {
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sub_bus = (int) secondary_bus;
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/* Save secondary bus cfg spc with this recursive call. */
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rc = pciehp_save_config(ctrl, sub_bus, 0, 0);
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if (rc)
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return rc;
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}
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}
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index = 0;
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new_slot = pciehp_slot_find(busnumber, device, index++);
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dbg("%s: new_slot = %p bus %x dev %x fun %x\n",
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__FUNCTION__, new_slot, busnumber, device, index-1);
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while (new_slot && (new_slot->function != (u8) function)) {
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new_slot = pciehp_slot_find(busnumber, device, index++);
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dbg("%s: while loop, new_slot = %p bus %x dev %x fun %x\n",
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__FUNCTION__, new_slot, busnumber, device, index-1);
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}
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if (!new_slot) {
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/* Setup slot structure. */
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new_slot = pciehp_slot_create(busnumber);
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dbg("%s: if, new_slot = %p bus %x dev %x fun %x\n",
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__FUNCTION__, new_slot, busnumber, device, function);
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if (new_slot == NULL)
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return(1);
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}
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new_slot->bus = (u8) busnumber;
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new_slot->device = (u8) device;
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new_slot->function = (u8) function;
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new_slot->is_a_board = 1;
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new_slot->switch_save = 0x10;
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/* In case of unsupported board */
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new_slot->status = DevError;
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new_slot->pci_dev = pci_find_slot(new_slot->bus,
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(new_slot->device << 3) | new_slot->function);
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dbg("new_slot->pci_dev = %p\n", new_slot->pci_dev);
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for (cloop = 0; cloop < 0x20; cloop++) {
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rc = pci_bus_read_config_dword(pci_bus,
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PCI_DEVFN(device, function),
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cloop << 2,
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(u32 *) &(new_slot->config_space [cloop]));
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/* dbg("new_slot->config_space[%x] = %x\n",
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cloop, new_slot->config_space[cloop]); */
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if (rc)
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return rc;
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}
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function++;
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stop_it = 0;
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/* this loop skips to the next present function
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* reading in Class Code and Header type.
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*/
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while ((function < max_functions)&&(!stop_it)) {
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dbg("%s: In while loop \n", __FUNCTION__);
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rc = pci_bus_read_config_dword(pci_bus,
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PCI_DEVFN(device, function),
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PCI_VENDOR_ID, &ID);
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if (ID == 0xFFFFFFFF) { /* nothing there. */
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function++;
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dbg("Nothing there\n");
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} else { /* Something there */
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rc = pci_bus_read_config_byte(pci_bus,
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PCI_DEVFN(device, function),
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0x0B, &class_code);
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if (rc)
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return rc;
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rc = pci_bus_read_config_byte(pci_bus,
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PCI_DEVFN(device, function),
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PCI_HEADER_TYPE, &header_type);
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if (rc)
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return rc;
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dbg("class_code = %x, header_type = %x\n", class_code, header_type);
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stop_it++;
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}
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}
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} while (function < max_functions);
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/* End of IF (device in slot?) */
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} else if (is_hot_plug) {
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/* Setup slot structure with entry for empty slot */
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new_slot = pciehp_slot_create(busnumber);
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if (new_slot == NULL) {
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return(1);
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}
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dbg("new_slot = %p, bus = %x, dev = %x, fun = %x\n", new_slot,
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new_slot->bus, new_slot->device, new_slot->function);
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new_slot->bus = (u8) busnumber;
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new_slot->device = (u8) device;
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new_slot->function = 0;
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new_slot->is_a_board = 0;
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new_slot->presence_save = 0;
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new_slot->switch_save = 0;
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}
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} /* End of FOR loop */
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dbg("%s: Exit\n", __FUNCTION__);
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return(0);
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}
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/*
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* pciehp_save_slot_config
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*
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* Saves configuration info for all PCI devices in a given slot
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* including subordinate busses.
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*
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* returns 0 if success
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*/
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int pciehp_save_slot_config(struct controller *ctrl, struct pci_func * new_slot)
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{
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int rc;
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u8 class_code;
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u8 header_type;
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u32 ID;
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u8 secondary_bus;
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int sub_bus;
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int max_functions;
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int function;
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int cloop = 0;
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int stop_it;
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struct pci_bus lpci_bus, *pci_bus;
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memcpy(&lpci_bus, ctrl->pci_dev->subordinate, sizeof(lpci_bus));
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pci_bus = &lpci_bus;
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pci_bus->number = new_slot->bus;
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ID = 0xFFFFFFFF;
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pci_bus_read_config_dword(pci_bus, PCI_DEVFN(new_slot->device, 0),
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PCI_VENDOR_ID, &ID);
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if (ID != 0xFFFFFFFF) { /* device in slot */
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pci_bus_read_config_byte(pci_bus, PCI_DEVFN(new_slot->device, 0),
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0x0B, &class_code);
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pci_bus_read_config_byte(pci_bus, PCI_DEVFN(new_slot->device, 0),
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PCI_HEADER_TYPE, &header_type);
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if (header_type & 0x80) /* Multi-function device */
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max_functions = 8;
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else
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max_functions = 1;
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function = 0;
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||||
|
||||
do {
|
||||
if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) { /* PCI-PCI Bridge */
|
||||
/* Recurse the subordinate bus */
|
||||
pci_bus_read_config_byte(pci_bus,
|
||||
PCI_DEVFN(new_slot->device, function),
|
||||
PCI_SECONDARY_BUS, &secondary_bus);
|
||||
|
||||
sub_bus = (int) secondary_bus;
|
||||
|
||||
/* Save the config headers for the secondary bus. */
|
||||
rc = pciehp_save_config(ctrl, sub_bus, 0, 0);
|
||||
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
} /* End of IF */
|
||||
|
||||
new_slot->status = 0;
|
||||
|
||||
for (cloop = 0; cloop < 0x20; cloop++) {
|
||||
pci_bus_read_config_dword(pci_bus,
|
||||
PCI_DEVFN(new_slot->device, function),
|
||||
cloop << 2,
|
||||
(u32 *) &(new_slot->config_space [cloop]));
|
||||
}
|
||||
|
||||
function++;
|
||||
|
||||
stop_it = 0;
|
||||
|
||||
/* this loop skips to the next present function
|
||||
* reading in the Class Code and the Header type.
|
||||
*/
|
||||
|
||||
while ((function < max_functions) && (!stop_it)) {
|
||||
pci_bus_read_config_dword(pci_bus,
|
||||
PCI_DEVFN(new_slot->device, function),
|
||||
PCI_VENDOR_ID, &ID);
|
||||
|
||||
if (ID == 0xFFFFFFFF) { /* nothing there. */
|
||||
function++;
|
||||
} else { /* Something there */
|
||||
pci_bus_read_config_byte(pci_bus,
|
||||
PCI_DEVFN(new_slot->device, function),
|
||||
0x0B, &class_code);
|
||||
|
||||
pci_bus_read_config_byte(pci_bus,
|
||||
PCI_DEVFN(new_slot->device, function),
|
||||
PCI_HEADER_TYPE, &header_type);
|
||||
|
||||
stop_it++;
|
||||
}
|
||||
}
|
||||
|
||||
} while (function < max_functions);
|
||||
} /* End of IF (device in slot?) */
|
||||
else {
|
||||
return 2;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
Reference in New Issue
Block a user