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Merge tag 'pinctrl-v3.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Browse Source 
Pull pin control changes from Linus Walleij:
 "Here is a stash of pin control changes I have collected for the v3.19
  series.  Mainly new hardware support, with Intels new embedded SoC as
  the especially interesting thing standing out, fully using the
  subsystem.

   - Force conversion of the ux500 pin control device trees and parsers
     to use the generic pin control bindings.
   - New driver and device tree bindings for the Qualcomm PMIC MPP pin
     controller and GPIO.
   - Some ACPI infrastructure for pin controllers.
   - New driver for the Intel CherryView/Braswell pin controller, the
     first Intel pin controller to fully take advantage of the pin
     control subsystem.
   - Support the Freescale i.MX VF610 variant.
   - Support the sunxi A80 variant.
   - Support the Samsung Exynos 4415 and Exynos 7 variants.
   - Split out Intel pin controllers to their own subdirectory.
   - A large slew of rockchip pin control updates, including
     suspend/resume support.
   - A large slew of Samsung Exynos pin controller updates.
   - Various minor updates and fixes"

* tag 'pinctrl-v3.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (49 commits)
  pinctrl: at91: enhance (debugfs) at91_gpio_dbg_show
  pinctrl: meson: add device tree bindings documentation
  gpio: tz1090: Fix error handling of irq_of_parse_and_map
  pinctrl: tz1090-pinctrl.txt: Fix typo in binding
  pinctrl: pinconf-generic: Declare dt_params/conf_items const
  pinctrl: exynos: Add support for Exynos4415
  pinctrl: exynos: Add initial driver data for Exynos7
  pinctrl: exynos: Add irq_chip instance for Exynos7 wakeup interrupts
  pinctrl: exynos: Consolidate irq domain callbacks
  pinctrl: exynos: Generalize the eint16_31 demux code
  pinctrl: samsung: Separate per-bank init and runtime data
  pinctrl: samsung: Constify samsung_pin_ctrl struct
  pinctrl: samsung: Constify samsung_pin_bank_type struct
  pinctrl: samsung: Drop unused label field in samsung_pin_ctrl struct
  pinctrl: samsung: Make samsung_pinctrl_get_soc_data use ERR_PTR()
  pinctrl: Add Intel Cherryview/Braswell pin controller support
  gpio / ACPI: Add knowledge about pin controllers to acpi_get_gpiod()
  pinctrl: Fix path error in documentation
  pinctrl: rockchip: save and restore gpio6_c6 pinmux in suspend/resume
  pinctrl: rockchip: add suspend/resume functions
  ...
This commit is contained in:
Linus Torvalds
2014-12-11 10:43:14 -08:00
parent 92a578b064 853b6bf044
commit c1b30e4d94
56 changed files with 6160 additions and 819 deletions
Download Patch File Download Diff File Expand all files Collapse all files
Documentation/devicetree/bindings/pinctrl/img,tz1090-pinctrl.txt
+1 -1
View File
@@ -67,7 +67,7 @@ Valid values for pin and group names are:
They also all support the some form of muxing. Any pins which are contained
in one of the mux groups (see below) can be muxed only to the functions
supported by the mux group. All other pins can be muxed to the "perip"
function which which enables them with their intended peripheral.
function which enables them with their intended peripheral.
Different pins in the same mux group cannot be muxed to different functions,
however it is possible to mux only a subset of the pins in a mux group to a
Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt
+96
View File
@@ -0,0 +1,96 @@
== Amlogic Meson pinmux controller ==
Required properties for the root node:
- compatible: "amlogic,meson8-pinctrl"
- reg: address and size of registers controlling irq functionality
=== GPIO sub-nodes ===
The 2 power domains of the controller (regular and always-on) are
represented as sub-nodes and each of them acts as a GPIO controller.
Required properties for sub-nodes are:
- reg: should contain address and size for mux, pull-enable, pull and
gpio register sets
- reg-names: an array of strings describing the "reg" entries. Must
contain "mux", "pull" and "gpio". "pull-enable" is optional and
when it is missing the "pull" registers are used instead
- gpio-controller: identifies the node as a gpio controller
- #gpio-cells: must be 2
Valid sub-node names are:
- "banks" for the regular domain
- "ao-bank" for the always-on domain
=== Other sub-nodes ===
Child nodes without the "gpio-controller" represent some desired
configuration for a pin or a group. Those nodes can be pinmux nodes or
configuration nodes.
Required properties for pinmux nodes are:
- groups: a list of pinmux groups. The list of all available groups
depends on the SoC and can be found in driver sources.
- function: the name of a function to activate for the specified set
of groups. The list of all available functions depends on the SoC
and can be found in driver sources.
Required properties for configuration nodes:
- pins: a list of pin names
Configuration nodes support the generic properties "bias-disable",
"bias-pull-up" and "bias-pull-down", described in file
pinctrl-bindings.txt
=== Example ===
pinctrl: pinctrl@c1109880 {
compatible = "amlogic,meson8-pinctrl";
reg = <0xc1109880 0x10>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
gpio: banks@c11080b0 {
reg = <0xc11080b0 0x28>,
<0xc11080e8 0x18>,
<0xc1108120 0x18>,
<0xc1108030 0x30>;
reg-names = "mux", "pull", "pull-enable", "gpio";
gpio-controller;
#gpio-cells = <2>;
};
gpio_ao: ao-bank@c1108030 {
reg = <0xc8100014 0x4>,
<0xc810002c 0x4>,
<0xc8100024 0x8>;
reg-names = "mux", "pull", "gpio";
gpio-controller;
#gpio-cells = <2>;
};
nand {
mux {
groups = "nand_io", "nand_io_ce0", "nand_io_ce1",
"nand_io_rb0", "nand_ale", "nand_cle",
"nand_wen_clk", "nand_ren_clk", "nand_dqs",
"nand_ce2", "nand_ce3";
function = "nand";
};
};
uart_ao_a {
mux {
groups = "uart_tx_ao_a", "uart_rx_ao_a",
"uart_cts_ao_a", "uart_rts_ao_a";
function = "uart_ao";
};
conf {
pins = "GPIOAO_0", "GPIOAO_1",
"GPIOAO_2", "GPIOAO_3";
bias-disable;
};
};
};
Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
+1 -1
View File
@@ -216,4 +216,4 @@ arguments are described below.
or 0 to disable debouncing
More in-depth documentation on these parameters can be found in
<include/linux/pinctrl/pinconfig-generic.h>
<include/linux/pinctrl/pinconf-generic.h>
Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt
+215
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@@ -0,0 +1,215 @@
Qualcomm PMIC GPIO block
This binding describes the GPIO block(s) found in the 8xxx series of
PMIC's from Qualcomm.
- compatible:
Usage: required
Value type: <string>
Definition: must be one of:
"qcom,pm8018-gpio"
"qcom,pm8038-gpio"
"qcom,pm8058-gpio"
"qcom,pm8917-gpio"
"qcom,pm8921-gpio"
"qcom,pm8941-gpio"
"qcom,pma8084-gpio"
- reg:
Usage: required
Value type: <prop-encoded-array>
Definition: Register base of the GPIO block and length.
- interrupts:
Usage: required
Value type: <prop-encoded-array>
Definition: Must contain an array of encoded interrupt specifiers for
each available GPIO
- gpio-controller:
Usage: required
Value type: <none>
Definition: Mark the device node as a GPIO controller
- #gpio-cells:
Usage: required
Value type: <u32>
Definition: Must be 2;
the first cell will be used to define gpio number and the
second denotes the flags for this gpio
Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for
a general description of GPIO and interrupt bindings.
Please refer to pinctrl-bindings.txt in this directory for details of the
common pinctrl bindings used by client devices, including the meaning of the
phrase "pin configuration node".
The pin configuration nodes act as a container for an arbitrary number of
subnodes. Each of these subnodes represents some desired configuration for a
pin or a list of pins. This configuration can include the
mux function to select on those pin(s), and various pin configuration
parameters, as listed below.
SUBNODES:
The name of each subnode is not important; all subnodes should be enumerated
and processed purely based on their content.
Each subnode only affects those parameters that are explicitly listed. In
other words, a subnode that lists a mux function but no pin configuration
parameters implies no information about any pin configuration parameters.
Similarly, a pin subnode that describes a pullup parameter implies no
information about e.g. the mux function.
The following generic properties as defined in pinctrl-bindings.txt are valid
to specify in a pin configuration subnode:
- pins:
Usage: required
Value type: <string-array>
Definition: List of gpio pins affected by the properties specified in
this subnode. Valid pins are:
gpio1-gpio6 for pm8018
gpio1-gpio12 for pm8038
gpio1-gpio40 for pm8058
gpio1-gpio38 for pm8917
gpio1-gpio44 for pm8921
gpio1-gpio36 for pm8941
gpio1-gpio22 for pma8084
- function:
Usage: required
Value type: <string>
Definition: Specify the alternative function to be configured for the
specified pins. Valid values are:
"normal",
"paired",
"func1",
"func2",
"dtest1",
"dtest2",
"dtest3",
"dtest4"
- bias-disable:
Usage: optional
Value type: <none>
Definition: The specified pins should be configured as no pull.
- bias-pull-down:
Usage: optional
Value type: <none>
Definition: The specified pins should be configured as pull down.
- bias-pull-up:
Usage: optional
Value type: <empty>
Definition: The specified pins should be configured as pull up.
- qcom,pull-up-strength:
Usage: optional
Value type: <u32>
Definition: Specifies the strength to use for pull up, if selected.
Valid values are; as defined in
<dt-bindings/pinctrl/qcom,pmic-gpio.h>:
1: 30uA (PMIC_GPIO_PULL_UP_30)
2: 1.5uA (PMIC_GPIO_PULL_UP_1P5)
3: 31.5uA (PMIC_GPIO_PULL_UP_31P5)
4: 1.5uA + 30uA boost (PMIC_GPIO_PULL_UP_1P5_30)
If this property is ommited 30uA strength will be used if
pull up is selected
- bias-high-impedance:
Usage: optional
Value type: <none>
Definition: The specified pins will put in high-Z mode and disabled.
- input-enable:
Usage: optional
Value type: <none>
Definition: The specified pins are put in input mode.
- output-high:
Usage: optional
Value type: <none>
Definition: The specified pins are configured in output mode, driven
high.
- output-low:
Usage: optional
Value type: <none>
Definition: The specified pins are configured in output mode, driven
low.
- power-source:
Usage: optional
Value type: <u32>
Definition: Selects the power source for the specified pins. Valid
power sources are defined per chip in
<dt-bindings/pinctrl/qcom,pmic-gpio.h>
- qcom,drive-strength:
Usage: optional
Value type: <u32>
Definition: Selects the drive strength for the specified pins. Value
drive strengths are:
0: no (PMIC_GPIO_STRENGTH_NO)
1: high (PMIC_GPIO_STRENGTH_HIGH) 0.9mA @ 1.8V - 1.9mA @ 2.6V
2: medium (PMIC_GPIO_STRENGTH_MED) 0.6mA @ 1.8V - 1.25mA @ 2.6V
3: low (PMIC_GPIO_STRENGTH_LOW) 0.15mA @ 1.8V - 0.3mA @ 2.6V
as defined in <dt-bindings/pinctrl/qcom,pmic-gpio.h>
- drive-push-pull:
Usage: optional
Value type: <none>
Definition: The specified pins are configured in push-pull mode.
- drive-open-drain:
Usage: optional
Value type: <none>
Definition: The specified pins are configured in open-drain mode.
- drive-open-source:
Usage: optional
Value type: <none>
Definition: The specified pins are configured in open-source mode.
Example:
pm8921_gpio: gpio@150 {
compatible = "qcom,pm8921-gpio";
reg = <0x150 0x160>;
interrupts = <192 1>, <193 1>, <194 1>,
<195 1>, <196 1>, <197 1>,
<198 1>, <199 1>, <200 1>,
<201 1>, <202 1>, <203 1>,
<204 1>, <205 1>, <206 1>,
<207 1>, <208 1>, <209 1>,
<210 1>, <211 1>, <212 1>,
<213 1>, <214 1>, <215 1>,
<216 1>, <217 1>, <218 1>,
<219 1>, <220 1>, <221 1>,
<222 1>, <223 1>, <224 1>,
<225 1>, <226 1>, <227 1>,
<228 1>, <229 1>, <230 1>,
<231 1>, <232 1>, <233 1>,
<234 1>, <235 1>;
gpio-controller;
#gpio-cells = <2>;
pm8921_gpio_keys: gpio-keys {
volume-keys {
pins = "gpio20", "gpio21";
function = "normal";
input-enable;
bias-pull-up;
drive-push-pull;
qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
power-source = <PM8921_GPIO_S4>;
};
};
};
Documentation/devicetree/bindings/pinctrl/qcom,pmic-mpp.txt
+162
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@@ -0,0 +1,162 @@
Qualcomm PMIC Multi-Purpose Pin (MPP) block
This binding describes the MPP block(s) found in the 8xxx series
of PMIC's from Qualcomm.
- compatible:
Usage: required
Value type: <string>
Definition: Should contain one of:
"qcom,pm8841-mpp",
"qcom,pm8941-mpp",
"qcom,pma8084-mpp",
- reg:
Usage: required
Value type: <prop-encoded-array>
Definition: Register base of the MPP block and length.
- interrupts:
Usage: required
Value type: <prop-encoded-array>
Definition: Must contain an array of encoded interrupt specifiers for
each available MPP
- gpio-controller:
Usage: required
Value type: <none>
Definition: Mark the device node as a GPIO controller
- #gpio-cells:
Usage: required
Value type: <u32>
Definition: Must be 2;
the first cell will be used to define MPP number and the
second denotes the flags for this MPP
Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for
a general description of GPIO and interrupt bindings.
Please refer to pinctrl-bindings.txt in this directory for details of the
common pinctrl bindings used by client devices, including the meaning of the
phrase "pin configuration node".
The pin configuration nodes act as a container for an arbitrary number of
subnodes. Each of these subnodes represents some desired configuration for a
pin or a list of pins. This configuration can include the
mux function to select on those pin(s), and various pin configuration
parameters, as listed below.
SUBNODES:
The name of each subnode is not important; all subnodes should be enumerated
and processed purely based on their content.
Each subnode only affects those parameters that are explicitly listed. In
other words, a subnode that lists a mux function but no pin configuration
parameters implies no information about any pin configuration parameters.
Similarly, a pin subnode that describes a pullup parameter implies no
information about e.g. the mux function.
The following generic properties as defined in pinctrl-bindings.txt are valid
to specify in a pin configuration subnode:
- pins:
Usage: required
Value type: <string-array>
Definition: List of MPP pins affected by the properties specified in
this subnode. Valid pins are:
mpp1-mpp4 for pm8841
mpp1-mpp8 for pm8941
mpp1-mpp4 for pma8084
- function:
Usage: required
Value type: <string>
Definition: Specify the alternative function to be configured for the
specified pins. Valid values are:
"normal",
"paired",
"dtest1",
"dtest2",
"dtest3",
"dtest4"
- bias-disable:
Usage: optional
Value type: <none>
Definition: The specified pins should be configured as no pull.
- bias-pull-up:
Usage: optional
Value type: <u32>
Definition: The specified pins should be configured as pull up.
Valid values are 600, 10000 and 30000 in bidirectional mode
only, i.e. when operating in qcom,analog-mode and input and
outputs are enabled. The hardware ignores the configuration
when operating in other modes.
- bias-high-impedance:
Usage: optional
Value type: <none>
Definition: The specified pins will put in high-Z mode and disabled.
- input-enable:
Usage: optional
Value type: <none>
Definition: The specified pins are put in input mode, i.e. their input
buffer is enabled
- output-high:
Usage: optional
Value type: <none>
Definition: The specified pins are configured in output mode, driven
high.
- output-low:
Usage: optional
Value type: <none>
Definition: The specified pins are configured in output mode, driven
low.
- power-source:
Usage: optional
Value type: <u32>
Definition: Selects the power source for the specified pins. Valid power
sources are defined in <dt-bindings/pinctrl/qcom,pmic-mpp.h>
- qcom,analog-mode:
Usage: optional
Value type: <none>
Definition: Selects Analog mode of operation: combined with input-enable
and/or output-high, output-low MPP could operate as
Bidirectional Logic, Analog Input, Analog Output.
- qcom,amux-route:
Usage: optional
Value type: <u32>
Definition: Selects the source for analog input. Valid values are
defined in <dt-bindings/pinctrl/qcom,pmic-mpp.h>
PMIC_MPP_AMUX_ROUTE_CH5, PMIC_MPP_AMUX_ROUTE_CH6...
Example:
mpps@a000 {
compatible = "qcom,pm8841-mpp";
reg = <0xa000>;
gpio-controller;
#gpio-cells = <2>;
interrupts = <4 0xa0 0 0>, <4 0xa1 0 0>, <4 0xa2 0 0>, <4 0xa3 0 0>;
pinctrl-names = "default";
pinctrl-0 = <&pm8841_default>;
pm8841_default: default {
gpio {
pins = "mpp1", "mpp2", "mpp3", "mpp4";
function = "normal";
input-enable;
power-source = <PM8841_MPP_S3>;
};
};
};
Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
+3
View File
@@ -18,6 +18,7 @@ Required Properties:
- "samsung,exynos5250-pinctrl": for Exynos5250 compatible pin-controller.
- "samsung,exynos5260-pinctrl": for Exynos5260 compatible pin-controller.
- "samsung,exynos5420-pinctrl": for Exynos5420 compatible pin-controller.
- "samsung,exynos7-pinctrl": for Exynos7 compatible pin-controller.
- reg: Base address of the pin controller hardware module and length of
the address space it occupies.
@@ -136,6 +137,8 @@ B. External Wakeup Interrupts: For supporting external wakeup interrupts, a
found on Samsung S3C64xx SoCs,
- samsung,exynos4210-wakeup-eint: represents wakeup interrupt controller
found on Samsung Exynos4210 and S5PC110/S5PV210 SoCs.
- samsung,exynos7-wakeup-eint: represents wakeup interrupt controller
found on Samsung Exynos7 SoC.
- interrupt-parent: phandle of the interrupt parent to which the external
wakeup interrupts are forwarded to.
- interrupts: interrupt used by multiplexed wakeup interrupts.
Documentation/devicetree/bindings/pinctrl/ste,abx500.txt
+75 -109
View File
@@ -8,42 +8,8 @@ Please refer to pinctrl-bindings.txt in this directory for details of the
common pinctrl bindings used by client devices, including the meaning of the
phrase "pin configuration node".
ST Ericsson's pin configuration nodes act as a container for an arbitrary number of
subnodes. Each of these subnodes represents some desired configuration for a
pin, a group, or a list of pins or groups. This configuration can include the
mux function to select on those pin(s)/group(s), and various pin configuration
parameters, such as input, output, pull up, pull down...
The name of each subnode is not important; all subnodes should be enumerated
and processed purely based on their content.
Required subnode-properties:
- ste,pins : An array of strings. Each string contains the name of a pin or
group.
Optional subnode-properties:
- ste,function: A string containing the name of the function to mux to the
pin or group.
- generic pin configuration option to use. Example :
default_cfg {
ste,pins = "GPIO1";
bias-disable;
};
- ste,config: Handle of pin configuration node containing the generic
pinconfig options to use, as described in pinctrl-bindings.txt in
this directory. Example :
pcfg_bias_disable: pcfg_bias_disable {
bias-disable;
};
default_cfg {
ste,pins = "GPIO1";
ste.config = <&pcfg_bias_disable>;
};
ST Ericsson's pin configuration nodes use the generic pin multiplexing
and pin configuration bindings, see pinctrl-bindings.txt
Example board file extract:
@@ -54,11 +20,11 @@ Example board file extract:
sysclkreq2 {
sysclkreq2_default_mode: sysclkreq2_default {
default_mux {
ste,function = "sysclkreq";
ste,pins = "sysclkreq2_d_1";
function = "sysclkreq";
groups = "sysclkreq2_d_1";
};
default_cfg {
ste,pins = "GPIO1";
pins = "GPIO1";
bias-disable;
};
};
@@ -66,11 +32,11 @@ Example board file extract:
sysclkreq3 {
sysclkreq3_default_mode: sysclkreq3_default {
default_mux {
ste,function = "sysclkreq";
ste,pins = "sysclkreq3_d_1";
function = "sysclkreq";
groups = "sysclkreq3_d_1";
};
default_cfg {
ste,pins = "GPIO2";
pins = "GPIO2";
output-low;
};
};
@@ -78,11 +44,11 @@ Example board file extract:
gpio3 {
gpio3_default_mode: gpio3_default {
default_mux {
ste,function = "gpio";
ste,pins = "gpio3_a_1";
function = "gpio";
groups = "gpio3_a_1";
};
default_cfg {
ste,pins = "GPIO3";
pins = "GPIO3";
output-low;
};
};
@@ -90,11 +56,11 @@ Example board file extract:
sysclkreq6 {
sysclkreq6_default_mode: sysclkreq6_default {
default_mux {
ste,function = "sysclkreq";
ste,pins = "sysclkreq6_d_1";
function = "sysclkreq";
groups = "sysclkreq6_d_1";
};
default_cfg {
ste,pins = "GPIO4";
pins = "GPIO4";
bias-disable;
};
};
@@ -102,11 +68,11 @@ Example board file extract:
pwmout1 {
pwmout1_default_mode: pwmout1_default {
default_mux {
ste,function = "pwmout";
ste,pins = "pwmout1_d_1";
function = "pwmout";
groups = "pwmout1_d_1";
};
default_cfg {
ste,pins = "GPIO14";
pins = "GPIO14";
output-low;
};
};
@@ -114,11 +80,11 @@ Example board file extract:
pwmout2 {
pwmout2_default_mode: pwmout2_default {
pwmout2_default_mux {
ste,function = "pwmout";
ste,pins = "pwmout2_d_1";
function = "pwmout";
groups = "pwmout2_d_1";
};
pwmout2_default_cfg {
ste,pins = "GPIO15";
pins = "GPIO15";
output-low;
};
};
@@ -126,11 +92,11 @@ Example board file extract:
pwmout3 {
pwmout3_default_mode: pwmout3_default {
pwmout3_default_mux {
ste,function = "pwmout";
ste,pins = "pwmout3_d_1";
function = "pwmout";
groups = "pwmout3_d_1";
};
pwmout3_default_cfg {
ste,pins = "GPIO16";
pins = "GPIO16";
output-low;
};
};
@@ -139,15 +105,15 @@ Example board file extract:
adi1_default_mode: adi1_default {
adi1_default_mux {
ste,function = "adi1";
ste,pins = "adi1_d_1";
function = "adi1";
groups = "adi1_d_1";
};
adi1_default_cfg1 {
ste,pins = "GPIO17","GPIO19","GPIO20";
pins = "GPIO17","GPIO19","GPIO20";
bias-disable;
};
adi1_default_cfg2 {
ste,pins = "GPIO18";
pins = "GPIO18";
output-low;
};
};
@@ -155,15 +121,15 @@ Example board file extract:
dmic12 {
dmic12_default_mode: dmic12_default {
dmic12_default_mux {
ste,function = "dmic";
ste,pins = "dmic12_d_1";
function = "dmic";
groups = "dmic12_d_1";
};
dmic12_default_cfg1 {
ste,pins = "GPIO27";
pins = "GPIO27";
output-low;
};
dmic12_default_cfg2 {
ste,pins = "GPIO28";
pins = "GPIO28";
bias-disable;
};
};
@@ -171,15 +137,15 @@ Example board file extract:
dmic34 {
dmic34_default_mode: dmic34_default {
dmic34_default_mux {
ste,function = "dmic";
ste,pins = "dmic34_d_1";
function = "dmic";
groups = "dmic34_d_1";
};
dmic34_default_cfg1 {
ste,pins = "GPIO29";
pins = "GPIO29";
output-low;
};
dmic34_default_cfg2 {
ste,pins = "GPIO30";
pins = "GPIO30";
bias-disable;{
};
@@ -188,15 +154,15 @@ Example board file extract:
dmic56 {
dmic56_default_mode: dmic56_default {
dmic56_default_mux {
ste,function = "dmic";
ste,pins = "dmic56_d_1";
function = "dmic";
groups = "dmic56_d_1";
};
dmic56_default_cfg1 {
ste,pins = "GPIO31";
pins = "GPIO31";
output-low;
};
dmic56_default_cfg2 {
ste,pins = "GPIO32";
pins = "GPIO32";
bias-disable;
};
};
@@ -204,11 +170,11 @@ Example board file extract:
sysclkreq5 {
sysclkreq5_default_mode: sysclkreq5_default {
sysclkreq5_default_mux {
ste,function = "sysclkreq";
ste,pins = "sysclkreq5_d_1";
function = "sysclkreq";
groups = "sysclkreq5_d_1";
};
sysclkreq5_default_cfg {
ste,pins = "GPIO42";
pins = "GPIO42";
output-low;
};
};
@@ -216,11 +182,11 @@ Example board file extract:
batremn {
batremn_default_mode: batremn_default {
batremn_default_mux {
ste,function = "batremn";
ste,pins = "batremn_d_1";
function = "batremn";
groups = "batremn_d_1";
};
batremn_default_cfg {
ste,pins = "GPIO43";
pins = "GPIO43";
bias-disable;
};
};
@@ -228,11 +194,11 @@ Example board file extract:
service {
service_default_mode: service_default {
service_default_mux {
ste,function = "service";
ste,pins = "service_d_1";
function = "service";
groups = "service_d_1";
};
service_default_cfg {
ste,pins = "GPIO44";
pins = "GPIO44";
bias-disable;
};
};
@@ -240,13 +206,13 @@ Example board file extract:
pwrctrl0 {
pwrctrl0_default_mux: pwrctrl0_mux {
pwrctrl0_default_mux {
ste,function = "pwrctrl";
ste,pins = "pwrctrl0_d_1";
function = "pwrctrl";
groups = "pwrctrl0_d_1";
};
};
pwrctrl0_default_mode: pwrctrl0_default {
pwrctrl0_default_cfg {
ste,pins = "GPIO45";
pins = "GPIO45";
bias-disable;
};
};
@@ -254,13 +220,13 @@ Example board file extract:
pwrctrl1 {
pwrctrl1_default_mux: pwrctrl1_mux {
pwrctrl1_default_mux {
ste,function = "pwrctrl";
ste,pins = "pwrctrl1_d_1";
function = "pwrctrl";
groups = "pwrctrl1_d_1";
};
};
pwrctrl1_default_mode: pwrctrl1_default {
pwrctrl1_default_cfg {
ste,pins = "GPIO46";
pins = "GPIO46";
bias-disable;
};
};
@@ -268,11 +234,11 @@ Example board file extract:
pwmextvibra1 {
pwmextvibra1_default_mode: pwmextvibra1_default {
pwmextvibra1_default_mux {
ste,function = "pwmextvibra";
ste,pins = "pwmextvibra1_d_1";
function = "pwmextvibra";
groups = "pwmextvibra1_d_1";
};
pwmextvibra1_default_cfg {
ste,pins = "GPIO47";
pins = "GPIO47";
bias-disable;
};
};
@@ -280,11 +246,11 @@ Example board file extract:
pwmextvibra2 {
pwmextvibra2_default_mode: pwmextvibra2_default {
pwmextvibra2_default_mux {
ste,function = "pwmextvibra";
ste,pins = "pwmextvibra2_d_1";
function = "pwmextvibra";
groups = "pwmextvibra2_d_1";
};
pwmextvibra1_default_cfg {
ste,pins = "GPIO48";
pins = "GPIO48";
bias-disable;
};
};
@@ -292,11 +258,11 @@ Example board file extract:
gpio51 {
gpio51_default_mode: gpio51_default {
gpio51_default_mux {
ste,function = "gpio";
ste,pins = "gpio51_a_1";
function = "gpio";
groups = "gpio51_a_1";
};
gpio51_default_cfg {
ste,pins = "GPIO51";
pins = "GPIO51";
output-low;
};
};
@@ -304,11 +270,11 @@ Example board file extract:
gpio52 {
gpio52_default_mode: gpio52_default {
gpio52_default_mux {
ste,function = "gpio";
ste,pins = "gpio52_a_1";
function = "gpio";
groups = "gpio52_a_1";
};
gpio52_default_cfg {
ste,pins = "GPIO52";
pins = "GPIO52";
bias-pull-down;
};
};
@@ -316,11 +282,11 @@ Example board file extract:
gpio53 {
gpio53_default_mode: gpio53_default {
gpio53_default_mux {
ste,function = "gpio";
ste,pins = "gpio53_a_1";
function = "gpio";
groups = "gpio53_a_1";
};
gpio53_default_cfg {
ste,pins = "GPIO53";
pins = "GPIO53";
bias-pull-down;
};
};
@@ -328,11 +294,11 @@ Example board file extract:
gpio54 {
gpio54_default_mode: gpio54_default {
gpio54_default_mux {
ste,function = "gpio";
ste,pins = "gpio54_a_1";
function = "gpio";
groups = "gpio54_a_1";
};
gpio54_default_cfg {
ste,pins = "GPIO54";
pins = "GPIO54";
output-low;
};
};
@@ -340,11 +306,11 @@ Example board file extract:
pdmclkdat {
pdmclkdat_default_mode: pdmclkdat_default {
pdmclkdat_default_mux {
ste,function = "pdm";
ste,pins = "pdmclkdat_d_1";
function = "pdm";
groups = "pdmclkdat_d_1";
};
pdmclkdat_default_cfg {
ste,pins = "GPIO55", "GPIO56";
pins = "GPIO55", "GPIO56";
bias-disable;
};
};
MAINTAINERS
+7 -1
View File
@@ -7285,7 +7285,13 @@ PIN CONTROLLER - ATMEL AT91
M: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained
F: drivers/pinctrl/pinctrl-at91.c
F: drivers/pinctrl/pinctrl-at91.*
PIN CONTROLLER - INTEL
M: Mika Westerberg <mika.westerberg@linux.intel.com>
M: Heikki Krogerus <heikki.krogerus@linux.intel.com>
S: Maintained
F: drivers/pinctrl/intel/
PIN CONTROLLER - RENESAS
M: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
arch/arm/boot/dts/ste-ccu8540-pinctrl.dtsi
+32 -32
View File
@@ -16,31 +16,31 @@
uart0 {
uart0_default_mux: uart0_mux {
default_mux {
ste,function = "u0";
ste,pins = "u0_a_1";
function = "u0";
groups = "u0_a_1";
};
};
uart0_default_mode: uart0_default {
default_cfg1 {
ste,pins = "GPIO0", "GPIO2";
pins = "GPIO0", "GPIO2";
ste,config = <&in_pu>;
};
default_cfg2 {
ste,pins = "GPIO1", "GPIO3";
pins = "GPIO1", "GPIO3";
ste,config = <&out_hi>;
};
};
uart0_sleep_mode: uart0_sleep {
sleep_cfg1 {
ste,pins = "GPIO0", "GPIO2";
pins = "GPIO0", "GPIO2";
ste,config = <&slpm_in_pu>;
};
sleep_cfg2 {
ste,pins = "GPIO1", "GPIO3";
pins = "GPIO1", "GPIO3";
ste,config = <&slpm_out_hi>;
};
};
@@ -49,29 +49,29 @@
uart2 {
uart2_default_mode: uart2_default {
default_mux {
ste,function = "u2";
ste,pins = "u2txrx_a_1";
function = "u2";
groups = "u2txrx_a_1";
};
default_cfg1 {
ste,pins = "GPIO120";
pins = "GPIO120";
ste,config = <&in_pu>;
};
default_cfg2 {
ste,pins = "GPIO121";
pins = "GPIO121";
ste,config = <&out_hi>;
};
};
uart2_sleep_mode: uart2_sleep {
sleep_cfg1 {
ste,pins = "GPIO120";
pins = "GPIO120";
ste,config = <&slpm_in_pu>;
};
sleep_cfg2 {
ste,pins = "GPIO121";
pins = "GPIO121";
ste,config = <&slpm_out_hi>;
};
};
@@ -80,21 +80,21 @@
i2c0 {
i2c0_default_mux: i2c_mux {
default_mux {
ste,function = "i2c0";
ste,pins = "i2c0_a_1";
function = "i2c0";
groups = "i2c0_a_1";
};
};
i2c0_default_mode: i2c_default {
default_cfg1 {
ste,pins = "GPIO147", "GPIO148";
pins = "GPIO147", "GPIO148";
ste,config = <&in_pu>;
};
};
i2c0_sleep_mode: i2c_sleep {
sleep_cfg1 {
ste,pins = "GPIO147", "GPIO148";
pins = "GPIO147", "GPIO148";
ste,config = <&slpm_in_pu>;
};
};
@@ -103,21 +103,21 @@
i2c1 {
i2c1_default_mux: i2c_mux {
default_mux {
ste,function = "i2c1";
ste,pins = "i2c1_b_2";
function = "i2c1";
groups = "i2c1_b_2";
};
};
i2c1_default_mode: i2c_default {
default_cfg1 {
ste,pins = "GPIO16", "GPIO17";
pins = "GPIO16", "GPIO17";
ste,config = <&in_pu>;
};
};
i2c1_sleep_mode: i2c_sleep {
sleep_cfg1 {
ste,pins = "GPIO16", "GPIO17";
pins = "GPIO16", "GPIO17";
ste,config = <&slpm_in_pu>;
};
};
@@ -126,21 +126,21 @@
i2c2 {
i2c2_default_mux: i2c_mux {
default_mux {
ste,function = "i2c2";
ste,pins = "i2c2_b_2";
function = "i2c2";
groups = "i2c2_b_2";
};
};
i2c2_default_mode: i2c_default {
default_cfg1 {
ste,pins = "GPIO10", "GPIO11";
pins = "GPIO10", "GPIO11";
ste,config = <&in_pu>;
};
};
i2c2_sleep_mode: i2c_sleep {
sleep_cfg1 {
ste,pins = "GPIO11", "GPIO11";
pins = "GPIO11", "GPIO11";
ste,config = <&slpm_in_pu>;
};
};
@@ -149,21 +149,21 @@
i2c4 {
i2c4_default_mux: i2c_mux {
default_mux {
ste,function = "i2c4";
ste,pins = "i2c4_b_2";
function = "i2c4";
groups = "i2c4_b_2";
};
};
i2c4_default_mode: i2c_default {
default_cfg1 {
ste,pins = "GPIO122", "GPIO123";
pins = "GPIO122", "GPIO123";
ste,config = <&in_pu>;
};
};
i2c4_sleep_mode: i2c_sleep {
sleep_cfg1 {
ste,pins = "GPIO122", "GPIO123";
pins = "GPIO122", "GPIO123";
ste,config = <&slpm_in_pu>;
};
};
@@ -172,21 +172,21 @@
i2c5 {
i2c5_default_mux: i2c_mux {
default_mux {
ste,function = "i2c5";
ste,pins = "i2c5_c_2";
function = "i2c5";
groups = "i2c5_c_2";
};
};
i2c5_default_mode: i2c_default {
default_cfg1 {
ste,pins = "GPIO118", "GPIO119";
pins = "GPIO118", "GPIO119";
ste,config = <&in_pu>;
};
};
i2c5_sleep_mode: i2c_sleep {
sleep_cfg1 {
ste,pins = "GPIO118", "GPIO119";
pins = "GPIO118", "GPIO119";
ste,config = <&slpm_in_pu>;
};
};
arch/arm/boot/dts/ste-href-ab8500.dtsi
+81 -81
View File
@@ -47,11 +47,11 @@
gpio2 {
gpio2_default_mode: gpio2_default {
default_mux {
ste,function = "gpio";
ste,pins = "gpio2_a_1";
function = "gpio";
groups = "gpio2_a_1";
};
default_cfg {
ste,pins = "GPIO2_T9";
pins = "GPIO2_T9";
input-enable;
bias-pull-down;
};
@@ -60,11 +60,11 @@
gpio4 {
gpio4_default_mode: gpio4_default {
default_mux {
ste,function = "gpio";
ste,pins = "gpio4_a_1";
function = "gpio";
groups = "gpio4_a_1";
};
default_cfg {
ste,pins = "GPIO4_W2";
pins = "GPIO4_W2";
input-enable;
bias-pull-down;
};
@@ -73,11 +73,11 @@
gpio10 {
gpio10_default_mode: gpio10_default {
default_mux {
ste,function = "gpio";
ste,pins = "gpio10_d_1";
function = "gpio";
groups = "gpio10_d_1";
};
default_cfg {
ste,pins = "GPIO10_U17";
pins = "GPIO10_U17";
input-enable;
bias-pull-down;
};
@@ -86,11 +86,11 @@
gpio11 {
gpio11_default_mode: gpio11_default {
default_mux {
ste,function = "gpio";
ste,pins = "gpio11_d_1";
function = "gpio";
groups = "gpio11_d_1";
};
default_cfg {
ste,pins = "GPIO11_AA18";
pins = "GPIO11_AA18";
input-enable;
bias-pull-down;
};
@@ -99,11 +99,11 @@
gpio12 {
gpio12_default_mode: gpio12_default {
default_mux {
ste,function = "gpio";
ste,pins = "gpio12_d_1";
function = "gpio";
groups = "gpio12_d_1";
};
default_cfg {
ste,pins = "GPIO12_U16";
pins = "GPIO12_U16";
input-enable;
bias-pull-down;
};
@@ -112,11 +112,11 @@
gpio13 {
gpio13_default_mode: gpio13_default {
default_mux {
ste,function = "gpio";
ste,pins = "gpio13_d_1";
function = "gpio";
groups = "gpio13_d_1";
};
default_cfg {
ste,pins = "GPIO13_W17";
pins = "GPIO13_W17";
input-enable;
bias-pull-down;
};
@@ -125,11 +125,11 @@
gpio16 {
gpio16_default_mode: gpio16_default {
default_mux {
ste,function = "gpio";
ste,pins = "gpio16_a_1";
function = "gpio";
groups = "gpio16_a_1";
};
default_cfg {
ste,pins = "GPIO16_F15";
pins = "GPIO16_F15";
input-enable;
bias-pull-down;
};
@@ -138,11 +138,11 @@
gpio24 {
gpio24_default_mode: gpio24_default {
default_mux {
ste,function = "gpio";
ste,pins = "gpio24_a_1";
function = "gpio";
groups = "gpio24_a_1";
};
default_cfg {
ste,pins = "GPIO24_T14";
pins = "GPIO24_T14";
input-enable;
bias-pull-down;
};
@@ -151,11 +151,11 @@
gpio25 {
gpio25_default_mode: gpio25_default {
default_mux {
ste,function = "gpio";
ste,pins = "gpio25_a_1";
function = "gpio";
groups = "gpio25_a_1";
};
default_cfg {
ste,pins = "GPIO25_R16";
pins = "GPIO25_R16";
input-enable;
bias-pull-down;
};
@@ -164,11 +164,11 @@
gpio36 {
gpio36_default_mode: gpio36_default {
default_mux {
ste,function = "gpio";
ste,pins = "gpio36_a_1";
function = "gpio";
groups = "gpio36_a_1";
};
default_cfg {
ste,pins = "GPIO36_A17";
pins = "GPIO36_A17";
input-enable;
bias-pull-down;
};
@@ -177,11 +177,11 @@
gpio37 {
gpio37_default_mode: gpio37_default {
default_mux {
ste,function = "gpio";
ste,pins = "gpio37_a_1";
function = "gpio";
groups = "gpio37_a_1";
};
default_cfg {
ste,pins = "GPIO37_E15";
pins = "GPIO37_E15";
input-enable;
bias-pull-down;
};
@@ -190,11 +190,11 @@
gpio38 {
gpio38_default_mode: gpio38_default {
default_mux {
ste,function = "gpio";
ste,pins = "gpio38_a_1";
function = "gpio";
groups = "gpio38_a_1";
};
default_cfg {
ste,pins = "GPIO38_C17";
pins = "GPIO38_C17";
input-enable;
bias-pull-down;
};
@@ -203,11 +203,11 @@
gpio39 {
gpio39_default_mode: gpio39_default {
default_mux {
ste,function = "gpio";
ste,pins = "gpio39_a_1";
function = "gpio";
groups = "gpio39_a_1";
};
default_cfg {
ste,pins = "GPIO39_E16";
pins = "GPIO39_E16";
input-enable;
bias-pull-down;
};
@@ -216,11 +216,11 @@
gpio42 {
gpio42_default_mode: gpio42_default {
default_mux {
ste,function = "gpio";
ste,pins = "gpio42_a_1";
function = "gpio";
groups = "gpio42_a_1";
};
default_cfg {
ste,pins = "GPIO42_U2";
pins = "GPIO42_U2";
input-enable;
bias-pull-down;
};
@@ -232,11 +232,11 @@
gpio26 {
gpio26_default_mode: gpio26_default {
default_mux {
ste,function = "gpio";
ste,pins = "gpio26_d_1";
function = "gpio";
groups = "gpio26_d_1";
};
default_cfg {
ste,pins = "GPIO26_M16";
pins = "GPIO26_M16";
output-low;
};
};
@@ -244,11 +244,11 @@
gpio35 {
gpio35_default_mode: gpio35_default {
default_mux {
ste,function = "gpio";
ste,pins = "gpio35_d_1";
function = "gpio";
groups = "gpio35_d_1";
};
default_cfg {
ste,pins = "GPIO35_W15";
pins = "GPIO35_W15";
output-low;
};
};
@@ -260,11 +260,11 @@
ycbcr {
ycbcr_default_mode: ycbcr_default {
default_mux {
ste,function = "ycbcr";
ste,pins = "ycbcr0123_d_1";
function = "ycbcr";
groups = "ycbcr0123_d_1";
};
default_cfg {
ste,pins = "GPIO6_Y18",
pins = "GPIO6_Y18",
"GPIO7_AA20",
"GPIO8_W18",
"GPIO9_AA19";
@@ -277,11 +277,11 @@
pwm {
pwm_default_mode: pwm_default {
default_mux {
ste,function = "pwmout";
ste,pins = "pwmout1_d_1", "pwmout2_d_1";
function = "pwmout";
groups = "pwmout1_d_1", "pwmout2_d_1";
};
default_cfg {
ste,pins = "GPIO14_F14",
pins = "GPIO14_F14",
"GPIO15_B17";
input-enable;
bias-pull-down;
@@ -292,11 +292,11 @@
adi1 {
adi1_default_mode: adi1_default {
default_mux {
ste,function = "adi1";
ste,pins = "adi1_d_1";
function = "adi1";
groups = "adi1_d_1";
};
default_cfg {
ste,pins = "GPIO17_P5",
pins = "GPIO17_P5",
"GPIO18_R5",
"GPIO19_U5",
"GPIO20_T5";
@@ -309,11 +309,11 @@
usbuicc {
usbuicc_default_mode: usbuicc_default {
default_mux {
ste,function = "usbuicc";
ste,pins = "usbuicc_d_1";
function = "usbuicc";
groups = "usbuicc_d_1";
};
default_cfg {
ste,pins = "GPIO21_H19",
pins = "GPIO21_H19",
"GPIO22_G20",
"GPIO23_G19";
input-enable;
@@ -325,13 +325,13 @@
dmic {
dmic_default_mode: dmic_default {
default_mux {
ste,function = "dmic";
ste,pins = "dmic12_d_1",
function = "dmic";
groups = "dmic12_d_1",
"dmic34_d_1",
"dmic56_d_1";
};
default_cfg {
ste,pins = "GPIO27_J6",
pins = "GPIO27_J6",
"GPIO28_K6",
"GPIO29_G6",
"GPIO30_H6",
@@ -345,11 +345,11 @@
extcpena {
extcpena_default_mode: extcpena_default {
default_mux {
ste,function = "extcpena";
ste,pins = "extcpena_d_1";
function = "extcpena";
groups = "extcpena_d_1";
};
default_cfg {
ste,pins = "GPIO34_R17";
pins = "GPIO34_R17";
input-enable;
bias-pull-down;
};
@@ -359,11 +359,11 @@
modsclsda {
modsclsda_default_mode: modsclsda_default {
default_mux {
ste,function = "modsclsda";
ste,pins = "modsclsda_d_1";
function = "modsclsda";
groups = "modsclsda_d_1";
};
default_cfg {
ste,pins = "GPIO40_T19",
pins = "GPIO40_T19",
"GPIO41_U19";
input-enable;
bias-pull-down;
@@ -376,22 +376,22 @@
sysclkreq2 {
sysclkreq2_default_mode: sysclkreq2_default {
default_mux {
ste,function = "sysclkreq";
ste,pins = "sysclkreq2_d_1";
function = "sysclkreq";
groups = "sysclkreq2_d_1";
};
default_cfg {
ste,pins = "GPIO1_T10";
pins = "GPIO1_T10";
input-enable;
bias-disable;
};
};
sysclkreq2_sleep_mode: sysclkreq2_sleep {
default_mux {
ste,function = "gpio";
ste,pins = "gpio1_a_1";
function = "gpio";
groups = "gpio1_a_1";
};
default_cfg {
ste,pins = "GPIO1_T10";
pins = "GPIO1_T10";
input-enable;
bias-pull-down;
};
@@ -400,22 +400,22 @@
sysclkreq4 {
sysclkreq4_default_mode: sysclkreq4_default {
default_mux {
ste,function = "sysclkreq";
ste,pins = "sysclkreq4_d_1";
function = "sysclkreq";
groups = "sysclkreq4_d_1";
};
default_cfg {
ste,pins = "GPIO3_U9";
pins = "GPIO3_U9";
input-enable;
bias-disable;
};
};
sysclkreq4_sleep_mode: sysclkreq4_sleep {
default_mux {
ste,function = "gpio";
ste,pins = "gpio3_a_1";
function = "gpio";
groups = "gpio3_a_1";
};
default_cfg {
ste,pins = "GPIO3_U9";
pins = "GPIO3_U9";
input-enable;
bias-pull-down;
};
arch/arm/boot/dts/ste-href-ab8505.dtsi
+45 -45
View File
@@ -35,11 +35,11 @@
gpio2 {
gpio2_default_mode: gpio2_default {
default_mux {
ste,function = "gpio";
ste,pins = "gpio2_a_1";
function = "gpio";
groups = "gpio2_a_1";
};
default_cfg {
ste,pins = "GPIO2_R5";
pins = "GPIO2_R5";
input-enable;
bias-pull-down;
};
@@ -48,11 +48,11 @@
gpio10 {
gpio10_default_mode: gpio10_default {
default_mux {
ste,function = "gpio";
ste,pins = "gpio10_d_1";
function = "gpio";
groups = "gpio10_d_1";
};
default_cfg {
ste,pins = "GPIO10_B16";
pins = "GPIO10_B16";
input-enable;
bias-pull-down;
};
@@ -61,11 +61,11 @@
gpio11 {
gpio11_default_mode: gpio11_default {
default_mux {
ste,function = "gpio";
ste,pins = "gpio11_d_1";
function = "gpio";
groups = "gpio11_d_1";
};
default_cfg {
ste,pins = "GPIO11_B17";
pins = "GPIO11_B17";
input-enable;
bias-pull-down;
};
@@ -74,11 +74,11 @@
gpio13 {
gpio13_default_mode: gpio13_default {
default_mux {
ste,function = "gpio";
ste,pins = "gpio13_d_1";
function = "gpio";
groups = "gpio13_d_1";
};
default_cfg {
ste,pins = "GPIO13_D17";
pins = "GPIO13_D17";
input-enable;
bias-disable;
};
@@ -87,11 +87,11 @@
gpio34 {
gpio34_default_mode: gpio34_default {
default_mux {
ste,function = "gpio";
ste,pins = "gpio34_a_1";
function = "gpio";
groups = "gpio34_a_1";
};
default_cfg {
ste,pins = "GPIO34_H14";
pins = "GPIO34_H14";
input-enable;
bias-pull-down;
};
@@ -100,11 +100,11 @@
gpio50 {
gpio50_default_mode: gpio50_default {
default_mux {
ste,function = "gpio";
ste,pins = "gpio50_d_1";
function = "gpio";
groups = "gpio50_d_1";
};
default_cfg {
ste,pins = "GPIO50_L4";
pins = "GPIO50_L4";
input-enable;
bias-disable;
};
@@ -114,11 +114,11 @@
pwm {
pwm_default_mode: pwm_default {
default_mux {
ste,function = "pwmout";
ste,pins = "pwmout1_d_1";
function = "pwmout";
groups = "pwmout1_d_1";
};
default_cfg {
ste,pins = "GPIO14_C16";
pins = "GPIO14_C16";
input-enable;
bias-pull-down;
};
@@ -128,11 +128,11 @@
adi2 {
adi2_default_mode: adi2_default {
default_mux {
ste,function = "adi2";
ste,pins = "adi2_d_1";
function = "adi2";
groups = "adi2_d_1";
};
default_cfg {
ste,pins = "GPIO17_P2",
pins = "GPIO17_P2",
"GPIO18_N3",
"GPIO19_T1",
"GPIO20_P3";
@@ -145,11 +145,11 @@
modsclsda {
modsclsda_default_mode: modsclsda_default {
default_mux {
ste,function = "modsclsda";
ste,pins = "modsclsda_d_1";
function = "modsclsda";
groups = "modsclsda_d_1";
};
default_cfg {
ste,pins = "GPIO40_J15",
pins = "GPIO40_J15",
"GPIO41_J14";
input-enable;
bias-pull-down;
@@ -159,11 +159,11 @@
resethw {
resethw_default_mode: resethw_default {
default_mux {
ste,function = "resethw";
ste,pins = "resethw_d_1";
function = "resethw";
groups = "resethw_d_1";
};
default_cfg {
ste,pins = "GPIO52_D16";
pins = "GPIO52_D16";
input-enable;
bias-pull-down;
};
@@ -172,11 +172,11 @@
service {
service_default_mode: service_default {
default_mux {
ste,function = "service";
ste,pins = "service_d_1";
function = "service";
groups = "service_d_1";
};
default_cfg {
ste,pins = "GPIO53_D15";
pins = "GPIO53_D15";
input-enable;
bias-pull-down;
};
@@ -188,22 +188,22 @@
sysclkreq2 {
sysclkreq2_default_mode: sysclkreq2_default {
default_mux {
ste,function = "sysclkreq";
ste,pins = "sysclkreq2_d_1";
function = "sysclkreq";
groups = "sysclkreq2_d_1";
};
default_cfg {
ste,pins = "GPIO1_N4";
pins = "GPIO1_N4";
input-enable;
bias-disable;
};
};
sysclkreq2_sleep_mode: sysclkreq2_sleep {
default_mux {
ste,function = "gpio";
ste,pins = "gpio1_a_1";
function = "gpio";
groups = "gpio1_a_1";
};
default_cfg {
ste,pins = "GPIO1_N4";
pins = "GPIO1_N4";
input-enable;
bias-pull-down;
};
@@ -212,22 +212,22 @@
sysclkreq4 {
sysclkreq4_default_mode: sysclkreq4_default {
default_mux {
ste,function = "sysclkreq";
ste,pins = "sysclkreq4_d_1";
function = "sysclkreq";
groups = "sysclkreq4_d_1";
};
default_cfg {
ste,pins = "GPIO3_P5";
pins = "GPIO3_P5";
input-enable;
bias-disable;
};
};
sysclkreq4_sleep_mode: sysclkreq4_sleep {
default_mux {
ste,function = "gpio";
ste,pins = "gpio3_a_1";
function = "gpio";
groups = "gpio3_a_1";
};
default_cfg {
ste,pins = "GPIO3_P5";
pins = "GPIO3_P5";
input-enable;
bias-pull-down;
};
arch/arm/boot/dts/ste-href-family-pinctrl.dtsi
+115 -115
View File
File diff suppressed because it is too large Load Diff
arch/arm/boot/dts/ste-href-stuib.dtsi
+2 -2
View File
@@ -103,7 +103,7 @@
prox {
prox_stuib_mode: prox_stuib {
stuib_cfg {
ste,pins = "GPIO217_AH12";
pins = "GPIO217_AH12";
ste,config = <&gpio_in_pu>;
};
};
@@ -111,7 +111,7 @@
hall {
hall_stuib_mode: stuib_tvk {
stuib_cfg {
ste,pins = "GPIO145_C13";
pins = "GPIO145_C13";
ste,config = <&gpio_in_pu>;
};
};
arch/arm/boot/dts/ste-href-tvk1281618.dtsi
+6 -6
View File
@@ -130,7 +130,7 @@
tc35893 {
tc35893_tvk_mode: tc35893_tvk {
tvk_cfg {
ste,pins = "GPIO218_AH11";
pins = "GPIO218_AH11";
ste,config = <&gpio_in_pu>;
};
};
@@ -138,7 +138,7 @@
prox {
prox_tvk_mode: prox_tvk {
tvk_cfg {
ste,pins = "GPIO217_AH12";
pins = "GPIO217_AH12";
ste,config = <&gpio_in_pu>;
};
};
@@ -146,7 +146,7 @@
hall {
hall_tvk_mode: hall_tvk {
tvk_cfg {
ste,pins = "GPIO145_C13";
pins = "GPIO145_C13";
ste,config = <&gpio_in_pu>;
};
};
@@ -155,7 +155,7 @@
accel_tvk_mode: accel_tvk {
/* Accelerometer interrupt lines 1 & 2 */
tvk_cfg {
ste,pins = "GPIO82_C1", "GPIO83_D3";
pins = "GPIO82_C1", "GPIO83_D3";
ste,config = <&gpio_in_pu>;
};
};
@@ -164,11 +164,11 @@
magneto_tvk_mode: magneto_tvk {
/* Magnetometer uses GPIO 31 and 32, pull these up/down respectively */
tvk_cfg1 {
ste,pins = "GPIO31_V3";
pins = "GPIO31_V3";
ste,config = <&gpio_in_pu>;
};
tvk_cfg2 {
ste,pins = "GPIO32_V2";
pins = "GPIO32_V2";
ste,config = <&gpio_in_pd>;
};
};
arch/arm/boot/dts/ste-hrefprev60.dtsi
+10 -10
View File
@@ -79,11 +79,11 @@
ssp0 {
ssp0_hrefprev60_mode: ssp0_hrefprev60_default {
hrefprev60_mux {
ste,function = "ssp0";
ste,pins = "ssp0_a_1";
function = "ssp0";
groups = "ssp0_a_1";
};
hrefprev60_cfg1 {
ste,pins = "GPIO145_C13"; /* RXD */
pins = "GPIO145_C13"; /* RXD */
ste,config = <&in_pd>;
};
@@ -93,11 +93,11 @@
/* This additional pin needed on early MOP500 and HREFs previous to v60 */
sdi0_default_mode: sdi0_default {
hrefprev60_mux {
ste,function = "mc0";
ste,pins = "mc0dat31dir_a_1";
function = "mc0";
groups = "mc0dat31dir_a_1";
};
hrefprev60_cfg1 {
ste,pins = "GPIO21_AB3"; /* DAT31DIR */
pins = "GPIO21_AB3"; /* DAT31DIR */
ste,config = <&out_hi>;
};
@@ -106,7 +106,7 @@
tc35892 {
tc35892_hrefprev60_mode: tc35892_hrefprev60 {
hrefprev60_cfg {
ste,pins = "GPIO217_AH12";
pins = "GPIO217_AH12";
ste,config = <&gpio_in_pu>;
};
};
@@ -114,11 +114,11 @@
ipgpio {
ipgpio_hrefprev60_mode: ipgpio_hrefprev60 {
hrefprev60_mux {
ste,function = "ipgpio";
ste,pins = "ipgpio0_c_1", "ipgpio1_c_1";
function = "ipgpio";
groups = "ipgpio0_c_1", "ipgpio1_c_1";
};
hrefprev60_cfg1 {
ste,pins = "GPIO6_AF6", "GPIO7_AG5";
pins = "GPIO6_AF6", "GPIO7_AG5";
ste,config = <&in_pu>;
};
};
arch/arm/boot/dts/ste-hrefv60plus.dtsi
+21 -21
View File
@@ -49,7 +49,7 @@
/* SD card detect GPIO pin, extend default state */
sdi0_default_mode: sdi0_default {
default_hrefv60_cfg1 {
ste,pins = "GPIO95_E8";
pins = "GPIO95_E8";
ste,config = <&gpio_in_pu>;
};
};
@@ -64,19 +64,19 @@
*/
ipgpio_hrefv60_mode: ipgpio_hrefv60 {
hrefv60_mux {
ste,function = "ipgpio";
ste,pins = "ipgpio0_c_1", "ipgpio1_c_1", "ipgpio4_c_1";
function = "ipgpio";
groups = "ipgpio0_c_1", "ipgpio1_c_1", "ipgpio4_c_1";
};
hrefv60_cfg1 {
ste,pins = "GPIO6_AF6", "GPIO7_AG5";
pins = "GPIO6_AF6", "GPIO7_AG5";
ste,config = <&in_pu>;
};
hrefv60_cfg2 {
ste,pins = "GPIO21_AB3";
pins = "GPIO21_AB3";
ste,config = <&gpio_out_lo>;
};
hrefv60_cfg3 {
ste,pins = "GPIO64_F3";
pins = "GPIO64_F3";
ste,config = <&out_lo>;
};
};
@@ -89,7 +89,7 @@
*/
etm_hrefv60_mode: etm_hrefv60 {
hrefv60_cfg1 {
ste,pins =
pins =
"GPIO70_G5",
"GPIO71_G4",
"GPIO72_H4",
@@ -103,11 +103,11 @@
nahj_hrefv60_mode: nahj_hrefv60 {
/* NAHJ CTRL on GPIO76 to low, CTRL_INV on GPIO216 to high */
hrefv60_cfg1 {
ste,pins = "GPIO76_J2";
pins = "GPIO76_J2";
ste,config = <&gpio_out_lo>;
};
hrefv60_cfg2 {
ste,pins = "GPIO216_AG12";
pins = "GPIO216_AG12";
ste,config = <&gpio_out_hi>;
};
};
@@ -116,13 +116,13 @@
nfc_hrefv60_mode: nfc_hrefv60 {
/* NFC ENA and RESET to low, pulldown IRQ line */
hrefv60_cfg1 {
ste,pins =
pins =
"GPIO77_H1", /* NFC_ENA */
"GPIO142_C11"; /* NFC_RESET */
ste,config = <&gpio_out_lo>;
};
hrefv60_cfg2 {
ste,pins = "GPIO144_B13"; /* NFC_IRQ */
pins = "GPIO144_B13"; /* NFC_IRQ */
ste,config = <&gpio_in_pd>;
};
};
@@ -130,11 +130,11 @@
force {
force_hrefv60_mode: force_hrefv60 {
hrefv60_cfg1 {
ste,pins = "GPIO91_B6"; /* FORCE_SENSING_INT */
pins = "GPIO91_B6"; /* FORCE_SENSING_INT */
ste,config = <&gpio_in_pu>;
};
hrefv60_cfg2 {
ste,pins =
pins =
"GPIO92_D6", /* FORCE_SENSING_RST */
"GPIO97_D9"; /* FORCE_SENSING_WU */
ste,config = <&gpio_out_lo>;
@@ -144,7 +144,7 @@
dipro {
dipro_hrefv60_mode: dipro_hrefv60 {
hrefv60_cfg1 {
ste,pins = "GPIO139_C9"; /* DIPRO_INT */
pins = "GPIO139_C9"; /* DIPRO_INT */
ste,config = <&gpio_in_pu>;
};
};
@@ -153,7 +153,7 @@
vaudio_hf_hrefv60_mode: vaudio_hf_hrefv60 {
/* Audio Amplifier HF enable GPIO */
hrefv60_cfg1 {
ste,pins = "GPIO149_B14"; /* VAUDIO_HF_EN, enable MAX8968 */
pins = "GPIO149_B14"; /* VAUDIO_HF_EN, enable MAX8968 */
ste,config = <&gpio_out_hi>;
};
};
@@ -165,7 +165,7 @@
* pull low to reset state
*/
hrefv60_cfg1 {
ste,pins = "GPIO171_D23"; /* GBF_ENA_RESET */
pins = "GPIO171_D23"; /* GBF_ENA_RESET */
ste,config = <&gpio_out_lo>;
};
};
@@ -174,7 +174,7 @@
hdtv_hrefv60_mode: hdtv_hrefv60 {
/* MSP : HDTV INTERFACE GPIO line */
hrefv60_cfg1 {
ste,pins = "GPIO192_AJ27";
pins = "GPIO192_AJ27";
ste,config = <&gpio_in_pd>;
};
};
@@ -187,11 +187,11 @@
* reset signals low.
*/
hrefv60_cfg1 {
ste,pins = "GPIO143_D12", "GPIO146_D13";
pins = "GPIO143_D12", "GPIO146_D13";
ste,config = <&gpio_out_lo>;
};
hrefv60_cfg2 {
ste,pins = "GPIO67_G2";
pins = "GPIO67_G2";
ste,config = <&gpio_in_pu>;
};
};
@@ -204,11 +204,11 @@
* Drive DISP1 reset high (not reset), driver DISP2 reset low (reset)
*/
hrefv60_cfg1 {
ste,pins ="GPIO65_F1";
pins ="GPIO65_F1";
ste,config = <&gpio_out_hi>;
};
hrefv60_cfg2 {
ste,pins ="GPIO66_G3";
pins ="GPIO66_G3";
ste,config = <&gpio_out_lo>;
};
};
arch/arm/boot/dts/ste-nomadik-s8815.dts
+5 -5
View File
@@ -30,12 +30,12 @@
cd_default_mode: cd_default {
cd_default_cfg1 {
/* CD input GPIO */
ste,pins = "GPIO111_H21";
pins = "GPIO111_H21";
ste,input = <0>;
};
cd_default_cfg2 {
/* CD GPIO biasing */
ste,pins = "GPIO112_J21";
pins = "GPIO112_J21";
ste,output = <0>;
};
};
@@ -43,7 +43,7 @@
gpioi2c {
gpioi2c_default_mode: gpioi2c_default {
gpioi2c_default_cfg {
ste,pins = "GPIO73_C21", "GPIO74_C20";
pins = "GPIO73_C21", "GPIO74_C20";
ste,input = <0>;
};
};
@@ -51,7 +51,7 @@
user-led {
user_led_default_mode: user_led_default {
user_led_default_cfg {
ste,pins = "GPIO2_C5";
pins = "GPIO2_C5";
ste,output = <1>;
};
};
@@ -59,7 +59,7 @@
user-button {
user_button_default_mode: user_button_default {
user_button_default_cfg {
ste,pins = "GPIO3_A4";
pins = "GPIO3_A4";
ste,input = <0>;
};
};
arch/arm/boot/dts/ste-nomadik-stn8815.dtsi
+15 -15
View File
@@ -100,41 +100,41 @@
uart0 {
uart0_default_mux: uart0_mux {
u0_default_mux {
ste,function = "u0";
ste,pins = "u0_a_1";
function = "u0";
groups = "u0_a_1";
};
};
};
uart1 {
uart1_default_mux: uart1_mux {
u1_default_mux {
ste,function = "u1";
ste,pins = "u1_a_1";
function = "u1";
groups = "u1_a_1";
};
};
};
mmcsd {
mmcsd_default_mux: mmcsd_mux {
mmcsd_default_mux {
ste,function = "mmcsd";
ste,pins = "mmcsd_a_1", "mmcsd_b_1";
function = "mmcsd";
groups = "mmcsd_a_1", "mmcsd_b_1";
};
};
mmcsd_default_mode: mmcsd_default {
mmcsd_default_cfg1 {
/* MCCLK */
ste,pins = "GPIO8_B10";
pins = "GPIO8_B10";
ste,output = <0>;
};
mmcsd_default_cfg2 {
/* MCCMDDIR, MCDAT0DIR, MCDAT31DIR, MCDATDIR2 */
ste,pins = "GPIO10_C11", "GPIO15_A12",
pins = "GPIO10_C11", "GPIO15_A12",
"GPIO16_C13", "GPIO23_D15";
ste,output = <1>;
};
mmcsd_default_cfg3 {
/* MCCMD, MCDAT3-0, MCMSFBCLK */
ste,pins = "GPIO9_A10", "GPIO11_B11",
pins = "GPIO9_A10", "GPIO11_B11",
"GPIO12_A11", "GPIO13_C12",
"GPIO14_B12", "GPIO24_C15";
ste,input = <1>;
@@ -144,13 +144,13 @@
i2c0 {
i2c0_default_mux: i2c0_mux {
i2c0_default_mux {
ste,function = "i2c0";
ste,pins = "i2c0_a_1";
function = "i2c0";
groups = "i2c0_a_1";
};
};
i2c0_default_mode: i2c0_default {
i2c0_default_cfg {
ste,pins = "GPIO62_D3", "GPIO63_D2";
pins = "GPIO62_D3", "GPIO63_D2";
ste,input = <0>;
};
};
@@ -158,13 +158,13 @@
i2c1 {
i2c1_default_mux: i2c1_mux {
i2c1_default_mux {
ste,function = "i2c1";
ste,pins = "i2c1_a_1";
function = "i2c1";
groups = "i2c1_a_1";
};
};
i2c1_default_mode: i2c1_default {
i2c1_default_cfg {
ste,pins = "GPIO53_L4", "GPIO54_L3";
pins = "GPIO53_L4", "GPIO54_L3";
ste,input = <0>;
};
};
arch/arm/boot/dts/ste-snowball.dts
+18 -18
View File
@@ -404,17 +404,17 @@
*/
eth_snowball_mode: eth_snowball {
snowball_mux {
ste,function = "sm";
ste,pins = "sm_b_1";
function = "sm";
groups = "sm_b_1";
};
/* LAN IRQ pin */
snowball_cfg1 {
ste,pins = "GPIO140_B11";
pins = "GPIO140_B11";
ste,config = <&in_nopull>;
};
/* LAN reset pin */
snowball_cfg2 {
ste,pins = "GPIO141_C12";
pins = "GPIO141_C12";
ste,config = <&gpio_out_hi>;
};
@@ -423,11 +423,11 @@
sdi0 {
sdi0_default_mode: sdi0_default {
snowball_mux {
ste,function = "mc0";
ste,pins = "mc0dat31dir_a_1";
function = "mc0";
groups = "mc0dat31dir_a_1";
};
snowball_cfg1 {
ste,pins = "GPIO21_AB3"; /* DAT31DIR */
pins = "GPIO21_AB3"; /* DAT31DIR */
ste,config = <&out_hi>;
};
@@ -436,19 +436,19 @@
ssp0 {
ssp0_snowball_mode: ssp0_snowball_default {
snowball_mux {
ste,function = "ssp0";
ste,pins = "ssp0_a_1";
function = "ssp0";
groups = "ssp0_a_1";
};
snowball_cfg1 {
ste,pins = "GPIO144_B13"; /* FRM */
pins = "GPIO144_B13"; /* FRM */
ste,config = <&gpio_out_hi>;
};
snowball_cfg2 {
ste,pins = "GPIO145_C13"; /* RXD */
pins = "GPIO145_C13"; /* RXD */
ste,config = <&in_pd>;
};
snowball_cfg3 {
ste,pins =
pins =
"GPIO146_D13", /* TXD */
"GPIO143_D12"; /* CLK */
ste,config = <&out_lo>;
@@ -459,7 +459,7 @@
gpio_led {
gpioled_snowball_mode: gpioled_default {
snowball_cfg1 {
ste,pins = "GPIO142_C11";
pins = "GPIO142_C11";
ste,config = <&gpio_out_hi>;
};
@@ -469,7 +469,7 @@
accel_snowball_mode: accel_snowball {
/* Accelerometer lines */
snowball_cfg1 {
ste,pins =
pins =
"GPIO163_C20", /* ACCEL_IRQ1 */
"GPIO164_B21"; /* ACCEL_IRQ2 */
ste,config = <&gpio_in_pu>;
@@ -479,7 +479,7 @@
magnetometer {
magneto_snowball_mode: magneto_snowball {
snowball_cfg1 {
ste,pins = "GPIO165_C21"; /* MAG_DRDY */
pins = "GPIO165_C21"; /* MAG_DRDY */
ste,config = <&gpio_in_pu>;
};
};
@@ -491,7 +491,7 @@
* pull low to reset state
*/
snowball_cfg1 {
ste,pins = "GPIO171_D23"; /* GBF_ENA_RESET */
pins = "GPIO171_D23"; /* GBF_ENA_RESET */
ste,config = <&gpio_out_lo>;
};
};
@@ -503,13 +503,13 @@
* These are plain GPIO pins used by WLAN
*/
snowball_cfg1 {
ste,pins =
pins =
"GPIO161_D21", /* WLAN_PMU_EN */
"GPIO215_AH13"; /* WLAN_ENA */
ste,config = <&gpio_out_lo>;
};
snowball_cfg2 {
ste,pins = "GPIO216_AG12"; /* WLAN_IRQ */
pins = "GPIO216_AG12"; /* WLAN_IRQ */
ste,config = <&gpio_in_pu>;
};
};
drivers/gpio/gpio-tz1090.c
+1 -1
View File
@@ -446,7 +446,7 @@ static int tz1090_gpio_bank_probe(struct tz1090_gpio_bank_info *info)
bank->irq = irq_of_parse_and_map(np, 0);
/* The interrupt is optional (it may be used by another core on chip) */
if (bank->irq < 0) {
if (!bank->irq) {
dev_info(dev, "IRQ not provided for bank %u, IRQs disabled\n",
info->index);
return 0;

Some files were not shown because too many files have changed in this diff Show More