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Merge tag 'dt-exynos-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/dt2
update device tree for exynos4 and exynos5 * tag 'dt-exynos-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: (125 commits) ARM: dts: add PDMA0 changes for exynos5440 ARM: dts: Add cpufreq controller node for Exynos5440 SoC ARM: dts: Fix gmac clock ids due to changes in Exynos5440 ARM: dts: add device tree file for SD5v1 board ARM: dts: update bootargs to boot from sda2 for exynos5440-ssdk5440 ARM: dts: add PMU support in exynos5440 ARM: dts: Add node for GMAC for exynos5440 ARM: dts: list the interrupts generated by pin-controller on Exynos5440 ARM: dts: Add FIMD DT binding Documentation ARM: dts: Add FIMD node and display timing node to exynos4412-origen.dts ARM: dts: Add FIMD node to exynos4 ARM: dts: Add SYSREG block node for S5P/Exynos4 SoC series ARM: dts: Add display timing node to exynos5250-smdk5250.dts ARM: dts: Add FIMD node to exynos5 ARM: dts: Add virtual GIC DT bindings for exynos5440 ARM: dts: Document usb clocks in samsung,exynos4210-ehci/ohci bindings ARM: dts: add usb 2.0 clock references to exynos5250 device tree ARM: dts: Add architected timer nodes for exynos5250 ARM: dts: Declare the gic as a15 compatible for exynos5250 ARM: dts: Add HDMI HPD and regulator node for Arndale board ... Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
@@ -0,0 +1,7 @@
|
||||
SAMSUNG S5P/Exynos SoC series System Registers (SYSREG)
|
||||
|
||||
Properties:
|
||||
- name : should be 'sysreg';
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||||
- compatible : should contain "samsung,<chip name>-sysreg", "syscon";
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||||
For Exynos4 SoC series it should be "samsung,exynos4-sysreg", "syscon";
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||||
- reg : offset and length of the register set.
|
||||
@@ -0,0 +1,288 @@
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||||
* Samsung Exynos4 Clock Controller
|
||||
|
||||
The Exynos4 clock controller generates and supplies clock to various controllers
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||||
within the Exynos4 SoC. The clock binding described here is applicable to all
|
||||
SoC's in the Exynos4 family.
|
||||
|
||||
Required Properties:
|
||||
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||||
- comptible: should be one of the following.
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||||
- "samsung,exynos4210-clock" - controller compatible with Exynos4210 SoC.
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- "samsung,exynos4412-clock" - controller compatible with Exynos4412 SoC.
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||||
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||||
- reg: physical base address of the controller and length of memory mapped
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region.
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- #clock-cells: should be 1.
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||||
The following is the list of clocks generated by the controller. Each clock is
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||||
assigned an identifier and client nodes use this identifier to specify the
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clock which they consume. Some of the clocks are available only on a particular
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Exynos4 SoC and this is specified where applicable.
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||||
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[Core Clocks]
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||||
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Clock ID SoC (if specific)
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||||
-----------------------------------------------
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xxti 1
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xusbxti 2
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fin_pll 3
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||||
fout_apll 4
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||||
fout_mpll 5
|
||||
fout_epll 6
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||||
fout_vpll 7
|
||||
sclk_apll 8
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||||
sclk_mpll 9
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sclk_epll 10
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sclk_vpll 11
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arm_clk 12
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aclk200 13
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aclk100 14
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aclk160 15
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aclk133 16
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mout_mpll_user_t 17 Exynos4x12
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mout_mpll_user_c 18 Exynos4x12
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mout_core 19
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mout_apll 20
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[Clock Gate for Special Clocks]
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Clock ID SoC (if specific)
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-----------------------------------------------
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sclk_fimc0 128
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sclk_fimc1 129
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sclk_fimc2 130
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sclk_fimc3 131
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sclk_cam0 132
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sclk_cam1 133
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sclk_csis0 134
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sclk_csis1 135
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sclk_hdmi 136
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sclk_mixer 137
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sclk_dac 138
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sclk_pixel 139
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sclk_fimd0 140
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sclk_mdnie0 141 Exynos4412
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sclk_mdnie_pwm0 12 142 Exynos4412
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sclk_mipi0 143
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sclk_audio0 144
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sclk_mmc0 145
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sclk_mmc1 146
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sclk_mmc2 147
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sclk_mmc3 148
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sclk_mmc4 149
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sclk_sata 150 Exynos4210
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sclk_uart0 151
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sclk_uart1 152
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sclk_uart2 153
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sclk_uart3 154
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sclk_uart4 155
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sclk_audio1 156
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sclk_audio2 157
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sclk_spdif 158
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sclk_spi0 159
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sclk_spi1 160
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sclk_spi2 161
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sclk_slimbus 162
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sclk_fimd1 163 Exynos4210
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sclk_mipi1 164 Exynos4210
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sclk_pcm1 165
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sclk_pcm2 166
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sclk_i2s1 167
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sclk_i2s2 168
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sclk_mipihsi 169 Exynos4412
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sclk_mfc 170
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sclk_pcm0 171
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sclk_g3d 172
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sclk_pwm_isp 173 Exynos4x12
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sclk_spi0_isp 174 Exynos4x12
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sclk_spi1_isp 175 Exynos4x12
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sclk_uart_isp 176 Exynos4x12
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[Peripheral Clock Gates]
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Clock ID SoC (if specific)
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-----------------------------------------------
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fimc0 256
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fimc1 257
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fimc2 258
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fimc3 259
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csis0 260
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csis1 261
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jpeg 262
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smmu_fimc0 263
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smmu_fimc1 264
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smmu_fimc2 265
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smmu_fimc3 266
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smmu_jpeg 267
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vp 268
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mixer 269
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tvenc 270 Exynos4210
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hdmi 271
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smmu_tv 272
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mfc 273
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smmu_mfcl 274
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smmu_mfcr 275
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g3d 276
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g2d 277 Exynos4210
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rotator 278 Exynos4210
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mdma 279 Exynos4210
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smmu_g2d 280 Exynos4210
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smmu_rotator 281 Exynos4210
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smmu_mdma 282 Exynos4210
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fimd0 283
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mie0 284
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mdnie0 285 Exynos4412
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dsim0 286
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smmu_fimd0 287
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fimd1 288 Exynos4210
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mie1 289 Exynos4210
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dsim1 290 Exynos4210
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smmu_fimd1 291 Exynos4210
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pdma0 292
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pdma1 293
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pcie_phy 294
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sata_phy 295 Exynos4210
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tsi 296
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sdmmc0 297
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sdmmc1 298
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sdmmc2 299
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sdmmc3 300
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sdmmc4 301
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sata 302 Exynos4210
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sromc 303
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usb_host 304
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usb_device 305
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pcie 306
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onenand 307
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nfcon 308
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smmu_pcie 309
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gps 310
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smmu_gps 311
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uart0 312
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uart1 313
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uart2 314
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uart3 315
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uart4 316
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i2c0 317
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i2c1 318
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i2c2 319
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i2c3 320
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||||
i2c4 321
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i2c5 322
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i2c6 323
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||||
i2c7 324
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||||
i2c_hdmi 325
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||||
tsadc 326
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spi0 327
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||||
spi1 328
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||||
spi2 329
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i2s1 330
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||||
i2s2 331
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||||
pcm0 332
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||||
i2s0 333
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pcm1 334
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pcm2 335
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pwm 336
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slimbus 337
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spdif 338
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ac97 339
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modemif 340
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chipid 341
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sysreg 342
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hdmi_cec 343
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mct 344
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wdt 345
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||||
rtc 346
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keyif 347
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audss 348
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mipi_hsi 349 Exynos4210
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mdma2 350 Exynos4210
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||||
pixelasyncm0 351
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pixelasyncm1 352
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||||
fimc_lite0 353 Exynos4x12
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fimc_lite1 354 Exynos4x12
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||||
ppmuispx 355 Exynos4x12
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||||
ppmuispmx 356 Exynos4x12
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fimc_isp 357 Exynos4x12
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||||
fimc_drc 358 Exynos4x12
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fimc_fd 359 Exynos4x12
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||||
mcuisp 360 Exynos4x12
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||||
gicisp 361 Exynos4x12
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||||
smmu_isp 362 Exynos4x12
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smmu_drc 363 Exynos4x12
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||||
smmu_fd 364 Exynos4x12
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smmu_lite0 365 Exynos4x12
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smmu_lite1 366 Exynos4x12
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mcuctl_isp 367 Exynos4x12
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mpwm_isp 368 Exynos4x12
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i2c0_isp 369 Exynos4x12
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i2c1_isp 370 Exynos4x12
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mtcadc_isp 371 Exynos4x12
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pwm_isp 372 Exynos4x12
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wdt_isp 373 Exynos4x12
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uart_isp 374 Exynos4x12
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asyncaxim 375 Exynos4x12
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smmu_ispcx 376 Exynos4x12
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spi0_isp 377 Exynos4x12
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spi1_isp 378 Exynos4x12
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pwm_isp_sclk 379 Exynos4x12
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spi0_isp_sclk 380 Exynos4x12
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||||
spi1_isp_sclk 381 Exynos4x12
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uart_isp_sclk 382 Exynos4x12
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[Mux Clocks]
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||||
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||||
Clock ID SoC (if specific)
|
||||
-----------------------------------------------
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||||
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||||
mout_fimc0 384
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mout_fimc1 385
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mout_fimc2 386
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mout_fimc3 387
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||||
mout_cam0 388
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mout_cam1 389
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mout_csis0 390
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mout_csis1 391
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mout_g3d0 392
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mout_g3d1 393
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mout_g3d 394
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aclk400_mcuisp 395 Exynos4x12
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[Div Clocks]
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||||
|
||||
Clock ID SoC (if specific)
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||||
-----------------------------------------------
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||||
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div_isp0 450 Exynos4x12
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div_isp1 451 Exynos4x12
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div_mcuisp0 452 Exynos4x12
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div_mcuisp1 453 Exynos4x12
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div_aclk200 454 Exynos4x12
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div_aclk400_mcuisp 455 Exynos4x12
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Example 1: An example of a clock controller node is listed below.
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clock: clock-controller@0x10030000 {
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compatible = "samsung,exynos4210-clock";
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reg = <0x10030000 0x20000>;
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||||
#clock-cells = <1>;
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||||
};
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||||
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Example 2: UART controller node that consumes the clock generated by the clock
|
||||
controller. Refer to the standard clock bindings for information
|
||||
about 'clocks' and 'clock-names' property.
|
||||
|
||||
serial@13820000 {
|
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compatible = "samsung,exynos4210-uart";
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||||
reg = <0x13820000 0x100>;
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interrupts = <0 54 0>;
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clocks = <&clock 314>, <&clock 153>;
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clock-names = "uart", "clk_uart_baud0";
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};
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@@ -0,0 +1,177 @@
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* Samsung Exynos5250 Clock Controller
|
||||
|
||||
The Exynos5250 clock controller generates and supplies clock to various
|
||||
controllers within the Exynos5250 SoC.
|
||||
|
||||
Required Properties:
|
||||
|
||||
- comptible: should be one of the following.
|
||||
- "samsung,exynos5250-clock" - controller compatible with Exynos5250 SoC.
|
||||
|
||||
- reg: physical base address of the controller and length of memory mapped
|
||||
region.
|
||||
|
||||
- #clock-cells: should be 1.
|
||||
|
||||
The following is the list of clocks generated by the controller. Each clock is
|
||||
assigned an identifier and client nodes use this identifier to specify the
|
||||
clock which they consume.
|
||||
|
||||
|
||||
[Core Clocks]
|
||||
|
||||
Clock ID
|
||||
----------------------------
|
||||
|
||||
fin_pll 1
|
||||
|
||||
[Clock Gate for Special Clocks]
|
||||
|
||||
Clock ID
|
||||
----------------------------
|
||||
|
||||
sclk_cam_bayer 128
|
||||
sclk_cam0 129
|
||||
sclk_cam1 130
|
||||
sclk_gscl_wa 131
|
||||
sclk_gscl_wb 132
|
||||
sclk_fimd1 133
|
||||
sclk_mipi1 134
|
||||
sclk_dp 135
|
||||
sclk_hdmi 136
|
||||
sclk_pixel 137
|
||||
sclk_audio0 138
|
||||
sclk_mmc0 139
|
||||
sclk_mmc1 140
|
||||
sclk_mmc2 141
|
||||
sclk_mmc3 142
|
||||
sclk_sata 143
|
||||
sclk_usb3 144
|
||||
sclk_jpeg 145
|
||||
sclk_uart0 146
|
||||
sclk_uart1 147
|
||||
sclk_uart2 148
|
||||
sclk_uart3 149
|
||||
sclk_pwm 150
|
||||
sclk_audio1 151
|
||||
sclk_audio2 152
|
||||
sclk_spdif 153
|
||||
sclk_spi0 154
|
||||
sclk_spi1 155
|
||||
sclk_spi2 156
|
||||
|
||||
|
||||
[Peripheral Clock Gates]
|
||||
|
||||
Clock ID
|
||||
----------------------------
|
||||
|
||||
gscl0 256
|
||||
gscl1 257
|
||||
gscl2 258
|
||||
gscl3 259
|
||||
gscl_wa 260
|
||||
gscl_wb 261
|
||||
smmu_gscl0 262
|
||||
smmu_gscl1 263
|
||||
smmu_gscl2 264
|
||||
smmu_gscl3 265
|
||||
mfc 266
|
||||
smmu_mfcl 267
|
||||
smmu_mfcr 268
|
||||
rotator 269
|
||||
jpeg 270
|
||||
mdma1 271
|
||||
smmu_rotator 272
|
||||
smmu_jpeg 273
|
||||
smmu_mdma1 274
|
||||
pdma0 275
|
||||
pdma1 276
|
||||
sata 277
|
||||
usbotg 278
|
||||
mipi_hsi 279
|
||||
sdmmc0 280
|
||||
sdmmc1 281
|
||||
sdmmc2 282
|
||||
sdmmc3 283
|
||||
sromc 284
|
||||
usb2 285
|
||||
usb3 286
|
||||
sata_phyctrl 287
|
||||
sata_phyi2c 288
|
||||
uart0 289
|
||||
uart1 290
|
||||
uart2 291
|
||||
uart3 292
|
||||
uart4 293
|
||||
i2c0 294
|
||||
i2c1 295
|
||||
i2c2 296
|
||||
i2c3 297
|
||||
i2c4 298
|
||||
i2c5 299
|
||||
i2c6 300
|
||||
i2c7 301
|
||||
i2c_hdmi 302
|
||||
adc 303
|
||||
spi0 304
|
||||
spi1 305
|
||||
spi2 306
|
||||
i2s1 307
|
||||
i2s2 308
|
||||
pcm1 309
|
||||
pcm2 310
|
||||
pwm 311
|
||||
spdif 312
|
||||
ac97 313
|
||||
hsi2c0 314
|
||||
hsi2c1 315
|
||||
hs12c2 316
|
||||
hs12c3 317
|
||||
chipid 318
|
||||
sysreg 319
|
||||
pmu 320
|
||||
cmu_top 321
|
||||
cmu_core 322
|
||||
cmu_mem 323
|
||||
tzpc0 324
|
||||
tzpc1 325
|
||||
tzpc2 326
|
||||
tzpc3 327
|
||||
tzpc4 328
|
||||
tzpc5 329
|
||||
tzpc6 330
|
||||
tzpc7 331
|
||||
tzpc8 332
|
||||
tzpc9 333
|
||||
hdmi_cec 334
|
||||
mct 335
|
||||
wdt 336
|
||||
rtc 337
|
||||
tmu 338
|
||||
fimd1 339
|
||||
mie1 340
|
||||
dsim0 341
|
||||
dp 342
|
||||
mixer 343
|
||||
hdmi 345
|
||||
|
||||
Example 1: An example of a clock controller node is listed below.
|
||||
|
||||
clock: clock-controller@0x10010000 {
|
||||
compatible = "samsung,exynos5250-clock";
|
||||
reg = <0x10010000 0x30000>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
Example 2: UART controller node that consumes the clock generated by the clock
|
||||
controller. Refer to the standard clock bindings for information
|
||||
about 'clocks' and 'clock-names' property.
|
||||
|
||||
serial@13820000 {
|
||||
compatible = "samsung,exynos4210-uart";
|
||||
reg = <0x13820000 0x100>;
|
||||
interrupts = <0 54 0>;
|
||||
clocks = <&clock 314>, <&clock 153>;
|
||||
clock-names = "uart", "clk_uart_baud0";
|
||||
};
|
||||
@@ -0,0 +1,61 @@
|
||||
* Samsung Exynos5440 Clock Controller
|
||||
|
||||
The Exynos5440 clock controller generates and supplies clock to various
|
||||
controllers within the Exynos5440 SoC.
|
||||
|
||||
Required Properties:
|
||||
|
||||
- comptible: should be "samsung,exynos5440-clock".
|
||||
|
||||
- reg: physical base address of the controller and length of memory mapped
|
||||
region.
|
||||
|
||||
- #clock-cells: should be 1.
|
||||
|
||||
The following is the list of clocks generated by the controller. Each clock is
|
||||
assigned an identifier and client nodes use this identifier to specify the
|
||||
clock which they consume.
|
||||
|
||||
|
||||
[Core Clocks]
|
||||
|
||||
Clock ID
|
||||
----------------------------
|
||||
|
||||
xtal 1
|
||||
arm_clk 2
|
||||
|
||||
[Peripheral Clock Gates]
|
||||
|
||||
Clock ID
|
||||
----------------------------
|
||||
|
||||
spi_baud 16
|
||||
pb0_250 17
|
||||
pr0_250 18
|
||||
pr1_250 19
|
||||
b_250 20
|
||||
b_125 21
|
||||
b_200 22
|
||||
sata 23
|
||||
usb 24
|
||||
gmac0 25
|
||||
cs250 26
|
||||
pb0_250_o 27
|
||||
pr0_250_o 28
|
||||
pr1_250_o 29
|
||||
b_250_o 30
|
||||
b_125_o 31
|
||||
b_200_o 32
|
||||
sata_o 33
|
||||
usb_o 34
|
||||
gmac0_o 35
|
||||
cs250_o 36
|
||||
|
||||
Example: An example of a clock controller node is listed below.
|
||||
|
||||
clock: clock-controller@0x10010000 {
|
||||
compatible = "samsung,exynos5440-clock";
|
||||
reg = <0x160000 0x10000>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
@@ -0,0 +1,20 @@
|
||||
* Samsung 2D Graphics Accelerator
|
||||
|
||||
Required properties:
|
||||
- compatible : value should be one among the following:
|
||||
(a) "samsung,s5pv210-g2d" for G2D IP present in S5PV210 & Exynos4210 SoC
|
||||
(b) "samsung,exynos4212-g2d" for G2D IP present in Exynos4x12 SoCs
|
||||
(c) "samsung,exynos5250-g2d" for G2D IP present in Exynos5250 SoC
|
||||
|
||||
- reg : Physical base address of the IP registers and length of memory
|
||||
mapped region.
|
||||
|
||||
- interrupts : G2D interrupt number to the CPU.
|
||||
|
||||
Example:
|
||||
g2d@12800000 {
|
||||
compatible = "samsung,s5pv210-g2d";
|
||||
reg = <0x12800000 0x1000>;
|
||||
interrupts = <0 89 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
@@ -21,3 +21,24 @@ Required properties:
|
||||
|
||||
- samsung,mfc-l : Base address of the second memory bank used by MFC
|
||||
for DMA contiguous memory allocation and its size.
|
||||
|
||||
Optional properties:
|
||||
- samsung,power-domain : power-domain property defined with a phandle
|
||||
to respective power domain.
|
||||
|
||||
Example:
|
||||
SoC specific DT entry:
|
||||
|
||||
mfc: codec@13400000 {
|
||||
compatible = "samsung,mfc-v5";
|
||||
reg = <0x13400000 0x10000>;
|
||||
interrupts = <0 94 0>;
|
||||
samsung,power-domain = <&pd_mfc>;
|
||||
};
|
||||
|
||||
Board specific DT entry:
|
||||
|
||||
codec@13400000 {
|
||||
samsung,mfc-r = <0x43000000 0x800000>;
|
||||
samsung,mfc-l = <0x51000000 0x800000>;
|
||||
};
|
||||
|
||||
@@ -0,0 +1,68 @@
|
||||
Samsung's Multi Core Timer (MCT)
|
||||
|
||||
The Samsung's Multi Core Timer (MCT) module includes two main blocks, the
|
||||
global timer and CPU local timers. The global timer is a 64-bit free running
|
||||
up-counter and can generate 4 interrupts when the counter reaches one of the
|
||||
four preset counter values. The CPU local timers are 32-bit free running
|
||||
down-counters and generate an interrupt when the counter expires. There is
|
||||
one CPU local timer instantiated in MCT for every CPU in the system.
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible: should be "samsung,exynos4210-mct".
|
||||
(a) "samsung,exynos4210-mct", for mct compatible with Exynos4210 mct.
|
||||
(b) "samsung,exynos4412-mct", for mct compatible with Exynos4412 mct.
|
||||
|
||||
- reg: base address of the mct controller and length of the address space
|
||||
it occupies.
|
||||
|
||||
- interrupts: the list of interrupts generated by the controller. The following
|
||||
should be the order of the interrupts specified. The local timer interrupts
|
||||
should be specified after the four global timer interrupts have been
|
||||
specified.
|
||||
|
||||
0: Global Timer Interrupt 0
|
||||
1: Global Timer Interrupt 1
|
||||
2: Global Timer Interrupt 2
|
||||
3: Global Timer Interrupt 3
|
||||
4: Local Timer Interrupt 0
|
||||
5: Local Timer Interrupt 1
|
||||
6: ..
|
||||
7: ..
|
||||
i: Local Timer Interrupt n
|
||||
|
||||
Example 1: In this example, the system uses only the first global timer
|
||||
interrupt generated by MCT and the remaining three global timer
|
||||
interrupts are unused. Two local timer interrupts have been
|
||||
specified.
|
||||
|
||||
mct@10050000 {
|
||||
compatible = "samsung,exynos4210-mct";
|
||||
reg = <0x10050000 0x800>;
|
||||
interrupts = <0 57 0>, <0 0 0>, <0 0 0>, <0 0 0>,
|
||||
<0 42 0>, <0 48 0>;
|
||||
};
|
||||
|
||||
Example 2: In this example, the MCT global and local timer interrupts are
|
||||
connected to two seperate interrupt controllers. Hence, an
|
||||
interrupt-map is created to map the interrupts to the respective
|
||||
interrupt controllers.
|
||||
|
||||
mct@101C0000 {
|
||||
compatible = "samsung,exynos4210-mct";
|
||||
reg = <0x101C0000 0x800>;
|
||||
interrupt-controller;
|
||||
#interrups-cells = <2>;
|
||||
interrupt-parent = <&mct_map>;
|
||||
interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
|
||||
<4 0>, <5 0>;
|
||||
|
||||
mct_map: mct-map {
|
||||
#interrupt-cells = <2>;
|
||||
#address-cells = <0>;
|
||||
#size-cells = <0>;
|
||||
interrupt-map = <0x0 0 &combiner 23 3>,
|
||||
<0x4 0 &gic 0 120 0>,
|
||||
<0x5 0 &gic 0 121 0>;
|
||||
};
|
||||
};
|
||||
@@ -0,0 +1,50 @@
|
||||
Samsung Exynos SoC USB controller
|
||||
|
||||
The USB devices interface with USB controllers on Exynos SOCs.
|
||||
The device node has following properties.
|
||||
|
||||
EHCI
|
||||
Required properties:
|
||||
- compatible: should be "samsung,exynos4210-ehci" for USB 2.0
|
||||
EHCI controller in host mode.
|
||||
- reg: physical base address of the controller and length of memory mapped
|
||||
region.
|
||||
- interrupts: interrupt number to the cpu.
|
||||
- clocks: from common clock binding: handle to usb clock.
|
||||
- clock-names: from common clock binding: Shall be "usbhost".
|
||||
|
||||
Optional properties:
|
||||
- samsung,vbus-gpio: if present, specifies the GPIO that
|
||||
needs to be pulled up for the bus to be powered.
|
||||
|
||||
Example:
|
||||
|
||||
usb@12110000 {
|
||||
compatible = "samsung,exynos4210-ehci";
|
||||
reg = <0x12110000 0x100>;
|
||||
interrupts = <0 71 0>;
|
||||
samsung,vbus-gpio = <&gpx2 6 1 3 3>;
|
||||
|
||||
clocks = <&clock 285>;
|
||||
clock-names = "usbhost";
|
||||
};
|
||||
|
||||
OHCI
|
||||
Required properties:
|
||||
- compatible: should be "samsung,exynos4210-ohci" for USB 2.0
|
||||
OHCI companion controller in host mode.
|
||||
- reg: physical base address of the controller and length of memory mapped
|
||||
region.
|
||||
- interrupts: interrupt number to the cpu.
|
||||
- clocks: from common clock binding: handle to usb clock.
|
||||
- clock-names: from common clock binding: Shall be "usbhost".
|
||||
|
||||
Example:
|
||||
usb@12120000 {
|
||||
compatible = "samsung,exynos4210-ohci";
|
||||
reg = <0x12120000 0x100>;
|
||||
interrupts = <0 71 0>;
|
||||
|
||||
clocks = <&clock 285>;
|
||||
clock-names = "usbhost";
|
||||
};
|
||||
@@ -0,0 +1,65 @@
|
||||
Device-Tree bindings for Samsung SoC display controller (FIMD)
|
||||
|
||||
FIMD (Fully Interactive Mobile Display) is the Display Controller for the
|
||||
Samsung series of SoCs which transfers the image data from a video memory
|
||||
buffer to an external LCD interface.
|
||||
|
||||
Required properties:
|
||||
- compatible: value should be one of the following
|
||||
"samsung,s3c2443-fimd"; /* for S3C24XX SoCs */
|
||||
"samsung,s3c6400-fimd"; /* for S3C64XX SoCs */
|
||||
"samsung,s5p6440-fimd"; /* for S5P64X0 SoCs */
|
||||
"samsung,s5pc100-fimd"; /* for S5PC100 SoC */
|
||||
"samsung,s5pv210-fimd"; /* for S5PV210 SoC */
|
||||
"samsung,exynos4210-fimd"; /* for Exynos4 SoCs */
|
||||
"samsung,exynos5250-fimd"; /* for Exynos5 SoCs */
|
||||
|
||||
- reg: physical base address and length of the FIMD registers set.
|
||||
|
||||
- interrupt-parent: should be the phandle of the fimd controller's
|
||||
parent interrupt controller.
|
||||
|
||||
- interrupts: should contain a list of all FIMD IP block interrupts in the
|
||||
order: FIFO Level, VSYNC, LCD_SYSTEM. The interrupt specifier
|
||||
format depends on the interrupt controller used.
|
||||
|
||||
- interrupt-names: should contain the interrupt names: "fifo", "vsync",
|
||||
"lcd_sys", in the same order as they were listed in the interrupts
|
||||
property.
|
||||
|
||||
- pinctrl-0: pin control group to be used for this controller.
|
||||
|
||||
- pinctrl-names: must contain a "default" entry.
|
||||
|
||||
- clocks: must include clock specifiers corresponding to entries in the
|
||||
clock-names property.
|
||||
|
||||
- clock-names: list of clock names sorted in the same order as the clocks
|
||||
property. Must contain "sclk_fimd" and "fimd".
|
||||
|
||||
Optional Properties:
|
||||
- samsung,power-domain: a phandle to FIMD power domain node.
|
||||
|
||||
Example:
|
||||
|
||||
SoC specific DT entry:
|
||||
|
||||
fimd@11c00000 {
|
||||
compatible = "samsung,exynos4210-fimd";
|
||||
interrupt-parent = <&combiner>;
|
||||
reg = <0x11c00000 0x20000>;
|
||||
interrupt-names = "fifo", "vsync", "lcd_sys";
|
||||
interrupts = <11 0>, <11 1>, <11 2>;
|
||||
clocks = <&clock 140>, <&clock 283>;
|
||||
clock-names = "sclk_fimd", "fimd";
|
||||
samsung,power-domain = <&pd_lcd0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
Board specific DT entry:
|
||||
|
||||
fimd@11c00000 {
|
||||
pinctrl-0 = <&lcd_clk &lcd_data24 &pwm1_out>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
+10
-4
@@ -772,8 +772,10 @@ config ARCH_SA1100
|
||||
config ARCH_S3C24XX
|
||||
bool "Samsung S3C24XX SoCs"
|
||||
select ARCH_HAS_CPUFREQ
|
||||
select ARCH_USES_GETTIMEOFFSET
|
||||
select CLKDEV_LOOKUP
|
||||
select CLKSRC_MMIO
|
||||
select GENERIC_CLOCKEVENTS
|
||||
select GENERIC_GPIO
|
||||
select HAVE_CLK
|
||||
select HAVE_S3C2410_I2C if I2C
|
||||
select HAVE_S3C2410_WATCHDOG if WATCHDOG
|
||||
@@ -790,10 +792,11 @@ config ARCH_S3C64XX
|
||||
bool "Samsung S3C64XX"
|
||||
select ARCH_HAS_CPUFREQ
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select ARCH_USES_GETTIMEOFFSET
|
||||
select ARM_VIC
|
||||
select CLKDEV_LOOKUP
|
||||
select CLKSRC_MMIO
|
||||
select CPU_V6
|
||||
select GENERIC_CLOCKEVENTS
|
||||
select HAVE_CLK
|
||||
select HAVE_S3C2410_I2C if I2C
|
||||
select HAVE_S3C2410_WATCHDOG if WATCHDOG
|
||||
@@ -827,9 +830,11 @@ config ARCH_S5P64X0
|
||||
|
||||
config ARCH_S5PC100
|
||||
bool "Samsung S5PC100"
|
||||
select ARCH_USES_GETTIMEOFFSET
|
||||
select CLKDEV_LOOKUP
|
||||
select CLKSRC_MMIO
|
||||
select CPU_V7
|
||||
select GENERIC_CLOCKEVENTS
|
||||
select GENERIC_GPIO
|
||||
select HAVE_CLK
|
||||
select HAVE_S3C2410_I2C if I2C
|
||||
select HAVE_S3C2410_WATCHDOG if WATCHDOG
|
||||
@@ -862,6 +867,7 @@ config ARCH_EXYNOS
|
||||
select ARCH_HAS_HOLES_MEMORYMODEL
|
||||
select ARCH_SPARSEMEM_ENABLE
|
||||
select CLKDEV_LOOKUP
|
||||
select COMMON_CLK
|
||||
select CPU_V7
|
||||
select GENERIC_CLOCKEVENTS
|
||||
select HAVE_CLK
|
||||
@@ -1650,7 +1656,7 @@ config LOCAL_TIMERS
|
||||
bool "Use local timer interrupts"
|
||||
depends on SMP
|
||||
default y
|
||||
select HAVE_ARM_TWD if (!ARCH_MSM_SCORPIONMP && !EXYNOS4_MCT)
|
||||
select HAVE_ARM_TWD if (!ARCH_MSM_SCORPIONMP && !CLKSRC_EXYNOS_MCT)
|
||||
help
|
||||
Enable support for local timers on SMP platforms, rather then the
|
||||
legacy IPI broadcast method. Local timers allows the system
|
||||
|
||||
@@ -42,7 +42,11 @@ dtb-$(CONFIG_ARCH_DOVE) += dove-cm-a510.dtb \
|
||||
dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \
|
||||
exynos4210-smdkv310.dtb \
|
||||
exynos4210-trats.dtb \
|
||||
exynos4412-odroidx.dtb \
|
||||
exynos4412-smdk4412.dtb \
|
||||
exynos4412-origen.dtb \
|
||||
exynos5250-arndale.dtb \
|
||||
exynos5440-sd5v1.dtb \
|
||||
exynos5250-smdk5250.dtb \
|
||||
exynos5250-snow.dtb \
|
||||
exynos5440-ssdk5440.dtb
|
||||
|
||||
@@ -19,31 +19,168 @@
|
||||
chosen {
|
||||
};
|
||||
|
||||
pinctrl@11400000 {
|
||||
/*
|
||||
* Disabled pullups since external part has its own pullups and
|
||||
* double-pulling gets us out of spec in some cases.
|
||||
*/
|
||||
i2c2_bus: i2c2-bus {
|
||||
samsung,pin-pud = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
i2c@12C60000 {
|
||||
samsung,i2c-sda-delay = <100>;
|
||||
samsung,i2c-max-bus-freq = <378000>;
|
||||
gpios = <&gpb3 0 2 3 0>,
|
||||
<&gpb3 1 2 3 0>;
|
||||
|
||||
max77686@09 {
|
||||
compatible = "maxim,max77686";
|
||||
reg = <0x09>;
|
||||
|
||||
voltage-regulators {
|
||||
ldo1_reg: LDO1 {
|
||||
regulator-name = "P1.0V_LDO_OUT1";
|
||||
regulator-min-microvolt = <1000000>;
|
||||
regulator-max-microvolt = <1000000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo2_reg: LDO2 {
|
||||
regulator-name = "P1.8V_LDO_OUT2";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo3_reg: LDO3 {
|
||||
regulator-name = "P1.8V_LDO_OUT3";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo7_reg: LDO7 {
|
||||
regulator-name = "P1.1V_LDO_OUT7";
|
||||
regulator-min-microvolt = <1100000>;
|
||||
regulator-max-microvolt = <1100000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo8_reg: LDO8 {
|
||||
regulator-name = "P1.0V_LDO_OUT8";
|
||||
regulator-min-microvolt = <1000000>;
|
||||
regulator-max-microvolt = <1000000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo10_reg: LDO10 {
|
||||
regulator-name = "P1.8V_LDO_OUT10";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo12_reg: LDO12 {
|
||||
regulator-name = "P3.0V_LDO_OUT12";
|
||||
regulator-min-microvolt = <3000000>;
|
||||
regulator-max-microvolt = <3000000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo14_reg: LDO14 {
|
||||
regulator-name = "P1.8V_LDO_OUT14";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo15_reg: LDO15 {
|
||||
regulator-name = "P1.0V_LDO_OUT15";
|
||||
regulator-min-microvolt = <1000000>;
|
||||
regulator-max-microvolt = <1000000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo16_reg: LDO16 {
|
||||
regulator-name = "P1.8V_LDO_OUT16";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
buck1_reg: BUCK1 {
|
||||
regulator-name = "vdd_mif";
|
||||
regulator-min-microvolt = <950000>;
|
||||
regulator-max-microvolt = <1300000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
buck2_reg: BUCK2 {
|
||||
regulator-name = "vdd_arm";
|
||||
regulator-min-microvolt = <850000>;
|
||||
regulator-max-microvolt = <1350000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
buck3_reg: BUCK3 {
|
||||
regulator-name = "vdd_int";
|
||||
regulator-min-microvolt = <900000>;
|
||||
regulator-max-microvolt = <1200000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
buck4_reg: BUCK4 {
|
||||
regulator-name = "vdd_g3d";
|
||||
regulator-min-microvolt = <850000>;
|
||||
regulator-max-microvolt = <1300000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
buck5_reg: BUCK5 {
|
||||
regulator-name = "P1.8V_BUCK_OUT5";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
buck6_reg: BUCK6 {
|
||||
regulator-name = "P1.35V_BUCK_OUT6";
|
||||
regulator-min-microvolt = <1350000>;
|
||||
regulator-max-microvolt = <1350000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
buck7_reg: BUCK7 {
|
||||
regulator-name = "P2.0V_BUCK_OUT7";
|
||||
regulator-min-microvolt = <2000000>;
|
||||
regulator-max-microvolt = <2000000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
buck8_reg: BUCK8 {
|
||||
regulator-name = "P2.85V_BUCK_OUT8";
|
||||
regulator-min-microvolt = <2850000>;
|
||||
regulator-max-microvolt = <2850000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
i2c@12C70000 {
|
||||
samsung,i2c-sda-delay = <100>;
|
||||
samsung,i2c-max-bus-freq = <378000>;
|
||||
gpios = <&gpb3 2 2 3 0>,
|
||||
<&gpb3 3 2 3 0>;
|
||||
};
|
||||
|
||||
i2c@12C80000 {
|
||||
samsung,i2c-sda-delay = <100>;
|
||||
samsung,i2c-max-bus-freq = <66000>;
|
||||
|
||||
/*
|
||||
* Disabled pullups since external part has its own pullups and
|
||||
* double-pulling gets us out of spec in some cases.
|
||||
*/
|
||||
gpios = <&gpa0 6 3 0 0>,
|
||||
<&gpa0 7 3 0 0>;
|
||||
|
||||
hdmiddc@50 {
|
||||
compatible = "samsung,exynos5-hdmiddc";
|
||||
reg = <0x50>;
|
||||
@@ -53,8 +190,6 @@
|
||||
i2c@12C90000 {
|
||||
samsung,i2c-sda-delay = <100>;
|
||||
samsung,i2c-max-bus-freq = <66000>;
|
||||
gpios = <&gpa1 2 3 3 0>,
|
||||
<&gpa1 3 3 3 0>;
|
||||
};
|
||||
|
||||
i2c@12CA0000 {
|
||||
@@ -64,8 +199,6 @@
|
||||
i2c@12CB0000 {
|
||||
samsung,i2c-sda-delay = <100>;
|
||||
samsung,i2c-max-bus-freq = <66000>;
|
||||
gpios = <&gpa2 2 3 3 0>,
|
||||
<&gpa2 3 3 3 0>;
|
||||
};
|
||||
|
||||
i2c@12CC0000 {
|
||||
@@ -75,8 +208,6 @@
|
||||
i2c@12CD0000 {
|
||||
samsung,i2c-sda-delay = <100>;
|
||||
samsung,i2c-max-bus-freq = <66000>;
|
||||
gpios = <&gpb2 2 3 3 0>,
|
||||
<&gpb2 3 3 3 0>;
|
||||
};
|
||||
|
||||
i2c@12CE0000 {
|
||||
@@ -98,15 +229,12 @@
|
||||
samsung,dw-mshc-ciu-div = <3>;
|
||||
samsung,dw-mshc-sdr-timing = <2 3>;
|
||||
samsung,dw-mshc-ddr-timing = <1 2>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_cd &sd0_bus4 &sd0_bus8>;
|
||||
|
||||
slot@0 {
|
||||
reg = <0>;
|
||||
bus-width = <8>;
|
||||
gpios = <&gpc0 0 2 0 3>, <&gpc0 1 2 0 3>,
|
||||
<&gpc1 0 2 3 3>, <&gpc1 1 2 3 3>,
|
||||
<&gpc1 2 2 3 3>, <&gpc1 3 2 3 3>,
|
||||
<&gpc0 3 2 3 3>, <&gpc0 4 2 3 3>,
|
||||
<&gpc0 5 2 3 3>, <&gpc0 6 2 3 3>;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -122,15 +250,13 @@
|
||||
samsung,dw-mshc-ciu-div = <3>;
|
||||
samsung,dw-mshc-sdr-timing = <2 3>;
|
||||
samsung,dw-mshc-ddr-timing = <1 2>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
|
||||
|
||||
slot@0 {
|
||||
reg = <0>;
|
||||
bus-width = <4>;
|
||||
samsung,cd-pinmux-gpio = <&gpc3 2 2 3 3>;
|
||||
wp-gpios = <&gpc2 1 0 0 3>;
|
||||
gpios = <&gpc3 0 2 0 3>, <&gpc3 1 2 0 3>,
|
||||
<&gpc3 3 2 3 3>, <&gpc3 4 2 3 3>,
|
||||
<&gpc3 5 2 3 3>, <&gpc3 6 2 3 3>;
|
||||
wp-gpios = <&gpc2 1 0>;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -143,11 +269,11 @@
|
||||
samsung,dw-mshc-ciu-div = <3>;
|
||||
samsung,dw-mshc-sdr-timing = <2 3>;
|
||||
samsung,dw-mshc-ddr-timing = <1 2>;
|
||||
/* See board-specific dts files for pin setup */
|
||||
|
||||
slot@0 {
|
||||
reg = <0>;
|
||||
bus-width = <4>;
|
||||
/* See board-specific dts files for GPIOs */
|
||||
};
|
||||
};
|
||||
|
||||
@@ -156,9 +282,6 @@
|
||||
};
|
||||
|
||||
spi_1: spi@12d30000 {
|
||||
gpios = <&gpa2 4 2 3 0>,
|
||||
<&gpa2 6 2 3 0>,
|
||||
<&gpa2 7 2 3 0>;
|
||||
samsung,spi-src-clk = <0>;
|
||||
num-cs = <1>;
|
||||
};
|
||||
@@ -168,7 +291,7 @@
|
||||
};
|
||||
|
||||
hdmi {
|
||||
hpd-gpio = <&gpx3 7 0xf 1 3>;
|
||||
hpd-gpio = <&gpx3 7 0>;
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
@@ -176,7 +299,7 @@
|
||||
|
||||
power {
|
||||
label = "Power";
|
||||
gpios = <&gpx1 3 0 0x10000 0>;
|
||||
gpios = <&gpx1 3 1>;
|
||||
linux,code = <116>; /* KEY_POWER */
|
||||
gpio-key,wakeup;
|
||||
};
|
||||
|
||||
@@ -82,10 +82,17 @@
|
||||
reg = <0x10440000 0x1000>;
|
||||
};
|
||||
|
||||
sys_reg: sysreg {
|
||||
compatible = "samsung,exynos4-sysreg", "syscon";
|
||||
reg = <0x10010000 0x400>;
|
||||
};
|
||||
|
||||
watchdog@10060000 {
|
||||
compatible = "samsung,s3c2410-wdt";
|
||||
reg = <0x10060000 0x100>;
|
||||
interrupts = <0 43 0>;
|
||||
clocks = <&clock 345>;
|
||||
clock-names = "watchdog";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@@ -93,6 +100,8 @@
|
||||
compatible = "samsung,s3c6410-rtc";
|
||||
reg = <0x10070000 0x100>;
|
||||
interrupts = <0 44 0>, <0 45 0>;
|
||||
clocks = <&clock 346>;
|
||||
clock-names = "rtc";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@@ -100,6 +109,8 @@
|
||||
compatible = "samsung,s5pv210-keypad";
|
||||
reg = <0x100A0000 0x100>;
|
||||
interrupts = <0 109 0>;
|
||||
clocks = <&clock 347>;
|
||||
clock-names = "keypad";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@@ -107,6 +118,8 @@
|
||||
compatible = "samsung,exynos4210-sdhci";
|
||||
reg = <0x12510000 0x100>;
|
||||
interrupts = <0 73 0>;
|
||||
clocks = <&clock 297>, <&clock 145>;
|
||||
clock-names = "hsmmc", "mmc_busclk.2";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@@ -114,6 +127,8 @@
|
||||
compatible = "samsung,exynos4210-sdhci";
|
||||
reg = <0x12520000 0x100>;
|
||||
interrupts = <0 74 0>;
|
||||
clocks = <&clock 298>, <&clock 146>;
|
||||
clock-names = "hsmmc", "mmc_busclk.2";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@@ -121,6 +136,8 @@
|
||||
compatible = "samsung,exynos4210-sdhci";
|
||||
reg = <0x12530000 0x100>;
|
||||
interrupts = <0 75 0>;
|
||||
clocks = <&clock 299>, <&clock 147>;
|
||||
clock-names = "hsmmc", "mmc_busclk.2";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@@ -128,6 +145,16 @@
|
||||
compatible = "samsung,exynos4210-sdhci";
|
||||
reg = <0x12540000 0x100>;
|
||||
interrupts = <0 76 0>;
|
||||
clocks = <&clock 300>, <&clock 148>;
|
||||
clock-names = "hsmmc", "mmc_busclk.2";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mfc: codec@13400000 {
|
||||
compatible = "samsung,mfc-v5";
|
||||
reg = <0x13400000 0x10000>;
|
||||
interrupts = <0 94 0>;
|
||||
samsung,power-domain = <&pd_mfc>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@@ -135,6 +162,8 @@
|
||||
compatible = "samsung,exynos4210-uart";
|
||||
reg = <0x13800000 0x100>;
|
||||
interrupts = <0 52 0>;
|
||||
clocks = <&clock 312>, <&clock 151>;
|
||||
clock-names = "uart", "clk_uart_baud0";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@@ -142,6 +171,8 @@
|
||||
compatible = "samsung,exynos4210-uart";
|
||||
reg = <0x13810000 0x100>;
|
||||
interrupts = <0 53 0>;
|
||||
clocks = <&clock 313>, <&clock 152>;
|
||||
clock-names = "uart", "clk_uart_baud0";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@@ -149,6 +180,8 @@
|
||||
compatible = "samsung,exynos4210-uart";
|
||||
reg = <0x13820000 0x100>;
|
||||
interrupts = <0 54 0>;
|
||||
clocks = <&clock 314>, <&clock 153>;
|
||||
clock-names = "uart", "clk_uart_baud0";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@@ -156,6 +189,8 @@
|
||||
compatible = "samsung,exynos4210-uart";
|
||||
reg = <0x13830000 0x100>;
|
||||
interrupts = <0 55 0>;
|
||||
clocks = <&clock 315>, <&clock 154>;
|
||||
clock-names = "uart", "clk_uart_baud0";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@@ -165,6 +200,10 @@
|
||||
compatible = "samsung,s3c2440-i2c";
|
||||
reg = <0x13860000 0x100>;
|
||||
interrupts = <0 58 0>;
|
||||
clocks = <&clock 317>;
|
||||
clock-names = "i2c";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c0_bus>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@@ -174,6 +213,10 @@
|
||||
compatible = "samsung,s3c2440-i2c";
|
||||
reg = <0x13870000 0x100>;
|
||||
interrupts = <0 59 0>;
|
||||
clocks = <&clock 318>;
|
||||
clock-names = "i2c";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c1_bus>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@@ -183,6 +226,8 @@
|
||||
compatible = "samsung,s3c2440-i2c";
|
||||
reg = <0x13880000 0x100>;
|
||||
interrupts = <0 60 0>;
|
||||
clocks = <&clock 319>;
|
||||
clock-names = "i2c";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@@ -192,6 +237,8 @@
|
||||
compatible = "samsung,s3c2440-i2c";
|
||||
reg = <0x13890000 0x100>;
|
||||
interrupts = <0 61 0>;
|
||||
clocks = <&clock 320>;
|
||||
clock-names = "i2c";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@@ -201,6 +248,8 @@
|
||||
compatible = "samsung,s3c2440-i2c";
|
||||
reg = <0x138A0000 0x100>;
|
||||
interrupts = <0 62 0>;
|
||||
clocks = <&clock 321>;
|
||||
clock-names = "i2c";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@@ -210,6 +259,8 @@
|
||||
compatible = "samsung,s3c2440-i2c";
|
||||
reg = <0x138B0000 0x100>;
|
||||
interrupts = <0 63 0>;
|
||||
clocks = <&clock 322>;
|
||||
clock-names = "i2c";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@@ -219,6 +270,8 @@
|
||||
compatible = "samsung,s3c2440-i2c";
|
||||
reg = <0x138C0000 0x100>;
|
||||
interrupts = <0 64 0>;
|
||||
clocks = <&clock 323>;
|
||||
clock-names = "i2c";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@@ -228,6 +281,8 @@
|
||||
compatible = "samsung,s3c2440-i2c";
|
||||
reg = <0x138D0000 0x100>;
|
||||
interrupts = <0 65 0>;
|
||||
clocks = <&clock 324>;
|
||||
clock-names = "i2c";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@@ -239,6 +294,10 @@
|
||||
rx-dma-channel = <&pdma0 6>; /* preliminary */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
clocks = <&clock 327>, <&clock 159>;
|
||||
clock-names = "spi", "spi_busclk0";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi0_bus>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@@ -250,6 +309,10 @@
|
||||
rx-dma-channel = <&pdma1 6>; /* preliminary */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
clocks = <&clock 328>, <&clock 160>;
|
||||
clock-names = "spi", "spi_busclk0";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi1_bus>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@@ -261,6 +324,10 @@
|
||||
rx-dma-channel = <&pdma0 8>; /* preliminary */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
clocks = <&clock 329>, <&clock 161>;
|
||||
clock-names = "spi", "spi_busclk0";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi2_bus>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@@ -275,6 +342,8 @@
|
||||
compatible = "arm,pl330", "arm,primecell";
|
||||
reg = <0x12680000 0x1000>;
|
||||
interrupts = <0 35 0>;
|
||||
clocks = <&clock 292>;
|
||||
clock-names = "apb_pclk";
|
||||
#dma-cells = <1>;
|
||||
#dma-channels = <8>;
|
||||
#dma-requests = <32>;
|
||||
@@ -284,6 +353,8 @@
|
||||
compatible = "arm,pl330", "arm,primecell";
|
||||
reg = <0x12690000 0x1000>;
|
||||
interrupts = <0 36 0>;
|
||||
clocks = <&clock 293>;
|
||||
clock-names = "apb_pclk";
|
||||
#dma-cells = <1>;
|
||||
#dma-channels = <8>;
|
||||
#dma-requests = <32>;
|
||||
@@ -293,9 +364,23 @@
|
||||
compatible = "arm,pl330", "arm,primecell";
|
||||
reg = <0x12850000 0x1000>;
|
||||
interrupts = <0 34 0>;
|
||||
clocks = <&clock 279>;
|
||||
clock-names = "apb_pclk";
|
||||
#dma-cells = <1>;
|
||||
#dma-channels = <8>;
|
||||
#dma-requests = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
fimd: fimd@11c00000 {
|
||||
compatible = "samsung,exynos4210-fimd";
|
||||
interrupt-parent = <&combiner>;
|
||||
reg = <0x11c00000 0x20000>;
|
||||
interrupt-names = "fifo", "vsync", "lcd_sys";
|
||||
interrupts = <11 0>, <11 1>, <11 2>;
|
||||
clocks = <&clock 140>, <&clock 283>;
|
||||
clock-names = "sclk_fimd", "fimd";
|
||||
samsung,power-domain = <&pd_lcd0>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
@@ -57,6 +57,16 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
g2d@12800000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
codec@13400000 {
|
||||
samsung,mfc-r = <0x43000000 0x800000>;
|
||||
samsung,mfc-l = <0x51000000 0x800000>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
serial@13800000 {
|
||||
status = "okay";
|
||||
};
|
||||
@@ -121,4 +131,16 @@
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
};
|
||||
|
||||
fixed-rate-clocks {
|
||||
xxti {
|
||||
compatible = "samsung,clock-xxti";
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
|
||||
xusbxti {
|
||||
compatible = "samsung,clock-xusbxti";
|
||||
clock-frequency = <24000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@@ -30,16 +30,19 @@
|
||||
};
|
||||
|
||||
sdhci@12530000 {
|
||||
samsung,sdhci-bus-width = <4>;
|
||||
linux,mmc_cap_4_bit_data;
|
||||
samsung,sdhci-cd-internal;
|
||||
gpio-cd = <&gpk2 2 2 3 3>;
|
||||
gpios = <&gpk2 0 2 0 3>,
|
||||
<&gpk2 1 2 0 3>,
|
||||
<&gpk2 3 2 3 3>,
|
||||
<&gpk2 4 2 3 3>,
|
||||
<&gpk2 5 2 3 3>,
|
||||
<&gpk2 6 2 3 3>;
|
||||
bus-width = <4>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
g2d@12800000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
codec@13400000 {
|
||||
samsung,mfc-r = <0x43000000 0x800000>;
|
||||
samsung,mfc-l = <0x51000000 0x800000>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
@@ -59,25 +62,32 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
pinctrl@11000000 {
|
||||
keypad_rows: keypad-rows {
|
||||
samsung,pins = "gpx2-0", "gpx2-1";
|
||||
samsung,pin-function = <3>;
|
||||
samsung,pin-pud = <3>;
|
||||
samsung,pin-drv = <0>;
|
||||
};
|
||||
|
||||
keypad_cols: keypad-cols {
|
||||
samsung,pins = "gpx1-0", "gpx1-1", "gpx1-2", "gpx1-3",
|
||||
"gpx1-4", "gpx1-5", "gpx1-6", "gpx1-7";
|
||||
samsung,pin-function = <3>;
|
||||
samsung,pin-pud = <0>;
|
||||
samsung,pin-drv = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
keypad@100A0000 {
|
||||
samsung,keypad-num-rows = <2>;
|
||||
samsung,keypad-num-columns = <8>;
|
||||
linux,keypad-no-autorepeat;
|
||||
linux,keypad-wakeup;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&keypad_rows &keypad_cols>;
|
||||
status = "okay";
|
||||
|
||||
row-gpios = <&gpx2 0 3 3 0>,
|
||||
<&gpx2 1 3 3 0>;
|
||||
|
||||
col-gpios = <&gpx1 0 3 0 0>,
|
||||
<&gpx1 1 3 0 0>,
|
||||
<&gpx1 2 3 0 0>,
|
||||
<&gpx1 3 3 0 0>,
|
||||
<&gpx1 4 3 0 0>,
|
||||
<&gpx1 5 3 0 0>,
|
||||
<&gpx1 6 3 0 0>,
|
||||
<&gpx1 7 3 0 0>;
|
||||
|
||||
key_1 {
|
||||
keypad,row = <0>;
|
||||
keypad,column = <3>;
|
||||
@@ -143,9 +153,7 @@
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
samsung,i2c-sda-delay = <100>;
|
||||
samsung,i2c-max-bus-freq = <20000>;
|
||||
gpios = <&gpd1 0 2 3 0>,
|
||||
<&gpd1 1 2 3 0>;
|
||||
samsung,i2c-max-bus-freq = <100000>;
|
||||
status = "okay";
|
||||
|
||||
eeprom@50 {
|
||||
@@ -160,9 +168,6 @@
|
||||
};
|
||||
|
||||
spi_2: spi@13940000 {
|
||||
gpios = <&gpc1 1 5 3 0>,
|
||||
<&gpc1 3 5 3 0>,
|
||||
<&gpc1 4 5 3 0>;
|
||||
status = "okay";
|
||||
|
||||
w25x80@0 {
|
||||
@@ -173,7 +178,7 @@
|
||||
spi-max-frequency = <1000000>;
|
||||
|
||||
controller-data {
|
||||
cs-gpio = <&gpc1 2 1 0 3>;
|
||||
cs-gpio = <&gpc1 2 0>;
|
||||
samsung,spi-feedback-delay = <0>;
|
||||
};
|
||||
|
||||
@@ -189,4 +194,16 @@
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
fixed-rate-clocks {
|
||||
xxti {
|
||||
compatible = "samsung,clock-xxti";
|
||||
clock-frequency = <12000000>;
|
||||
};
|
||||
|
||||
xusbxti {
|
||||
compatible = "samsung,clock-xusbxti";
|
||||
clock-frequency = <24000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@@ -289,4 +289,16 @@
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
fixed-rate-clocks {
|
||||
xxti {
|
||||
compatible = "samsung,clock-xxti";
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
|
||||
xusbxti {
|
||||
compatible = "samsung,clock-xusbxti";
|
||||
clock-frequency = <24000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@@ -47,6 +47,36 @@
|
||||
<0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>;
|
||||
};
|
||||
|
||||
mct@10050000 {
|
||||
compatible = "samsung,exynos4210-mct";
|
||||
reg = <0x10050000 0x800>;
|
||||
interrupt-controller;
|
||||
#interrups-cells = <2>;
|
||||
interrupt-parent = <&mct_map>;
|
||||
interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
|
||||
<4 0>, <5 0>;
|
||||
clocks = <&clock 3>, <&clock 344>;
|
||||
clock-names = "fin_pll", "mct";
|
||||
|
||||
mct_map: mct-map {
|
||||
#interrupt-cells = <2>;
|
||||
#address-cells = <0>;
|
||||
#size-cells = <0>;
|
||||
interrupt-map = <0x0 0 &gic 0 57 0>,
|
||||
<0x1 0 &gic 0 69 0>,
|
||||
<0x2 0 &combiner 12 6>,
|
||||
<0x3 0 &combiner 12 7>,
|
||||
<0x4 0 &gic 0 42 0>,
|
||||
<0x5 0 &gic 0 48 0>;
|
||||
};
|
||||
};
|
||||
|
||||
clock: clock-controller@0x10030000 {
|
||||
compatible = "samsung,exynos4210-clock";
|
||||
reg = <0x10030000 0x20000>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
pinctrl_0: pinctrl@11400000 {
|
||||
compatible = "samsung,exynos4210-pinctrl";
|
||||
reg = <0x11400000 0x1000>;
|
||||
@@ -76,4 +106,11 @@
|
||||
reg = <0x100C0000 0x100>;
|
||||
interrupts = <2 4>;
|
||||
};
|
||||
|
||||
g2d@12800000 {
|
||||
compatible = "samsung,s5pv210-g2d";
|
||||
reg = <0x12800000 0x1000>;
|
||||
interrupts = <0 89 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
@@ -25,4 +25,26 @@
|
||||
gic:interrupt-controller@10490000 {
|
||||
cpu-offset = <0x8000>;
|
||||
};
|
||||
|
||||
mct@10050000 {
|
||||
compatible = "samsung,exynos4412-mct";
|
||||
reg = <0x10050000 0x800>;
|
||||
interrupt-controller;
|
||||
#interrups-cells = <2>;
|
||||
interrupt-parent = <&mct_map>;
|
||||
interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
|
||||
<4 0>, <5 0>;
|
||||
|
||||
mct_map: mct-map {
|
||||
#interrupt-cells = <2>;
|
||||
#address-cells = <0>;
|
||||
#size-cells = <0>;
|
||||
interrupt-map = <0x0 0 &gic 0 57 0>,
|
||||
<0x1 0 &combiner 12 5>,
|
||||
<0x2 0 &combiner 12 6>,
|
||||
<0x3 0 &combiner 12 7>,
|
||||
<0x4 0 &gic 1 12 0>,
|
||||
<0x5 0 &gic 1 12 0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@@ -0,0 +1,109 @@
|
||||
/*
|
||||
* Hardkernel's Exynos4412 based ODROID-X board device tree source
|
||||
*
|
||||
* Copyright (c) 2012 Dongjin Kim <tobetter@gmail.com>
|
||||
*
|
||||
* Device tree source file for Hardkernel's ODROID-X board which is based on
|
||||
* Samsung's Exynos4412 SoC.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "exynos4412.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Hardkernel ODROID-X board based on Exynos4412";
|
||||
compatible = "hardkernel,odroid-x", "samsung,exynos4412";
|
||||
|
||||
memory {
|
||||
reg = <0x40000000 0x40000000>;
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
led1 {
|
||||
label = "led1:heart";
|
||||
gpios = <&gpc1 0 1>;
|
||||
default-state = "on";
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
led2 {
|
||||
label = "led2:mmc0";
|
||||
gpios = <&gpc1 2 1>;
|
||||
default-state = "on";
|
||||
linux,default-trigger = "mmc0";
|
||||
};
|
||||
};
|
||||
|
||||
mshc@12550000 {
|
||||
pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
|
||||
num-slots = <1>;
|
||||
supports-highspeed;
|
||||
broken-cd;
|
||||
fifo-depth = <0x80>;
|
||||
card-detect-delay = <200>;
|
||||
samsung,dw-mshc-ciu-div = <3>;
|
||||
samsung,dw-mshc-sdr-timing = <2 3>;
|
||||
samsung,dw-mshc-ddr-timing = <1 2>;
|
||||
|
||||
slot@0 {
|
||||
reg = <0>;
|
||||
bus-width = <8>;
|
||||
};
|
||||
};
|
||||
|
||||
regulator_p3v3 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "p3v3_en";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
gpio = <&gpa1 1 1>;
|
||||
enable-active-high;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
rtc@10070000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
sdhci@12530000 {
|
||||
bus-width = <4>;
|
||||
pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
serial@13800000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
serial@13810000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
serial@13820000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
serial@13830000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
fixed-rate-clocks {
|
||||
xxti {
|
||||
compatible = "samsung,clock-xxti";
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
|
||||
xusbxti {
|
||||
compatible = "samsung,clock-xusbxti";
|
||||
clock-frequency = <24000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
@@ -0,0 +1,451 @@
|
||||
/*
|
||||
* Insignal's Exynos4412 based Origen board device tree source
|
||||
*
|
||||
* Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
|
||||
* http://www.samsung.com
|
||||
*
|
||||
* Device tree source file for Insignal's Origen board which is based on
|
||||
* Samsung's Exynos4412 SoC.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "exynos4412.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Insignal Origen evaluation board based on Exynos4412";
|
||||
compatible = "insignal,origen4412", "samsung,exynos4412";
|
||||
|
||||
memory {
|
||||
reg = <0x40000000 0x40000000>;
|
||||
};
|
||||
|
||||
chosen {
|
||||
bootargs ="console=ttySAC2,115200";
|
||||
};
|
||||
|
||||
mmc_reg: voltage-regulator {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "VMEM_VDD_2.8V";
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <2800000>;
|
||||
gpio = <&gpx1 1 0>;
|
||||
enable-active-high;
|
||||
};
|
||||
|
||||
sdhci@12530000 {
|
||||
bus-width = <4>;
|
||||
pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4 &sd2_cd>;
|
||||
pinctrl-names = "default";
|
||||
vmmc-supply = <&mmc_reg>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
mshc@12550000 {
|
||||
pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
|
||||
num-slots = <1>;
|
||||
supports-highspeed;
|
||||
broken-cd;
|
||||
fifo-depth = <0x80>;
|
||||
card-detect-delay = <200>;
|
||||
samsung,dw-mshc-ciu-div = <3>;
|
||||
samsung,dw-mshc-sdr-timing = <2 3>;
|
||||
samsung,dw-mshc-ddr-timing = <1 2>;
|
||||
|
||||
slot@0 {
|
||||
reg = <0>;
|
||||
bus-width = <8>;
|
||||
};
|
||||
};
|
||||
|
||||
codec@13400000 {
|
||||
samsung,mfc-r = <0x43000000 0x800000>;
|
||||
samsung,mfc-l = <0x51000000 0x800000>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
fimd@11c00000 {
|
||||
pinctrl-0 = <&lcd_clk &lcd_data24 &pwm1_out>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
display-timings {
|
||||
native-mode = <&timing0>;
|
||||
timing0: timing {
|
||||
clock-frequency = <50000>;
|
||||
hactive = <1024>;
|
||||
vactive = <600>;
|
||||
hfront-porch = <64>;
|
||||
hback-porch = <16>;
|
||||
hsync-len = <48>;
|
||||
vback-porch = <64>;
|
||||
vfront-porch = <16>;
|
||||
vsync-len = <3>;
|
||||
};
|
||||
};
|
||||
|
||||
serial@13800000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
serial@13810000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
serial@13820000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
serial@13830000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
i2c@13860000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
samsung,i2c-sda-delay = <100>;
|
||||
samsung,i2c-max-bus-freq = <20000>;
|
||||
pinctrl-0 = <&i2c0_bus>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
|
||||
s5m8767_pmic@66 {
|
||||
compatible = "samsung,s5m8767-pmic";
|
||||
reg = <0x66>;
|
||||
|
||||
s5m8767,pmic-buck-default-dvs-idx = <3>;
|
||||
|
||||
s5m8767,pmic-buck-dvs-gpios = <&gpx2 3 0>,
|
||||
<&gpx2 4 0>,
|
||||
<&gpx2 5 0>;
|
||||
|
||||
s5m8767,pmic-buck-ds-gpios = <&gpm3 5 0>,
|
||||
<&gpm3 6 0>,
|
||||
<&gpm3 7 0>;
|
||||
|
||||
s5m8767,pmic-buck2-dvs-voltage = <1250000>, <1200000>,
|
||||
<1200000>, <1200000>,
|
||||
<1200000>, <1200000>,
|
||||
<1200000>, <1200000>;
|
||||
|
||||
s5m8767,pmic-buck3-dvs-voltage = <1100000>, <1100000>,
|
||||
<1100000>, <1100000>,
|
||||
<1100000>, <1100000>,
|
||||
<1100000>, <1100000>;
|
||||
|
||||
s5m8767,pmic-buck4-dvs-voltage = <1200000>, <1200000>,
|
||||
<1200000>, <1200000>,
|
||||
<1200000>, <1200000>,
|
||||
<1200000>, <1200000>;
|
||||
|
||||
regulators {
|
||||
ldo1_reg: LDO1 {
|
||||
regulator-name = "VDD_ALIVE";
|
||||
regulator-min-microvolt = <1100000>;
|
||||
regulator-max-microvolt = <1100000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
op_mode = <1>; /* Normal Mode */
|
||||
};
|
||||
|
||||
ldo2_reg: LDO2 {
|
||||
regulator-name = "VDDQ_M12";
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <1200000>;
|
||||
regulator-always-on;
|
||||
op_mode = <1>; /* Normal Mode */
|
||||
};
|
||||
|
||||
ldo3_reg: LDO3 {
|
||||
regulator-name = "VDDIOAP_18";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
op_mode = <1>; /* Normal Mode */
|
||||
};
|
||||
|
||||
ldo4_reg: LDO4 {
|
||||
regulator-name = "VDDQ_PRE";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
op_mode = <1>; /* Normal Mode */
|
||||
};
|
||||
|
||||
ldo5_reg: LDO5 {
|
||||
regulator-name = "VDD18_2M";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
op_mode = <1>; /* Normal Mode */
|
||||
};
|
||||
|
||||
ldo6_reg: LDO6 {
|
||||
regulator-name = "VDD10_MPLL";
|
||||
regulator-min-microvolt = <1000000>;
|
||||
regulator-max-microvolt = <1000000>;
|
||||
regulator-always-on;
|
||||
op_mode = <1>; /* Normal Mode */
|
||||
};
|
||||
|
||||
ldo7_reg: LDO7 {
|
||||
regulator-name = "VDD10_XPLL";
|
||||
regulator-min-microvolt = <1000000>;
|
||||
regulator-max-microvolt = <1000000>;
|
||||
regulator-always-on;
|
||||
op_mode = <1>; /* Normal Mode */
|
||||
};
|
||||
|
||||
ldo8_reg: LDO8 {
|
||||
regulator-name = "VDD10_MIPI";
|
||||
regulator-min-microvolt = <1000000>;
|
||||
regulator-max-microvolt = <1000000>;
|
||||
regulator-always-on;
|
||||
op_mode = <1>; /* Normal Mode */
|
||||
};
|
||||
|
||||
ldo9_reg: LDO9 {
|
||||
regulator-name = "VDD33_LCD";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
op_mode = <1>; /* Normal Mode */
|
||||
};
|
||||
|
||||
ldo10_reg: LDO10 {
|
||||
regulator-name = "VDD18_MIPI";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
op_mode = <1>; /* Normal Mode */
|
||||
};
|
||||
|
||||
ldo11_reg: LDO11 {
|
||||
regulator-name = "VDD18_ABB1";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
op_mode = <1>; /* Normal Mode */
|
||||
};
|
||||
|
||||
ldo12_reg: LDO12 {
|
||||
regulator-name = "VDD33_UOTG";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
op_mode = <1>; /* Normal Mode */
|
||||
};
|
||||
|
||||
ldo13_reg: LDO13 {
|
||||
regulator-name = "VDDIOPERI_18";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
op_mode = <1>; /* Normal Mode */
|
||||
};
|
||||
|
||||
ldo14_reg: LDO14 {
|
||||
regulator-name = "VDD18_ABB02";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
op_mode = <1>; /* Normal Mode */
|
||||
};
|
||||
|
||||
ldo15_reg: LDO15 {
|
||||
regulator-name = "VDD10_USH";
|
||||
regulator-min-microvolt = <1000000>;
|
||||
regulator-max-microvolt = <1000000>;
|
||||
regulator-always-on;
|
||||
op_mode = <1>; /* Normal Mode */
|
||||
};
|
||||
|
||||
ldo16_reg: LDO16 {
|
||||
regulator-name = "VDD18_HSIC";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
op_mode = <1>; /* Normal Mode */
|
||||
};
|
||||
|
||||
ldo17_reg: LDO17 {
|
||||
regulator-name = "VDDIOAP_MMC012_28";
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <2800000>;
|
||||
regulator-always-on;
|
||||
op_mode = <1>; /* Normal Mode */
|
||||
};
|
||||
|
||||
ldo18_reg: LDO18 {
|
||||
regulator-name = "VDDIOPERI_28";
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <2800000>;
|
||||
regulator-always-on;
|
||||
op_mode = <1>; /* Normal Mode */
|
||||
};
|
||||
|
||||
ldo19_reg: LDO19 {
|
||||
regulator-name = "DVDD25";
|
||||
regulator-min-microvolt = <2500000>;
|
||||
regulator-max-microvolt = <2500000>;
|
||||
regulator-always-on;
|
||||
op_mode = <1>; /* Normal Mode */
|
||||
};
|
||||
|
||||
ldo20_reg: LDO20 {
|
||||
regulator-name = "VDD28_CAM";
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <2800000>;
|
||||
regulator-always-on;
|
||||
op_mode = <1>; /* Normal Mode */
|
||||
};
|
||||
|
||||
ldo21_reg: LDO21 {
|
||||
regulator-name = "VDD28_AF";
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <2800000>;
|
||||
regulator-always-on;
|
||||
op_mode = <1>; /* Normal Mode */
|
||||
};
|
||||
|
||||
ldo22_reg: LDO22 {
|
||||
regulator-name = "VDDA28_2M";
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <2800000>;
|
||||
regulator-always-on;
|
||||
op_mode = <1>; /* Normal Mode */
|
||||
};
|
||||
|
||||
ldo23_reg: LDO23 {
|
||||
regulator-name = "VDD28_TF";
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <2800000>;
|
||||
regulator-always-on;
|
||||
op_mode = <1>; /* Normal Mode */
|
||||
};
|
||||
|
||||
ldo24_reg: LDO24 {
|
||||
regulator-name = "VDD33_A31";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
op_mode = <1>; /* Normal Mode */
|
||||
};
|
||||
|
||||
ldo25_reg: LDO25 {
|
||||
regulator-name = "VDD18_CAM";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
op_mode = <1>; /* Normal Mode */
|
||||
};
|
||||
|
||||
ldo26_reg: LDO26 {
|
||||
regulator-name = "VDD18_A31";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
op_mode = <1>; /* Normal Mode */
|
||||
};
|
||||
|
||||
ldo27_reg: LDO27 {
|
||||
regulator-name = "GPS_1V8";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
op_mode = <1>; /* Normal Mode */
|
||||
};
|
||||
|
||||
ldo28_reg: LDO28 {
|
||||
regulator-name = "DVDD12";
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <1200000>;
|
||||
regulator-always-on;
|
||||
op_mode = <1>; /* Normal Mode */
|
||||
};
|
||||
|
||||
buck1_reg: BUCK1 {
|
||||
regulator-name = "vdd_mif";
|
||||
regulator-min-microvolt = <950000>;
|
||||
regulator-max-microvolt = <1100000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
op_mode = <1>; /* Normal Mode */
|
||||
};
|
||||
|
||||
buck2_reg: BUCK2 {
|
||||
regulator-name = "vdd_arm";
|
||||
regulator-min-microvolt = <925000>;
|
||||
regulator-max-microvolt = <1300000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
op_mode = <1>; /* Normal Mode */
|
||||
};
|
||||
|
||||
buck3_reg: BUCK3 {
|
||||
regulator-name = "vdd_int";
|
||||
regulator-min-microvolt = <900000>;
|
||||
regulator-max-microvolt = <1200000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
op_mode = <1>; /* Normal Mode */
|
||||
};
|
||||
|
||||
buck4_reg: BUCK4 {
|
||||
regulator-name = "vdd_g3d";
|
||||
regulator-min-microvolt = <750000>;
|
||||
regulator-max-microvolt = <1500000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
op_mode = <1>; /* Normal Mode */
|
||||
};
|
||||
|
||||
buck5_reg: BUCK5 {
|
||||
regulator-name = "vdd_m12";
|
||||
regulator-min-microvolt = <750000>;
|
||||
regulator-max-microvolt = <1500000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
op_mode = <1>; /* Normal Mode */
|
||||
};
|
||||
|
||||
buck6_reg: BUCK6 {
|
||||
regulator-name = "vdd12_5m";
|
||||
regulator-min-microvolt = <750000>;
|
||||
regulator-max-microvolt = <1500000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
op_mode = <1>; /* Normal Mode */
|
||||
};
|
||||
|
||||
buck9_reg: BUCK9 {
|
||||
regulator-name = "vddf28_emmc";
|
||||
regulator-min-microvolt = <750000>;
|
||||
regulator-max-microvolt = <3000000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
op_mode = <1>; /* Normal Mode */
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
fixed-rate-clocks {
|
||||
xxti {
|
||||
compatible = "samsung,clock-xxti";
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
|
||||
xusbxti {
|
||||
compatible = "samsung,clock-xusbxti";
|
||||
clock-frequency = <24000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user