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Merge tag 'v3.17-rc4' into perf/core, to pick up fixes

Browse Source 
Signed-off-by: Ingo Molnar <mingo@kernel.org>
This commit is contained in:
Ingo Molnar
2014-09-09 06:48:07 +02:00
parent 39b5a56ec0 2ce7598c9a
commit bdea534db8
570 changed files with 5124 additions and 2859 deletions
Download Patch File Download Diff File Expand all files Collapse all files
Documentation/SubmittingPatches
+1
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@@ -794,6 +794,7 @@ Greg Kroah-Hartman, "How to piss off a kernel subsystem maintainer".
<http://www.kroah.com/log/linux/maintainer-03.html>
<http://www.kroah.com/log/linux/maintainer-04.html>
<http://www.kroah.com/log/linux/maintainer-05.html>
<http://www.kroah.com/log/linux/maintainer-06.html>
NO!!!! No more huge patch bombs to linux-kernel@vger.kernel.org people!
<https://lkml.org/lkml/2005/7/11/336>
Documentation/devicetree/bindings/input/atmel,maxtouch.txt
+11
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@@ -15,6 +15,17 @@ Optional properties for main touchpad device:
keycode generated by each GPIO. Linux keycodes are defined in
<dt-bindings/input/input.h>.
- linux,gpio-keymap: When enabled, the SPT_GPIOPWN_T19 object sends messages
on GPIO bit changes. An array of up to 8 entries can be provided
indicating the Linux keycode mapped to each bit of the status byte,
starting at the LSB. Linux keycodes are defined in
<dt-bindings/input/input.h>.
Note: the numbering of the GPIOs and the bit they start at varies between
maXTouch devices. You must either refer to the documentation, or
experiment to determine which bit corresponds to which input. Use
KEY_RESERVED for unused padding values.
Example:
touch@4b {
Documentation/devicetree/bindings/mfd/tc3589x.txt
+107
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@@ -0,0 +1,107 @@
* Toshiba TC3589x multi-purpose expander
The Toshiba TC3589x series are I2C-based MFD devices which may expose the
following built-in devices: gpio, keypad, rotator (vibrator), PWM (for
e.g. LEDs or vibrators) The included models are:
- TC35890
- TC35892
- TC35893
- TC35894
- TC35895
- TC35896
Required properties:
- compatible : must be "toshiba,tc35890", "toshiba,tc35892", "toshiba,tc35893",
"toshiba,tc35894", "toshiba,tc35895" or "toshiba,tc35896"
- reg : I2C address of the device
- interrupt-parent : specifies which IRQ controller we're connected to
- interrupts : the interrupt on the parent the controller is connected to
- interrupt-controller : marks the device node as an interrupt controller
- #interrupt-cells : should be <1>, the first cell is the IRQ offset on this
TC3589x interrupt controller.
Optional nodes:
- GPIO
This GPIO module inside the TC3589x has 24 (TC35890, TC35892) or 20
(other models) GPIO lines.
- compatible : must be "toshiba,tc3589x-gpio"
- interrupts : interrupt on the parent, which must be the tc3589x MFD device
- interrupt-controller : marks the device node as an interrupt controller
- #interrupt-cells : should be <2>, the first cell is the IRQ offset on this
TC3589x GPIO interrupt controller, the second cell is the interrupt flags
in accordance with <dt-bindings/interrupt-controller/irq.h>. The following
flags are valid:
- IRQ_TYPE_LEVEL_LOW
- IRQ_TYPE_LEVEL_HIGH
- IRQ_TYPE_EDGE_RISING
- IRQ_TYPE_EDGE_FALLING
- IRQ_TYPE_EDGE_BOTH
- gpio-controller : marks the device node as a GPIO controller
- #gpio-cells : should be <2>, the first cell is the GPIO offset on this
GPIO controller, the second cell is the flags.
- Keypad
This keypad is the same on all variants, supporting up to 96 different
keys. The linux-specific properties are modeled on those already existing
in other input drivers.
- compatible : must be "toshiba,tc3589x-keypad"
- debounce-delay-ms : debounce interval in milliseconds
- keypad,num-rows : number of rows in the matrix, see
bindings/input/matrix-keymap.txt
- keypad,num-columns : number of columns in the matrix, see
bindings/input/matrix-keymap.txt
- linux,keymap: the definition can be found in
bindings/input/matrix-keymap.txt
- linux,no-autorepeat: do no enable autorepeat feature.
- linux,wakeup: use any event on keypad as wakeup event.
Example:
tc35893@44 {
compatible = "toshiba,tc35893";
reg = <0x44>;
interrupt-parent = <&gpio6>;
interrupts = <26 IRQ_TYPE_EDGE_RISING>;
interrupt-controller;
#interrupt-cells = <1>;
tc3589x_gpio {
compatible = "toshiba,tc3589x-gpio";
interrupts = <0>;
interrupt-controller;
#interrupt-cells = <2>;
gpio-controller;
#gpio-cells = <2>;
};
tc3589x_keypad {
compatible = "toshiba,tc3589x-keypad";
interrupts = <6>;
debounce-delay-ms = <4>;
keypad,num-columns = <8>;
keypad,num-rows = <8>;
linux,no-autorepeat;
linux,wakeup;
linux,keymap = <0x0301006b
0x04010066
0x06040072
0x040200d7
0x0303006a
0x0205000e
0x0607008b
0x0500001c
0x0403000b
0x03040034
0x05020067
0x0305006c
0x040500e7
0x0005009e
0x06020073
0x01030039
0x07060069
0x050500d9>;
};
};
Documentation/devicetree/bindings/mtd/gpmc-nand.txt
+1 -1
View File
@@ -22,7 +22,7 @@ Optional properties:
width of 8 is assumed.
- ti,nand-ecc-opt: A string setting the ECC layout to use. One of:
"sw" <deprecated> use "ham1" instead
"sw" 1-bit Hamming ecc code via software
"hw" <deprecated> use "ham1" instead
"hw-romcode" <deprecated> use "ham1" instead
"ham1" 1-bit Hamming ecc code
Documentation/devicetree/bindings/pinctrl/qcom,apq8064-pinctrl.txt
+1 -1
View File
@@ -62,7 +62,7 @@ Example:
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
interrupts = <0 32 0x4>;
interrupts = <0 16 0x4>;
pinctrl-names = "default";
pinctrl-0 = <&gsbi5_uart_default>;
Documentation/devicetree/bindings/regulator/tps65090.txt
+2 -2
View File
@@ -45,8 +45,8 @@ Example:
infet5-supply = <&some_reg>;
infet6-supply = <&some_reg>;
infet7-supply = <&some_reg>;
vsys_l1-supply = <&some_reg>;
vsys_l2-supply = <&some_reg>;
vsys-l1-supply = <&some_reg>;
vsys-l2-supply = <&some_reg>;
regulators {
dcdc1 {
Documentation/devicetree/bindings/sound/adi,axi-spdif-tx.txt
+1 -1
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@@ -1,7 +1,7 @@
ADI AXI-SPDIF controller
Required properties:
- compatible : Must be "adi,axi-spdif-1.00.a"
- compatible : Must be "adi,axi-spdif-tx-1.00.a"
- reg : Must contain SPDIF core's registers location and length
- clocks : Pairs of phandle and specifier referencing the controller's clocks.
The controller expects two clocks, the clock used for the AXI interface and
Documentation/dma-buf-sharing.txt
+8 -6
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@@ -56,10 +56,10 @@ The dma_buf buffer sharing API usage contains the following steps:
size_t size, int flags,
const char *exp_name)
If this succeeds, dma_buf_export allocates a dma_buf structure, and returns a
pointer to the same. It also associates an anonymous file with this buffer,
so it can be exported. On failure to allocate the dma_buf object, it returns
NULL.
If this succeeds, dma_buf_export_named allocates a dma_buf structure, and
returns a pointer to the same. It also associates an anonymous file with this
buffer, so it can be exported. On failure to allocate the dma_buf object,
it returns NULL.
'exp_name' is the name of exporter - to facilitate information while
debugging.
@@ -76,7 +76,7 @@ The dma_buf buffer sharing API usage contains the following steps:
drivers and/or processes.
Interface:
int dma_buf_fd(struct dma_buf *dmabuf)
int dma_buf_fd(struct dma_buf *dmabuf, int flags)
This API installs an fd for the anonymous file associated with this buffer;
returns either 'fd', or error.
@@ -157,7 +157,9 @@ to request use of buffer for allocation.
"dma_buf->ops->" indirection from the users of this interface.
In struct dma_buf_ops, unmap_dma_buf is defined as
void (*unmap_dma_buf)(struct dma_buf_attachment *, struct sg_table *);
void (*unmap_dma_buf)(struct dma_buf_attachment *,
struct sg_table *,
enum dma_data_direction);
unmap_dma_buf signifies the end-of-DMA for the attachment provided. Like
map_dma_buf, this API also must be implemented by the exporter.
Documentation/filesystems/nfs/nfs-rdma.txt
+9 -7
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@@ -138,9 +138,9 @@ Installation
- Build, install, reboot
The NFS/RDMA code will be enabled automatically if NFS and RDMA
are turned on. The NFS/RDMA client and server are configured via the hidden
SUNRPC_XPRT_RDMA config option that depends on SUNRPC and INFINIBAND. The
value of SUNRPC_XPRT_RDMA will be:
are turned on. The NFS/RDMA client and server are configured via the
SUNRPC_XPRT_RDMA_CLIENT and SUNRPC_XPRT_RDMA_SERVER config options that both
depend on SUNRPC and INFINIBAND. The default value of both options will be:
- N if either SUNRPC or INFINIBAND are N, in this case the NFS/RDMA client
and server will not be built
@@ -235,8 +235,9 @@ NFS/RDMA Setup
- Start the NFS server
If the NFS/RDMA server was built as a module (CONFIG_SUNRPC_XPRT_RDMA=m in
kernel config), load the RDMA transport module:
If the NFS/RDMA server was built as a module
(CONFIG_SUNRPC_XPRT_RDMA_SERVER=m in kernel config), load the RDMA
transport module:
$ modprobe svcrdma
@@ -255,8 +256,9 @@ NFS/RDMA Setup
- On the client system
If the NFS/RDMA client was built as a module (CONFIG_SUNRPC_XPRT_RDMA=m in
kernel config), load the RDMA client module:
If the NFS/RDMA client was built as a module
(CONFIG_SUNRPC_XPRT_RDMA_CLIENT=m in kernel config), load the RDMA client
module:
$ modprobe xprtrdma.ko
Documentation/filesystems/seq_file.txt
+33
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@@ -235,6 +235,39 @@ be used for more than one file, you can store an arbitrary pointer in the
private field of the seq_file structure; that value can then be retrieved
by the iterator functions.
There is also a wrapper function to seq_open() called seq_open_private(). It
kmallocs a zero filled block of memory and stores a pointer to it in the
private field of the seq_file structure, returning 0 on success. The
block size is specified in a third parameter to the function, e.g.:
static int ct_open(struct inode *inode, struct file *file)
{
return seq_open_private(file, &ct_seq_ops,
sizeof(struct mystruct));
}
There is also a variant function, __seq_open_private(), which is functionally
identical except that, if successful, it returns the pointer to the allocated
memory block, allowing further initialisation e.g.:
static int ct_open(struct inode *inode, struct file *file)
{
struct mystruct *p =
__seq_open_private(file, &ct_seq_ops, sizeof(*p));
if (!p)
return -ENOMEM;
p->foo = bar; /* initialize my stuff */
...
p->baz = true;
return 0;
}
A corresponding close function, seq_release_private() is available which
frees the memory allocated in the corresponding open.
The other operations of interest - read(), llseek(), and release() - are
all implemented by the seq_file code itself. So a virtual file's
file_operations structure will look like:
Documentation/gpio/consumer.txt
+23 -1
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@@ -53,7 +53,20 @@ with IS_ERR() (they will never return a NULL pointer). -ENOENT will be returned
if and only if no GPIO has been assigned to the device/function/index triplet,
other error codes are used for cases where a GPIO has been assigned but an error
occurred while trying to acquire it. This is useful to discriminate between mere
errors and an absence of GPIO for optional GPIO parameters.
errors and an absence of GPIO for optional GPIO parameters. For the common
pattern where a GPIO is optional, the gpiod_get_optional() and
gpiod_get_index_optional() functions can be used. These functions return NULL
instead of -ENOENT if no GPIO has been assigned to the requested function:
struct gpio_desc *gpiod_get_optional(struct device *dev,
const char *con_id,
enum gpiod_flags flags)
struct gpio_desc *gpiod_get_index_optional(struct device *dev,
const char *con_id,
unsigned int index,
enum gpiod_flags flags)
Device-managed variants of these functions are also defined:
@@ -65,6 +78,15 @@ Device-managed variants of these functions are also defined:
unsigned int idx,
enum gpiod_flags flags)
struct gpio_desc *devm_gpiod_get_optional(struct device *dev,
const char *con_id,
enum gpiod_flags flags)
struct gpio_desc * devm_gpiod_get_index_optional(struct device *dev,
const char *con_id,
unsigned int index,
enum gpiod_flags flags)
A GPIO descriptor can be disposed of using the gpiod_put() function:
void gpiod_put(struct gpio_desc *desc)
Documentation/i2c/dev-interface
+5 -5
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@@ -57,12 +57,12 @@ Well, you are all set up now. You can now use SMBus commands or plain
I2C to communicate with your device. SMBus commands are preferred if
the device supports them. Both are illustrated below.
__u8 register = 0x10; /* Device register to access */
__u8 reg = 0x10; /* Device register to access */
__s32 res;
char buf[10];
/* Using SMBus commands */
res = i2c_smbus_read_word_data(file, register);
res = i2c_smbus_read_word_data(file, reg);
if (res < 0) {
/* ERROR HANDLING: i2c transaction failed */
} else {
@@ -70,11 +70,11 @@ the device supports them. Both are illustrated below.
}
/* Using I2C Write, equivalent of
i2c_smbus_write_word_data(file, register, 0x6543) */
buf[0] = register;
i2c_smbus_write_word_data(file, reg, 0x6543) */
buf[0] = reg;
buf[1] = 0x43;
buf[2] = 0x65;
if (write(file, buf, 3) ! =3) {
if (write(file, buf, 3) != 3) {
/* ERROR HANDLING: i2c transaction failed */
}
Documentation/kdump/kdump.txt
+33 -3
View File
@@ -18,7 +18,7 @@ memory image to a dump file on the local disk, or across the network to
a remote system.
Kdump and kexec are currently supported on the x86, x86_64, ppc64, ia64,
and s390x architectures.
s390x and arm architectures.
When the system kernel boots, it reserves a small section of memory for
the dump-capture kernel. This ensures that ongoing Direct Memory Access
@@ -112,7 +112,7 @@ There are two possible methods of using Kdump.
2) Or use the system kernel binary itself as dump-capture kernel and there is
no need to build a separate dump-capture kernel. This is possible
only with the architectures which support a relocatable kernel. As
of today, i386, x86_64, ppc64 and ia64 architectures support relocatable
of today, i386, x86_64, ppc64, ia64 and arm architectures support relocatable
kernel.
Building a relocatable kernel is advantageous from the point of view that
@@ -241,6 +241,13 @@ Dump-capture kernel config options (Arch Dependent, ia64)
kernel will be aligned to 64Mb, so if the start address is not then
any space below the alignment point will be wasted.
Dump-capture kernel config options (Arch Dependent, arm)
----------------------------------------------------------
- To use a relocatable kernel,
Enable "AUTO_ZRELADDR" support under "Boot" options:
AUTO_ZRELADDR=y
Extended crashkernel syntax
===========================
@@ -256,6 +263,10 @@ The syntax is:
crashkernel=<range1>:<size1>[,<range2>:<size2>,...][@offset]
range=start-[end]
Please note, on arm, the offset is required.
crashkernel=<range1>:<size1>[,<range2>:<size2>,...]@offset
range=start-[end]
'start' is inclusive and 'end' is exclusive.
For example:
@@ -296,6 +307,12 @@ Boot into System Kernel
on the memory consumption of the kdump system. In general this is not
dependent on the memory size of the production system.
On arm, use "crashkernel=Y@X". Note that the start address of the kernel
will be aligned to 128MiB (0x08000000), so if the start address is not then
any space below the alignment point may be overwritten by the dump-capture kernel,
which means it is possible that the vmcore is not that precise as expected.
Load the Dump-capture Kernel
============================
@@ -315,7 +332,8 @@ For ia64:
- Use vmlinux or vmlinuz.gz
For s390x:
- Use image or bzImage
For arm:
- Use zImage
If you are using a uncompressed vmlinux image then use following command
to load dump-capture kernel.
@@ -331,6 +349,15 @@ to load dump-capture kernel.
--initrd=<initrd-for-dump-capture-kernel> \
--append="root=<root-dev> <arch-specific-options>"
If you are using a compressed zImage, then use following command
to load dump-capture kernel.
kexec --type zImage -p <dump-capture-kernel-bzImage> \
--initrd=<initrd-for-dump-capture-kernel> \
--dtb=<dtb-for-dump-capture-kernel> \
--append="root=<root-dev> <arch-specific-options>"
Please note, that --args-linux does not need to be specified for ia64.
It is planned to make this a no-op on that architecture, but for now
it should be omitted
@@ -347,6 +374,9 @@ For ppc64:
For s390x:
"1 maxcpus=1 cgroup_disable=memory"
For arm:
"1 maxcpus=1 reset_devices"
Notes on loading the dump-capture kernel:
* By default, the ELF headers are stored in ELF64 format to support
Documentation/misc-devices/lis3lv02d
+1 -1
View File
@@ -59,7 +59,7 @@ acts similar to /dev/rtc and reacts on free-fall interrupts received
from the device. It supports blocking operations, poll/select and
fasync operation modes. You must read 1 bytes from the device. The
result is number of free-fall interrupts since the last successful
read (or 255 if number of interrupts would not fit). See the hpfall.c
read (or 255 if number of interrupts would not fit). See the freefall.c
file for an example on using the device.
Documentation/power/regulator/consumer.txt
+4 -3
View File
@@ -143,8 +143,9 @@ This will cause the core to recalculate the total load on the regulator (based
on all its consumers) and change operating mode (if necessary and permitted)
to best match the current operating load.
The load_uA value can be determined from the consumers datasheet. e.g.most
datasheets have tables showing the max current consumed in certain situations.
The load_uA value can be determined from the consumer's datasheet. e.g. most
datasheets have tables showing the maximum current consumed in certain
situations.
Most consumers will use indirect operating mode control since they have no
knowledge of the regulator or whether the regulator is shared with other
@@ -173,7 +174,7 @@ Consumers can register interest in regulator events by calling :-
int regulator_register_notifier(struct regulator *regulator,
struct notifier_block *nb);
Consumers can uregister interest by calling :-
Consumers can unregister interest by calling :-
int regulator_unregister_notifier(struct regulator *regulator,
struct notifier_block *nb);
Documentation/power/regulator/design.txt
+4 -4
View File
@@ -9,14 +9,14 @@ Safety
- Errors in regulator configuration can have very serious consequences
for the system, potentially including lasting hardware damage.
- It is not possible to automatically determine the power confugration
- It is not possible to automatically determine the power configuration
of the system - software-equivalent variants of the same chip may
have different power requirments, and not all components with power
have different power requirements, and not all components with power
requirements are visible to software.
=> The API should make no changes to the hardware state unless it has
specific knowledge that these changes are safe to do perform on
this particular system.
specific knowledge that these changes are safe to perform on this
particular system.
Consumer use cases
------------------
Documentation/power/regulator/machine.txt
+2 -2
View File
@@ -11,7 +11,7 @@ Consider the following machine :-
+-> [Consumer B @ 3.3V]
The drivers for consumers A & B must be mapped to the correct regulator in
order to control their power supply. This mapping can be achieved in machine
order to control their power supplies. This mapping can be achieved in machine
initialisation code by creating a struct regulator_consumer_supply for
each regulator.
@@ -39,7 +39,7 @@ to the 'Vcc' supply for Consumer A.
Constraints can now be registered by defining a struct regulator_init_data
for each regulator power domain. This structure also maps the consumers
to their supply regulator :-
to their supply regulators :-
static struct regulator_init_data regulator1_data = {
.constraints = {
Documentation/power/regulator/overview.txt
+3 -3
View File
@@ -36,11 +36,11 @@ Some terms used in this document:-
Consumers can be classified into two types:-
Static: consumer does not change its supply voltage or
current limit. It only needs to enable or disable it's
current limit. It only needs to enable or disable its
power supply. Its supply voltage is set by the hardware,
bootloader, firmware or kernel board initialisation code.
Dynamic: consumer needs to change it's supply voltage or
Dynamic: consumer needs to change its supply voltage or
current limit to meet operation demands.
@@ -156,7 +156,7 @@ relevant to non SoC devices and is split into the following four interfaces:-
This interface is for machine specific code and allows the creation of
voltage/current domains (with constraints) for each regulator. It can
provide regulator constraints that will prevent device damage through
overvoltage or over current caused by buggy client drivers. It also
overvoltage or overcurrent caused by buggy client drivers. It also
allows the creation of a regulator tree whereby some regulators are
supplied by others (similar to a clock tree).
Documentation/power/regulator/regulator.txt
+3 -3
View File
@@ -13,7 +13,7 @@ Drivers can register a regulator by calling :-
struct regulator_dev *regulator_register(struct regulator_desc *regulator_desc,
const struct regulator_config *config);
This will register the regulators capabilities and operations to the regulator
This will register the regulator's capabilities and operations to the regulator
core.
Regulators can be unregistered by calling :-
@@ -23,8 +23,8 @@ void regulator_unregister(struct regulator_dev *rdev);
Regulator Events
================
Regulators can send events (e.g. over temp, under voltage, etc) to consumer
drivers by calling :-
Regulators can send events (e.g. overtemperature, undervoltage, etc) to
consumer drivers by calling :-
int regulator_notifier_call_chain(struct regulator_dev *rdev,
unsigned long event, void *data);
Documentation/this_cpu_ops.txt
+169 -40
View File
@@ -2,26 +2,26 @@ this_cpu operations
-------------------
this_cpu operations are a way of optimizing access to per cpu
variables associated with the *currently* executing processor through
the use of segment registers (or a dedicated register where the cpu
permanently stored the beginning of the per cpu area for a specific
processor).
variables associated with the *currently* executing processor. This is
done through the use of segment registers (or a dedicated register where
the cpu permanently stored the beginning of the per cpu area for a
specific processor).
The this_cpu operations add a per cpu variable offset to the processor
specific percpu base and encode that operation in the instruction
this_cpu operations add a per cpu variable offset to the processor
specific per cpu base and encode that operation in the instruction
operating on the per cpu variable.
This means there are no atomicity issues between the calculation of
This means that there are no atomicity issues between the calculation of
the offset and the operation on the data. Therefore it is not
necessary to disable preempt or interrupts to ensure that the
necessary to disable preemption or interrupts to ensure that the
processor is not changed between the calculation of the address and
the operation on the data.
Read-modify-write operations are of particular interest. Frequently
processors have special lower latency instructions that can operate
without the typical synchronization overhead but still provide some
sort of relaxed atomicity guarantee. The x86 for example can execute
RMV (Read Modify Write) instructions like inc/dec/cmpxchg without the
without the typical synchronization overhead, but still provide some
sort of relaxed atomicity guarantees. The x86, for example, can execute
RMW (Read Modify Write) instructions like inc/dec/cmpxchg without the
lock prefix and the associated latency penalty.
Access to the variable without the lock prefix is not synchronized but
@@ -30,6 +30,38 @@ data specific to the currently executing processor. Only the current
processor should be accessing that variable and therefore there are no
concurrency issues with other processors in the system.
Please note that accesses by remote processors to a per cpu area are
exceptional situations and may impact performance and/or correctness
(remote write operations) of local RMW operations via this_cpu_*.
The main use of the this_cpu operations has been to optimize counter
operations.
The following this_cpu() operations with implied preemption protection
are defined. These operations can be used without worrying about
preemption and interrupts.
this_cpu_add()
this_cpu_read(pcp)
this_cpu_write(pcp, val)
this_cpu_add(pcp, val)
this_cpu_and(pcp, val)
this_cpu_or(pcp, val)
this_cpu_add_return(pcp, val)
this_cpu_xchg(pcp, nval)
this_cpu_cmpxchg(pcp, oval, nval)
this_cpu_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2)
this_cpu_sub(pcp, val)
this_cpu_inc(pcp)
this_cpu_dec(pcp)
this_cpu_sub_return(pcp, val)
this_cpu_inc_return(pcp)
this_cpu_dec_return(pcp)
Inner working of this_cpu operations
------------------------------------
On x86 the fs: or the gs: segment registers contain the base of the
per cpu area. It is then possible to simply use the segment override
to relocate a per cpu relative address to the proper per cpu area for
@@ -48,22 +80,21 @@ results in a single instruction
mov ax, gs:[x]
instead of a sequence of calculation of the address and then a fetch
from that address which occurs with the percpu operations. Before
from that address which occurs with the per cpu operations. Before
this_cpu_ops such sequence also required preempt disable/enable to
prevent the kernel from moving the thread to a different processor
while the calculation is performed.
The main use of the this_cpu operations has been to optimize counter
operations.
Consider the following this_cpu operation:
this_cpu_inc(x)
results in the following single instruction (no lock prefix!)
The above results in the following single instruction (no lock prefix!)
inc gs:[x]
instead of the following operations required if there is no segment
register.
register:
int *y;
int cpu;
@@ -73,10 +104,10 @@ register.
(*y)++;
put_cpu();
Note that these operations can only be used on percpu data that is
Note that these operations can only be used on per cpu data that is
reserved for a specific processor. Without disabling preemption in the
surrounding code this_cpu_inc() will only guarantee that one of the
percpu counters is correctly incremented. However, there is no
per cpu counters is correctly incremented. However, there is no
guarantee that the OS will not move the process directly before or
after the this_cpu instruction is executed. In general this means that
the value of the individual counters for each processor are
@@ -86,9 +117,9 @@ that is of interest.
Per cpu variables are used for performance reasons. Bouncing cache
lines can be avoided if multiple processors concurrently go through
the same code paths. Since each processor has its own per cpu
variables no concurrent cacheline updates take place. The price that
variables no concurrent cache line updates take place. The price that
has to be paid for this optimization is the need to add up the per cpu
counters when the value of the counter is needed.
counters when the value of a counter is needed.
Special operations:
@@ -100,33 +131,39 @@ Takes the offset of a per cpu variable (&x !) and returns the address
of the per cpu variable that belongs to the currently executing
processor. this_cpu_ptr avoids multiple steps that the common
get_cpu/put_cpu sequence requires. No processor number is
available. Instead the offset of the local per cpu area is simply
added to the percpu offset.
available. Instead, the offset of the local per cpu area is simply
added to the per cpu offset.
Note that this operation is usually used in a code segment when
preemption has been disabled. The pointer is then used to
access local per cpu data in a critical section. When preemption
is re-enabled this pointer is usually no longer useful since it may
no longer point to per cpu data of the current processor.
Per cpu variables and offsets
-----------------------------
Per cpu variables have *offsets* to the beginning of the percpu
Per cpu variables have *offsets* to the beginning of the per cpu
area. They do not have addresses although they look like that in the
code. Offsets cannot be directly dereferenced. The offset must be
added to a base pointer of a percpu area of a processor in order to
added to a base pointer of a per cpu area of a processor in order to
form a valid address.
Therefore the use of x or &x outside of the context of per cpu
operations is invalid and will generally be treated like a NULL
pointer dereference.
In the context of per cpu operations
DEFINE_PER_CPU(int, x);
x is a per cpu variable. Most this_cpu operations take a cpu
variable.
In the context of per cpu operations the above implies that x is a per
cpu variable. Most this_cpu operations take a cpu variable.
&x is the *offset* a per cpu variable. this_cpu_ptr() takes
the offset of a per cpu variable which makes this look a bit
strange.
int __percpu *p = &x;
&x and hence p is the *offset* of a per cpu variable. this_cpu_ptr()
takes the offset of a per cpu variable which makes this look a bit
strange.
Operations on a field of a per cpu structure
@@ -152,7 +189,7 @@ If we have an offset to struct s:
struct s __percpu *ps = &p;
z = this_cpu_dec(ps->m);
this_cpu_dec(ps->m);
z = this_cpu_inc_return(ps->n);
@@ -172,29 +209,52 @@ if we do not make use of this_cpu ops later to manipulate fields:
Variants of this_cpu ops
-------------------------
this_cpu ops are interrupt safe. Some architecture do not support
this_cpu ops are interrupt safe. Some architectures do not support
these per cpu local operations. In that case the operation must be
replaced by code that disables interrupts, then does the operations
that are guaranteed to be atomic and then reenable interrupts. Doing
that are guaranteed to be atomic and then re-enable interrupts. Doing
so is expensive. If there are other reasons why the scheduler cannot
change the processor we are executing on then there is no reason to
disable interrupts. For that purpose the __this_cpu operations are
provided. For example.
disable interrupts. For that purpose the following __this_cpu operations
are provided.
__this_cpu_inc(x);
These operations have no guarantee against concurrent interrupts or
preemption. If a per cpu variable is not used in an interrupt context
and the scheduler cannot preempt, then they are safe. If any interrupts
still occur while an operation is in progress and if the interrupt too
modifies the variable, then RMW actions can not be guaranteed to be
safe.
Will increment x and will not fallback to code that disables
__this_cpu_add()
__this_cpu_read(pcp)
__this_cpu_write(pcp, val)
__this_cpu_add(pcp, val)
__this_cpu_and(pcp, val)
__this_cpu_or(pcp, val)
__this_cpu_add_return(pcp, val)
__this_cpu_xchg(pcp, nval)
__this_cpu_cmpxchg(pcp, oval, nval)
__this_cpu_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2)
__this_cpu_sub(pcp, val)
__this_cpu_inc(pcp)
__this_cpu_dec(pcp)
__this_cpu_sub_return(pcp, val)
__this_cpu_inc_return(pcp)
__this_cpu_dec_return(pcp)
Will increment x and will not fall-back to code that disables
interrupts on platforms that cannot accomplish atomicity through
address relocation and a Read-Modify-Write operation in the same
instruction.
&this_cpu_ptr(pp)->n vs this_cpu_ptr(&pp->n)
--------------------------------------------
The first operation takes the offset and forms an address and then
adds the offset of the n field.
adds the offset of the n field. This may result in two add
instructions emitted by the compiler.
The second one first adds the two offsets and then does the
relocation. IMHO the second form looks cleaner and has an easier time
@@ -202,4 +262,73 @@ with (). The second form also is consistent with the way
this_cpu_read() and friends are used.
Christoph Lameter, April 3rd, 2013
Remote access to per cpu data
------------------------------
Per cpu data structures are designed to be used by one cpu exclusively.
If you use the variables as intended, this_cpu_ops() are guaranteed to
be "atomic" as no other CPU has access to these data structures.
There are special cases where you might need to access per cpu data
structures remotely. It is usually safe to do a remote read access
and that is frequently done to summarize counters. Remote write access
something which could be problematic because this_cpu ops do not
have lock semantics. A remote write may interfere with a this_cpu
RMW operation.
Remote write accesses to percpu data structures are highly discouraged
unless absolutely necessary. Please consider using an IPI to wake up
the remote CPU and perform the update to its per cpu area.
To access per-cpu data structure remotely, typically the per_cpu_ptr()
function is used:
DEFINE_PER_CPU(struct data, datap);
struct data *p = per_cpu_ptr(&datap, cpu);
This makes it explicit that we are getting ready to access a percpu
area remotely.
You can also do the following to convert the datap offset to an address
struct data *p = this_cpu_ptr(&datap);
but, passing of pointers calculated via this_cpu_ptr to other cpus is
unusual and should be avoided.
Remote access are typically only for reading the status of another cpus
per cpu data. Write accesses can cause unique problems due to the
relaxed synchronization requirements for this_cpu operations.
One example that illustrates some concerns with write operations is
the following scenario that occurs because two per cpu variables
share a cache-line but the relaxed synchronization is applied to
only one process updating the cache-line.
Consider the following example
struct test {
atomic_t a;
int b;
};
DEFINE_PER_CPU(struct test, onecacheline);
There is some concern about what would happen if the field 'a' is updated
remotely from one processor and the local processor would use this_cpu ops
to update field b. Care should be taken that such simultaneous accesses to
data within the same cache line are avoided. Also costly synchronization
may be necessary. IPIs are generally recommended in such scenarios instead
of a remote write to the per cpu area of another processor.
Even in cases where the remote writes are rare, please bear in
mind that a remote write will evict the cache line from the processor
that most likely will access it. If the processor wakes up and finds a
missing local cache line of a per cpu area, its performance and hence
the wake up times will be affected.
Christoph Lameter, August 4th, 2014
Pranith Kumar, Aug 2nd, 2014

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