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iwmc3200wifi: remove driver for unavailable hardware
This hardware never became available to normal humans. Leaving this driver imposes unwelcome maintenance costs for no clear benefit. Signed-off-by: John W. Linville <linville@tuxdriver.com> Acked-by: Samuel Ortiz <sameo@linux.intel.com>
This commit is contained in:
John W. Linville
@@ -3654,14 +3654,6 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/iwlwifi/iwlwifi.git
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S: Supported
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F: drivers/net/wireless/iwlwifi/
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INTEL WIRELESS MULTICOMM 3200 WIFI (iwmc3200wifi)
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M: Samuel Ortiz <samuel.ortiz@intel.com>
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M: Intel Linux Wireless <ilw@linux.intel.com>
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L: linux-wireless@vger.kernel.org
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S: Supported
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W: http://wireless.kernel.org/en/users/Drivers/iwmc3200wifi
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F: drivers/net/wireless/iwmc3200wifi/
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INTEL MANAGEMENT ENGINE (mei)
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M: Tomas Winkler <tomas.winkler@intel.com>
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L: linux-kernel@vger.kernel.org
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@@ -276,7 +276,6 @@ source "drivers/net/wireless/hostap/Kconfig"
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source "drivers/net/wireless/ipw2x00/Kconfig"
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source "drivers/net/wireless/iwlwifi/Kconfig"
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source "drivers/net/wireless/iwlegacy/Kconfig"
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source "drivers/net/wireless/iwmc3200wifi/Kconfig"
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source "drivers/net/wireless/libertas/Kconfig"
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source "drivers/net/wireless/orinoco/Kconfig"
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source "drivers/net/wireless/p54/Kconfig"
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@@ -53,8 +53,6 @@ obj-$(CONFIG_MAC80211_HWSIM) += mac80211_hwsim.o
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obj-$(CONFIG_WL_TI) += ti/
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obj-$(CONFIG_IWM) += iwmc3200wifi/
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obj-$(CONFIG_MWIFIEX) += mwifiex/
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obj-$(CONFIG_BRCMFMAC) += brcm80211/
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@@ -1,39 +0,0 @@
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config IWM
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tristate "Intel Wireless Multicomm 3200 WiFi driver (EXPERIMENTAL)"
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depends on MMC && EXPERIMENTAL
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depends on CFG80211
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select FW_LOADER
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select IWMC3200TOP
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help
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The Intel Wireless Multicomm 3200 hardware is a combo
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card with GPS, Bluetooth, WiMax and 802.11 radios. It
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runs over SDIO and is typically found on Moorestown
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based platform. This driver takes care of the 802.11
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part, which is a fullmac one.
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If you choose to build it as a module, it'll be called
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iwmc3200wifi.ko.
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config IWM_DEBUG
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bool "Enable full debugging output in iwmc3200wifi"
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depends on IWM && DEBUG_FS
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help
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This option will enable debug tracing and setting for iwm
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You can set the debug level and module through debugfs. By
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default all modules are set to the IWL_DL_ERR level.
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To see the list of debug modules and levels, see iwm/debug.h
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For example, if you want the full MLME debug output:
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echo 0xff > /sys/kernel/debug/iwm/phyN/debug/mlme
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Or, if you want the full debug, for all modules:
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echo 0xff > /sys/kernel/debug/iwm/phyN/debug/level
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echo 0xff > /sys/kernel/debug/iwm/phyN/debug/modules
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config IWM_TRACING
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bool "Enable event tracing for iwmc3200wifi"
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depends on IWM && EVENT_TRACING
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help
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Say Y here to trace all the commands and responses between
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the driver and firmware (including TX/RX frames) with ftrace.
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@@ -1,10 +0,0 @@
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obj-$(CONFIG_IWM) := iwmc3200wifi.o
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iwmc3200wifi-objs += main.o netdev.o rx.o tx.o sdio.o hal.o fw.o
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iwmc3200wifi-objs += commands.o cfg80211.o eeprom.o
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iwmc3200wifi-$(CONFIG_IWM_DEBUG) += debugfs.o
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iwmc3200wifi-$(CONFIG_IWM_TRACING) += trace.o
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CFLAGS_trace.o := -I$(src)
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ccflags-y += -D__CHECK_ENDIAN__
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@@ -1,57 +0,0 @@
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/*
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* Intel Wireless Multicomm 3200 WiFi driver
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*
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* Copyright (C) 2009 Intel Corporation <ilw@linux.intel.com>
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* Samuel Ortiz <samuel.ortiz@intel.com>
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* Zhu Yi <yi.zhu@intel.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License version
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* 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
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* 02110-1301, USA.
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*
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*/
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#ifndef __IWM_BUS_H__
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#define __IWM_BUS_H__
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#include "iwm.h"
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struct iwm_if_ops {
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int (*enable)(struct iwm_priv *iwm);
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int (*disable)(struct iwm_priv *iwm);
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int (*send_chunk)(struct iwm_priv *iwm, u8* buf, int count);
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void (*debugfs_init)(struct iwm_priv *iwm, struct dentry *parent_dir);
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void (*debugfs_exit)(struct iwm_priv *iwm);
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const char *umac_name;
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const char *calib_lmac_name;
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const char *lmac_name;
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};
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static inline int iwm_bus_send_chunk(struct iwm_priv *iwm, u8 *buf, int count)
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{
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return iwm->bus_ops->send_chunk(iwm, buf, count);
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}
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static inline int iwm_bus_enable(struct iwm_priv *iwm)
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{
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return iwm->bus_ops->enable(iwm);
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}
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static inline int iwm_bus_disable(struct iwm_priv *iwm)
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{
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return iwm->bus_ops->disable(iwm);
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}
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#endif
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File diff suppressed because it is too large
Load Diff
@@ -1,31 +0,0 @@
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/*
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* Intel Wireless Multicomm 3200 WiFi driver
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*
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* Copyright (C) 2009 Intel Corporation <ilw@linux.intel.com>
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* Samuel Ortiz <samuel.ortiz@intel.com>
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* Zhu Yi <yi.zhu@intel.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License version
|
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* 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
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* 02110-1301, USA.
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*
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*/
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#ifndef __IWM_CFG80211_H__
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#define __IWM_CFG80211_H__
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int iwm_cfg80211_inform_bss(struct iwm_priv *iwm);
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struct wireless_dev *iwm_wdev_alloc(int sizeof_bus, struct device *dev);
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void iwm_wdev_free(struct iwm_priv *iwm);
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#endif
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File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -1,123 +0,0 @@
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/*
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* Intel Wireless Multicomm 3200 WiFi driver
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*
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* Copyright (C) 2009 Intel Corporation <ilw@linux.intel.com>
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* Samuel Ortiz <samuel.ortiz@intel.com>
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* Zhu Yi <yi.zhu@intel.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License version
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* 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
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* 02110-1301, USA.
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*
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*/
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#ifndef __IWM_DEBUG_H__
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#define __IWM_DEBUG_H__
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#define IWM_ERR(p, f, a...) dev_err(iwm_to_dev(p), f, ## a)
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#define IWM_WARN(p, f, a...) dev_warn(iwm_to_dev(p), f, ## a)
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#define IWM_INFO(p, f, a...) dev_info(iwm_to_dev(p), f, ## a)
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#define IWM_CRIT(p, f, a...) dev_crit(iwm_to_dev(p), f, ## a)
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#ifdef CONFIG_IWM_DEBUG
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#define IWM_DEBUG_MODULE(i, level, module, f, a...) \
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do { \
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if (unlikely(i->dbg.dbg_module[IWM_DM_##module] >= (IWM_DL_##level)))\
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dev_printk(KERN_INFO, (iwm_to_dev(i)), \
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"%s " f, __func__ , ## a); \
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} while (0)
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#define IWM_HEXDUMP(i, level, module, pref, buf, len) \
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do { \
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if (unlikely(i->dbg.dbg_module[IWM_DM_##module] >= (IWM_DL_##level)))\
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print_hex_dump(KERN_INFO, pref, DUMP_PREFIX_OFFSET, \
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16, 1, buf, len, 1); \
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} while (0)
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#else
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#define IWM_DEBUG_MODULE(i, level, module, f, a...)
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#define IWM_HEXDUMP(i, level, module, pref, buf, len)
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#endif /* CONFIG_IWM_DEBUG */
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/* Debug modules */
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enum iwm_debug_module_id {
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IWM_DM_BOOT = 0,
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IWM_DM_FW,
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IWM_DM_SDIO,
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IWM_DM_NTF,
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IWM_DM_RX,
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IWM_DM_TX,
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IWM_DM_MLME,
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IWM_DM_CMD,
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IWM_DM_WEXT,
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__IWM_DM_NR,
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};
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#define IWM_DM_DEFAULT 0
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#define IWM_DBG_BOOT(i, l, f, a...) IWM_DEBUG_MODULE(i, l, BOOT, f, ## a)
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#define IWM_DBG_FW(i, l, f, a...) IWM_DEBUG_MODULE(i, l, FW, f, ## a)
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#define IWM_DBG_SDIO(i, l, f, a...) IWM_DEBUG_MODULE(i, l, SDIO, f, ## a)
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#define IWM_DBG_NTF(i, l, f, a...) IWM_DEBUG_MODULE(i, l, NTF, f, ## a)
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#define IWM_DBG_RX(i, l, f, a...) IWM_DEBUG_MODULE(i, l, RX, f, ## a)
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#define IWM_DBG_TX(i, l, f, a...) IWM_DEBUG_MODULE(i, l, TX, f, ## a)
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#define IWM_DBG_MLME(i, l, f, a...) IWM_DEBUG_MODULE(i, l, MLME, f, ## a)
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#define IWM_DBG_CMD(i, l, f, a...) IWM_DEBUG_MODULE(i, l, CMD, f, ## a)
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#define IWM_DBG_WEXT(i, l, f, a...) IWM_DEBUG_MODULE(i, l, WEXT, f, ## a)
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/* Debug levels */
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enum iwm_debug_level {
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IWM_DL_NONE = 0,
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IWM_DL_ERR,
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IWM_DL_WARN,
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IWM_DL_INFO,
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IWM_DL_DBG,
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};
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#define IWM_DL_DEFAULT IWM_DL_ERR
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struct iwm_debugfs {
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struct iwm_priv *iwm;
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struct dentry *rootdir;
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struct dentry *devdir;
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struct dentry *dbgdir;
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struct dentry *txdir;
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struct dentry *rxdir;
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struct dentry *busdir;
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u32 dbg_level;
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struct dentry *dbg_level_dentry;
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unsigned long dbg_modules;
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struct dentry *dbg_modules_dentry;
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u8 dbg_module[__IWM_DM_NR];
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struct dentry *dbg_module_dentries[__IWM_DM_NR];
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struct dentry *txq_dentry;
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struct dentry *tx_credit_dentry;
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struct dentry *rx_ticket_dentry;
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struct dentry *fw_err_dentry;
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};
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#ifdef CONFIG_IWM_DEBUG
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void iwm_debugfs_init(struct iwm_priv *iwm);
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void iwm_debugfs_exit(struct iwm_priv *iwm);
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#else
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static inline void iwm_debugfs_init(struct iwm_priv *iwm) {}
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static inline void iwm_debugfs_exit(struct iwm_priv *iwm) {}
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#endif
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#endif
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@@ -1,488 +0,0 @@
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/*
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* Intel Wireless Multicomm 3200 WiFi driver
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*
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* Copyright (C) 2009 Intel Corporation <ilw@linux.intel.com>
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* Samuel Ortiz <samuel.ortiz@intel.com>
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* Zhu Yi <yi.zhu@intel.com>
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*
|
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* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License version
|
||||
* 2 as published by the Free Software Foundation.
|
||||
*
|
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* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
|
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* 02110-1301, USA.
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*
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*/
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#include <linux/slab.h>
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#include <linux/kernel.h>
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#include <linux/bitops.h>
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#include <linux/debugfs.h>
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#include <linux/export.h>
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#include "iwm.h"
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#include "bus.h"
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#include "rx.h"
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#include "debug.h"
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static struct {
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u8 id;
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char *name;
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} iwm_debug_module[__IWM_DM_NR] = {
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{IWM_DM_BOOT, "boot"},
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{IWM_DM_FW, "fw"},
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{IWM_DM_SDIO, "sdio"},
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{IWM_DM_NTF, "ntf"},
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{IWM_DM_RX, "rx"},
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{IWM_DM_TX, "tx"},
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{IWM_DM_MLME, "mlme"},
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{IWM_DM_CMD, "cmd"},
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{IWM_DM_WEXT, "wext"},
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};
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#define add_dbg_module(dbg, name, id, initlevel) \
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do { \
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dbg.dbg_module[id] = (initlevel); \
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dbg.dbg_module_dentries[id] = \
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debugfs_create_x8(name, 0600, \
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dbg.dbgdir, \
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&(dbg.dbg_module[id])); \
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} while (0)
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static int iwm_debugfs_u32_read(void *data, u64 *val)
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{
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struct iwm_priv *iwm = data;
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*val = iwm->dbg.dbg_level;
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return 0;
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}
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static int iwm_debugfs_dbg_level_write(void *data, u64 val)
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{
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struct iwm_priv *iwm = data;
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int i;
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iwm->dbg.dbg_level = val;
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for (i = 0; i < __IWM_DM_NR; i++)
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iwm->dbg.dbg_module[i] = val;
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return 0;
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}
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DEFINE_SIMPLE_ATTRIBUTE(fops_iwm_dbg_level,
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iwm_debugfs_u32_read, iwm_debugfs_dbg_level_write,
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"%llu\n");
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static int iwm_debugfs_dbg_modules_write(void *data, u64 val)
|
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{
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struct iwm_priv *iwm = data;
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int i, bit;
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iwm->dbg.dbg_modules = val;
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for (i = 0; i < __IWM_DM_NR; i++)
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iwm->dbg.dbg_module[i] = 0;
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for_each_set_bit(bit, &iwm->dbg.dbg_modules, __IWM_DM_NR)
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iwm->dbg.dbg_module[bit] = iwm->dbg.dbg_level;
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return 0;
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}
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DEFINE_SIMPLE_ATTRIBUTE(fops_iwm_dbg_modules,
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iwm_debugfs_u32_read, iwm_debugfs_dbg_modules_write,
|
||||
"%llu\n");
|
||||
|
||||
|
||||
static ssize_t iwm_debugfs_txq_read(struct file *filp, char __user *buffer,
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size_t count, loff_t *ppos)
|
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{
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struct iwm_priv *iwm = filp->private_data;
|
||||
char *buf;
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int i, buf_len = 4096;
|
||||
size_t len = 0;
|
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ssize_t ret;
|
||||
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||||
if (*ppos != 0)
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return 0;
|
||||
if (count < sizeof(buf))
|
||||
return -ENOSPC;
|
||||
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||||
buf = kzalloc(buf_len, GFP_KERNEL);
|
||||
if (!buf)
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||||
return -ENOMEM;
|
||||
|
||||
for (i = 0; i < IWM_TX_QUEUES; i++) {
|
||||
struct iwm_tx_queue *txq = &iwm->txq[i];
|
||||
struct sk_buff *skb;
|
||||
int j;
|
||||
unsigned long flags;
|
||||
|
||||
spin_lock_irqsave(&txq->queue.lock, flags);
|
||||
|
||||
skb = (struct sk_buff *)&txq->queue;
|
||||
|
||||
len += snprintf(buf + len, buf_len - len, "TXQ #%d\n", i);
|
||||
len += snprintf(buf + len, buf_len - len, "\tStopped: %d\n",
|
||||
__netif_subqueue_stopped(iwm_to_ndev(iwm),
|
||||
txq->id));
|
||||
len += snprintf(buf + len, buf_len - len, "\tConcat count:%d\n",
|
||||
txq->concat_count);
|
||||
len += snprintf(buf + len, buf_len - len, "\tQueue len: %d\n",
|
||||
skb_queue_len(&txq->queue));
|
||||
for (j = 0; j < skb_queue_len(&txq->queue); j++) {
|
||||
struct iwm_tx_info *tx_info;
|
||||
|
||||
skb = skb->next;
|
||||
tx_info = skb_to_tx_info(skb);
|
||||
|
||||
len += snprintf(buf + len, buf_len - len,
|
||||
"\tSKB #%d\n", j);
|
||||
len += snprintf(buf + len, buf_len - len,
|
||||
"\t\tsta: %d\n", tx_info->sta);
|
||||
len += snprintf(buf + len, buf_len - len,
|
||||
"\t\tcolor: %d\n", tx_info->color);
|
||||
len += snprintf(buf + len, buf_len - len,
|
||||
"\t\ttid: %d\n", tx_info->tid);
|
||||
}
|
||||
|
||||
spin_unlock_irqrestore(&txq->queue.lock, flags);
|
||||
|
||||
spin_lock_irqsave(&txq->stopped_queue.lock, flags);
|
||||
|
||||
len += snprintf(buf + len, buf_len - len,
|
||||
"\tStopped Queue len: %d\n",
|
||||
skb_queue_len(&txq->stopped_queue));
|
||||
for (j = 0; j < skb_queue_len(&txq->stopped_queue); j++) {
|
||||
struct iwm_tx_info *tx_info;
|
||||
|
||||
skb = skb->next;
|
||||
tx_info = skb_to_tx_info(skb);
|
||||
|
||||
len += snprintf(buf + len, buf_len - len,
|
||||
"\tSKB #%d\n", j);
|
||||
len += snprintf(buf + len, buf_len - len,
|
||||
"\t\tsta: %d\n", tx_info->sta);
|
||||
len += snprintf(buf + len, buf_len - len,
|
||||
"\t\tcolor: %d\n", tx_info->color);
|
||||
len += snprintf(buf + len, buf_len - len,
|
||||
"\t\ttid: %d\n", tx_info->tid);
|
||||
}
|
||||
|
||||
spin_unlock_irqrestore(&txq->stopped_queue.lock, flags);
|
||||
}
|
||||
|
||||
ret = simple_read_from_buffer(buffer, len, ppos, buf, buf_len);
|
||||
kfree(buf);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static ssize_t iwm_debugfs_tx_credit_read(struct file *filp,
|
||||
char __user *buffer,
|
||||
size_t count, loff_t *ppos)
|
||||
{
|
||||
struct iwm_priv *iwm = filp->private_data;
|
||||
struct iwm_tx_credit *credit = &iwm->tx_credit;
|
||||
char *buf;
|
||||
int i, buf_len = 4096;
|
||||
size_t len = 0;
|
||||
ssize_t ret;
|
||||
|
||||
if (*ppos != 0)
|
||||
return 0;
|
||||
if (count < sizeof(buf))
|
||||
return -ENOSPC;
|
||||
|
||||
buf = kzalloc(buf_len, GFP_KERNEL);
|
||||
if (!buf)
|
||||
return -ENOMEM;
|
||||
|
||||
len += snprintf(buf + len, buf_len - len,
|
||||
"NR pools: %d\n", credit->pool_nr);
|
||||
len += snprintf(buf + len, buf_len - len,
|
||||
"pools map: 0x%lx\n", credit->full_pools_map);
|
||||
|
||||
len += snprintf(buf + len, buf_len - len, "\n### POOLS ###\n");
|
||||
for (i = 0; i < IWM_MACS_OUT_GROUPS; i++) {
|
||||
len += snprintf(buf + len, buf_len - len,
|
||||
"pools entry #%d\n", i);
|
||||
len += snprintf(buf + len, buf_len - len,
|
||||
"\tid: %d\n",
|
||||
credit->pools[i].id);
|
||||
len += snprintf(buf + len, buf_len - len,
|
||||
"\tsid: %d\n",
|
||||
credit->pools[i].sid);
|
||||
len += snprintf(buf + len, buf_len - len,
|
||||
"\tmin_pages: %d\n",
|
||||
credit->pools[i].min_pages);
|
||||
len += snprintf(buf + len, buf_len - len,
|
||||
"\tmax_pages: %d\n",
|
||||
credit->pools[i].max_pages);
|
||||
len += snprintf(buf + len, buf_len - len,
|
||||
"\talloc_pages: %d\n",
|
||||
credit->pools[i].alloc_pages);
|
||||
len += snprintf(buf + len, buf_len - len,
|
||||
"\tfreed_pages: %d\n",
|
||||
credit->pools[i].total_freed_pages);
|
||||
}
|
||||
|
||||
len += snprintf(buf + len, buf_len - len, "\n### SPOOLS ###\n");
|
||||
for (i = 0; i < IWM_MACS_OUT_SGROUPS; i++) {
|
||||
len += snprintf(buf + len, buf_len - len,
|
||||
"spools entry #%d\n", i);
|
||||
len += snprintf(buf + len, buf_len - len,
|
||||
"\tid: %d\n",
|
||||
credit->spools[i].id);
|
||||
len += snprintf(buf + len, buf_len - len,
|
||||
"\tmax_pages: %d\n",
|
||||
credit->spools[i].max_pages);
|
||||
len += snprintf(buf + len, buf_len - len,
|
||||
"\talloc_pages: %d\n",
|
||||
credit->spools[i].alloc_pages);
|
||||
|
||||
}
|
||||
|
||||
ret = simple_read_from_buffer(buffer, len, ppos, buf, buf_len);
|
||||
kfree(buf);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static ssize_t iwm_debugfs_rx_ticket_read(struct file *filp,
|
||||
char __user *buffer,
|
||||
size_t count, loff_t *ppos)
|
||||
{
|
||||
struct iwm_priv *iwm = filp->private_data;
|
||||
struct iwm_rx_ticket_node *ticket;
|
||||
char *buf;
|
||||
int buf_len = 4096, i;
|
||||
size_t len = 0;
|
||||
ssize_t ret;
|
||||
|
||||
if (*ppos != 0)
|
||||
return 0;
|
||||
if (count < sizeof(buf))
|
||||
return -ENOSPC;
|
||||
|
||||
buf = kzalloc(buf_len, GFP_KERNEL);
|
||||
if (!buf)
|
||||
return -ENOMEM;
|
||||
|
||||
spin_lock(&iwm->ticket_lock);
|
||||
list_for_each_entry(ticket, &iwm->rx_tickets, node) {
|
||||
len += snprintf(buf + len, buf_len - len, "Ticket #%d\n",
|
||||
ticket->ticket->id);
|
||||
len += snprintf(buf + len, buf_len - len, "\taction: 0x%x\n",
|
||||
ticket->ticket->action);
|
||||
len += snprintf(buf + len, buf_len - len, "\tflags: 0x%x\n",
|
||||
ticket->ticket->flags);
|
||||
}
|
||||
spin_unlock(&iwm->ticket_lock);
|
||||
|
||||
for (i = 0; i < IWM_RX_ID_HASH; i++) {
|
||||
struct iwm_rx_packet *packet;
|
||||
struct list_head *pkt_list = &iwm->rx_packets[i];
|
||||
|
||||
if (!list_empty(pkt_list)) {
|
||||
len += snprintf(buf + len, buf_len - len,
|
||||
"Packet hash #%d\n", i);
|
||||
spin_lock(&iwm->packet_lock[i]);
|
||||
list_for_each_entry(packet, pkt_list, node) {
|
||||
len += snprintf(buf + len, buf_len - len,
|
||||
"\tPacket id: %d\n",
|
||||
packet->id);
|
||||
len += snprintf(buf + len, buf_len - len,
|
||||
"\tPacket length: %lu\n",
|
||||
packet->pkt_size);
|
||||
}
|
||||
spin_unlock(&iwm->packet_lock[i]);
|
||||
}
|
||||
}
|
||||
|
||||
ret = simple_read_from_buffer(buffer, len, ppos, buf, buf_len);
|
||||
kfree(buf);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static ssize_t iwm_debugfs_fw_err_read(struct file *filp,
|
||||
char __user *buffer,
|
||||
size_t count, loff_t *ppos)
|
||||
{
|
||||
|
||||
struct iwm_priv *iwm = filp->private_data;
|
||||
char buf[512];
|
||||
int buf_len = 512;
|
||||
size_t len = 0;
|
||||
|
||||
if (*ppos != 0)
|
||||
return 0;
|
||||
if (count < sizeof(buf))
|
||||
return -ENOSPC;
|
||||
|
||||
if (!iwm->last_fw_err)
|
||||
return -ENOMEM;
|
||||
|
||||
if (iwm->last_fw_err->line_num == 0)
|
||||
goto out;
|
||||
|
||||
len += snprintf(buf + len, buf_len - len, "%cMAC FW ERROR:\n",
|
||||
(le32_to_cpu(iwm->last_fw_err->category) == UMAC_SYS_ERR_CAT_LMAC)
|
||||
? 'L' : 'U');
|
||||
len += snprintf(buf + len, buf_len - len,
|
||||
"\tCategory: %d\n",
|
||||
le32_to_cpu(iwm->last_fw_err->category));
|
||||
|
||||
len += snprintf(buf + len, buf_len - len,
|
||||
"\tStatus: 0x%x\n",
|
||||
le32_to_cpu(iwm->last_fw_err->status));
|
||||
|
||||
len += snprintf(buf + len, buf_len - len,
|
||||
"\tPC: 0x%x\n",
|
||||
le32_to_cpu(iwm->last_fw_err->pc));
|
||||
|
||||
len += snprintf(buf + len, buf_len - len,
|
||||
"\tblink1: %d\n",
|
||||
le32_to_cpu(iwm->last_fw_err->blink1));
|
||||
|
||||
len += snprintf(buf + len, buf_len - len,
|
||||
"\tblink2: %d\n",
|
||||
le32_to_cpu(iwm->last_fw_err->blink2));
|
||||
|
||||
len += snprintf(buf + len, buf_len - len,
|
||||
"\tilink1: %d\n",
|
||||
le32_to_cpu(iwm->last_fw_err->ilink1));
|
||||
|
||||
len += snprintf(buf + len, buf_len - len,
|
||||
"\tilink2: %d\n",
|
||||
le32_to_cpu(iwm->last_fw_err->ilink2));
|
||||
|
||||
len += snprintf(buf + len, buf_len - len,
|
||||
"\tData1: 0x%x\n",
|
||||
le32_to_cpu(iwm->last_fw_err->data1));
|
||||
|
||||
len += snprintf(buf + len, buf_len - len,
|
||||
"\tData2: 0x%x\n",
|
||||
le32_to_cpu(iwm->last_fw_err->data2));
|
||||
|
||||
len += snprintf(buf + len, buf_len - len,
|
||||
"\tLine number: %d\n",
|
||||
le32_to_cpu(iwm->last_fw_err->line_num));
|
||||
|
||||
len += snprintf(buf + len, buf_len - len,
|
||||
"\tUMAC status: 0x%x\n",
|
||||
le32_to_cpu(iwm->last_fw_err->umac_status));
|
||||
|
||||
len += snprintf(buf + len, buf_len - len,
|
||||
"\tLMAC status: 0x%x\n",
|
||||
le32_to_cpu(iwm->last_fw_err->lmac_status));
|
||||
|
||||
len += snprintf(buf + len, buf_len - len,
|
||||
"\tSDIO status: 0x%x\n",
|
||||
le32_to_cpu(iwm->last_fw_err->sdio_status));
|
||||
|
||||
out:
|
||||
|
||||
return simple_read_from_buffer(buffer, len, ppos, buf, buf_len);
|
||||
}
|
||||
|
||||
static const struct file_operations iwm_debugfs_txq_fops = {
|
||||
.owner = THIS_MODULE,
|
||||
.open = simple_open,
|
||||
.read = iwm_debugfs_txq_read,
|
||||
.llseek = default_llseek,
|
||||
};
|
||||
|
||||
static const struct file_operations iwm_debugfs_tx_credit_fops = {
|
||||
.owner = THIS_MODULE,
|
||||
.open = simple_open,
|
||||
.read = iwm_debugfs_tx_credit_read,
|
||||
.llseek = default_llseek,
|
||||
};
|
||||
|
||||
static const struct file_operations iwm_debugfs_rx_ticket_fops = {
|
||||
.owner = THIS_MODULE,
|
||||
.open = simple_open,
|
||||
.read = iwm_debugfs_rx_ticket_read,
|
||||
.llseek = default_llseek,
|
||||
};
|
||||
|
||||
static const struct file_operations iwm_debugfs_fw_err_fops = {
|
||||
.owner = THIS_MODULE,
|
||||
.open = simple_open,
|
||||
.read = iwm_debugfs_fw_err_read,
|
||||
.llseek = default_llseek,
|
||||
};
|
||||
|
||||
void iwm_debugfs_init(struct iwm_priv *iwm)
|
||||
{
|
||||
int i;
|
||||
|
||||
iwm->dbg.rootdir = debugfs_create_dir(KBUILD_MODNAME, NULL);
|
||||
iwm->dbg.devdir = debugfs_create_dir(wiphy_name(iwm_to_wiphy(iwm)),
|
||||
iwm->dbg.rootdir);
|
||||
iwm->dbg.dbgdir = debugfs_create_dir("debug", iwm->dbg.devdir);
|
||||
iwm->dbg.rxdir = debugfs_create_dir("rx", iwm->dbg.devdir);
|
||||
iwm->dbg.txdir = debugfs_create_dir("tx", iwm->dbg.devdir);
|
||||
iwm->dbg.busdir = debugfs_create_dir("bus", iwm->dbg.devdir);
|
||||
if (iwm->bus_ops->debugfs_init)
|
||||
iwm->bus_ops->debugfs_init(iwm, iwm->dbg.busdir);
|
||||
|
||||
iwm->dbg.dbg_level = IWM_DL_NONE;
|
||||
iwm->dbg.dbg_level_dentry =
|
||||
debugfs_create_file("level", 0200, iwm->dbg.dbgdir, iwm,
|
||||
&fops_iwm_dbg_level);
|
||||
|
||||
iwm->dbg.dbg_modules = IWM_DM_DEFAULT;
|
||||
iwm->dbg.dbg_modules_dentry =
|
||||
debugfs_create_file("modules", 0200, iwm->dbg.dbgdir, iwm,
|
||||
&fops_iwm_dbg_modules);
|
||||
|
||||
for (i = 0; i < __IWM_DM_NR; i++)
|
||||
add_dbg_module(iwm->dbg, iwm_debug_module[i].name,
|
||||
iwm_debug_module[i].id, IWM_DL_DEFAULT);
|
||||
|
||||
iwm->dbg.txq_dentry = debugfs_create_file("queues", 0200,
|
||||
iwm->dbg.txdir, iwm,
|
||||
&iwm_debugfs_txq_fops);
|
||||
iwm->dbg.tx_credit_dentry = debugfs_create_file("credits", 0200,
|
||||
iwm->dbg.txdir, iwm,
|
||||
&iwm_debugfs_tx_credit_fops);
|
||||
iwm->dbg.rx_ticket_dentry = debugfs_create_file("tickets", 0200,
|
||||
iwm->dbg.rxdir, iwm,
|
||||
&iwm_debugfs_rx_ticket_fops);
|
||||
iwm->dbg.fw_err_dentry = debugfs_create_file("last_fw_err", 0200,
|
||||
iwm->dbg.dbgdir, iwm,
|
||||
&iwm_debugfs_fw_err_fops);
|
||||
}
|
||||
|
||||
void iwm_debugfs_exit(struct iwm_priv *iwm)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < __IWM_DM_NR; i++)
|
||||
debugfs_remove(iwm->dbg.dbg_module_dentries[i]);
|
||||
|
||||
debugfs_remove(iwm->dbg.dbg_modules_dentry);
|
||||
debugfs_remove(iwm->dbg.dbg_level_dentry);
|
||||
debugfs_remove(iwm->dbg.txq_dentry);
|
||||
debugfs_remove(iwm->dbg.tx_credit_dentry);
|
||||
debugfs_remove(iwm->dbg.rx_ticket_dentry);
|
||||
debugfs_remove(iwm->dbg.fw_err_dentry);
|
||||
if (iwm->bus_ops->debugfs_exit)
|
||||
iwm->bus_ops->debugfs_exit(iwm);
|
||||
|
||||
debugfs_remove(iwm->dbg.busdir);
|
||||
debugfs_remove(iwm->dbg.dbgdir);
|
||||
debugfs_remove(iwm->dbg.txdir);
|
||||
debugfs_remove(iwm->dbg.rxdir);
|
||||
debugfs_remove(iwm->dbg.devdir);
|
||||
debugfs_remove(iwm->dbg.rootdir);
|
||||
}
|
||||
@@ -1,234 +0,0 @@
|
||||
/*
|
||||
* Intel Wireless Multicomm 3200 WiFi driver
|
||||
*
|
||||
* Copyright (C) 2009 Intel Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* * Neither the name of Intel Corporation nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
*
|
||||
* Intel Corporation <ilw@linux.intel.com>
|
||||
* Samuel Ortiz <samuel.ortiz@intel.com>
|
||||
* Zhu Yi <yi.zhu@intel.com>
|
||||
*
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/slab.h>
|
||||
|
||||
#include "iwm.h"
|
||||
#include "umac.h"
|
||||
#include "commands.h"
|
||||
#include "eeprom.h"
|
||||
|
||||
static struct iwm_eeprom_entry eeprom_map[] = {
|
||||
[IWM_EEPROM_SIG] =
|
||||
{"Signature", IWM_EEPROM_SIG_OFF, IWM_EEPROM_SIG_LEN},
|
||||
|
||||
[IWM_EEPROM_VERSION] =
|
||||
{"Version", IWM_EEPROM_VERSION_OFF, IWM_EEPROM_VERSION_LEN},
|
||||
|
||||
[IWM_EEPROM_OEM_HW_VERSION] =
|
||||
{"OEM HW version", IWM_EEPROM_OEM_HW_VERSION_OFF,
|
||||
IWM_EEPROM_OEM_HW_VERSION_LEN},
|
||||
|
||||
[IWM_EEPROM_MAC_VERSION] =
|
||||
{"MAC version", IWM_EEPROM_MAC_VERSION_OFF, IWM_EEPROM_MAC_VERSION_LEN},
|
||||
|
||||
[IWM_EEPROM_CARD_ID] =
|
||||
{"Card ID", IWM_EEPROM_CARD_ID_OFF, IWM_EEPROM_CARD_ID_LEN},
|
||||
|
||||
[IWM_EEPROM_RADIO_CONF] =
|
||||
{"Radio config", IWM_EEPROM_RADIO_CONF_OFF, IWM_EEPROM_RADIO_CONF_LEN},
|
||||
|
||||
[IWM_EEPROM_SKU_CAP] =
|
||||
{"SKU capabilities", IWM_EEPROM_SKU_CAP_OFF, IWM_EEPROM_SKU_CAP_LEN},
|
||||
|
||||
[IWM_EEPROM_FAT_CHANNELS_CAP] =
|
||||
{"HT channels capabilities", IWM_EEPROM_FAT_CHANNELS_CAP_OFF,
|
||||
IWM_EEPROM_FAT_CHANNELS_CAP_LEN},
|
||||
|
||||
[IWM_EEPROM_CALIB_RXIQ_OFFSET] =
|
||||
{"RX IQ offset", IWM_EEPROM_CALIB_RXIQ_OFF, IWM_EEPROM_INDIRECT_LEN},
|
||||
|
||||
[IWM_EEPROM_CALIB_RXIQ] =
|
||||
{"Calib RX IQ", 0, IWM_EEPROM_CALIB_RXIQ_LEN},
|
||||
};
|
||||
|
||||
|
||||
static int iwm_eeprom_read(struct iwm_priv *iwm, u8 eeprom_id)
|
||||
{
|
||||
int ret;
|
||||
u32 entry_size, chunk_size, data_offset = 0, addr_offset = 0;
|
||||
u32 addr;
|
||||
struct iwm_udma_wifi_cmd udma_cmd;
|
||||
struct iwm_umac_cmd umac_cmd;
|
||||
struct iwm_umac_cmd_eeprom_proxy eeprom_cmd;
|
||||
|
||||
if (eeprom_id > (IWM_EEPROM_LAST - 1))
|
||||
return -EINVAL;
|
||||
|
||||
entry_size = eeprom_map[eeprom_id].length;
|
||||
|
||||
if (eeprom_id >= IWM_EEPROM_INDIRECT_DATA) {
|
||||
/* indirect data */
|
||||
u32 off_id = eeprom_id - IWM_EEPROM_INDIRECT_DATA +
|
||||
IWM_EEPROM_INDIRECT_OFFSET;
|
||||
|
||||
eeprom_map[eeprom_id].offset =
|
||||
*(u16 *)(iwm->eeprom + eeprom_map[off_id].offset) << 1;
|
||||
}
|
||||
|
||||
addr = eeprom_map[eeprom_id].offset;
|
||||
|
||||
udma_cmd.eop = 1;
|
||||
udma_cmd.credit_group = 0x4;
|
||||
udma_cmd.ra_tid = UMAC_HDI_ACT_TBL_IDX_HOST_CMD;
|
||||
udma_cmd.lmac_offset = 0;
|
||||
|
||||
umac_cmd.id = UMAC_CMD_OPCODE_EEPROM_PROXY;
|
||||
umac_cmd.resp = 1;
|
||||
|
||||
while (entry_size > 0) {
|
||||
chunk_size = min_t(u32, entry_size, IWM_MAX_EEPROM_DATA_LEN);
|
||||
|
||||
eeprom_cmd.hdr.type =
|
||||
cpu_to_le32(IWM_UMAC_CMD_EEPROM_TYPE_READ);
|
||||
eeprom_cmd.hdr.offset = cpu_to_le32(addr + addr_offset);
|
||||
eeprom_cmd.hdr.len = cpu_to_le32(chunk_size);
|
||||
|
||||
ret = iwm_hal_send_umac_cmd(iwm, &udma_cmd,
|
||||
&umac_cmd, &eeprom_cmd,
|
||||
sizeof(struct iwm_umac_cmd_eeprom_proxy));
|
||||
if (ret < 0) {
|
||||
IWM_ERR(iwm, "Couldn't read eeprom\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = iwm_notif_handle(iwm, UMAC_CMD_OPCODE_EEPROM_PROXY,
|
||||
IWM_SRC_UMAC, 2*HZ);
|
||||
if (ret < 0) {
|
||||
IWM_ERR(iwm, "Did not get any eeprom answer\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
data_offset += chunk_size;
|
||||
addr_offset += chunk_size;
|
||||
entry_size -= chunk_size;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
u8 *iwm_eeprom_access(struct iwm_priv *iwm, u8 eeprom_id)
|
||||
{
|
||||
if (!iwm->eeprom)
|
||||
return ERR_PTR(-ENODEV);
|
||||
|
||||
return iwm->eeprom + eeprom_map[eeprom_id].offset;
|
||||
}
|
||||
|
||||
int iwm_eeprom_fat_channels(struct iwm_priv *iwm)
|
||||
{
|
||||
struct wiphy *wiphy = iwm_to_wiphy(iwm);
|
||||
struct ieee80211_supported_band *band;
|
||||
u16 *channels, i;
|
||||
|
||||
channels = (u16 *)iwm_eeprom_access(iwm, IWM_EEPROM_FAT_CHANNELS_CAP);
|
||||
if (IS_ERR(channels))
|
||||
return PTR_ERR(channels);
|
||||
|
||||
band = wiphy->bands[IEEE80211_BAND_2GHZ];
|
||||
band->ht_cap.ht_supported = true;
|
||||
|
||||
for (i = 0; i < IWM_EEPROM_FAT_CHANNELS_24; i++)
|
||||
if (!(channels[i] & IWM_EEPROM_FAT_CHANNEL_ENABLED))
|
||||
band->ht_cap.ht_supported = false;
|
||||
|
||||
band = wiphy->bands[IEEE80211_BAND_5GHZ];
|
||||
band->ht_cap.ht_supported = true;
|
||||
for (i = IWM_EEPROM_FAT_CHANNELS_24; i < IWM_EEPROM_FAT_CHANNELS; i++)
|
||||
if (!(channels[i] & IWM_EEPROM_FAT_CHANNEL_ENABLED))
|
||||
band->ht_cap.ht_supported = false;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
u32 iwm_eeprom_wireless_mode(struct iwm_priv *iwm)
|
||||
{
|
||||
u16 sku_cap;
|
||||
u32 wireless_mode = 0;
|
||||
|
||||
sku_cap = *((u16 *)iwm_eeprom_access(iwm, IWM_EEPROM_SKU_CAP));
|
||||
|
||||
if (sku_cap & IWM_EEPROM_SKU_CAP_BAND_24GHZ)
|
||||
wireless_mode |= WIRELESS_MODE_11G;
|
||||
|
||||
if (sku_cap & IWM_EEPROM_SKU_CAP_BAND_52GHZ)
|
||||
wireless_mode |= WIRELESS_MODE_11A;
|
||||
|
||||
if (sku_cap & IWM_EEPROM_SKU_CAP_11N_ENABLE)
|
||||
wireless_mode |= WIRELESS_MODE_11N;
|
||||
|
||||
return wireless_mode;
|
||||
}
|
||||
|
||||
|
||||
int iwm_eeprom_init(struct iwm_priv *iwm)
|
||||
{
|
||||
int i, ret = 0;
|
||||
char name[32];
|
||||
|
||||
iwm->eeprom = kzalloc(IWM_EEPROM_LEN, GFP_KERNEL);
|
||||
if (!iwm->eeprom)
|
||||
return -ENOMEM;
|
||||
|
||||
for (i = IWM_EEPROM_FIRST; i < IWM_EEPROM_LAST; i++) {
|
||||
ret = iwm_eeprom_read(iwm, i);
|
||||
if (ret < 0) {
|
||||
IWM_ERR(iwm, "Couldn't read eeprom entry #%d: %s\n",
|
||||
i, eeprom_map[i].name);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
IWM_DBG_BOOT(iwm, DBG, "EEPROM dump:\n");
|
||||
for (i = IWM_EEPROM_FIRST; i < IWM_EEPROM_LAST; i++) {
|
||||
memset(name, 0, 32);
|
||||
sprintf(name, "%s: ", eeprom_map[i].name);
|
||||
|
||||
IWM_HEXDUMP(iwm, DBG, BOOT, name,
|
||||
iwm->eeprom + eeprom_map[i].offset,
|
||||
eeprom_map[i].length);
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
void iwm_eeprom_exit(struct iwm_priv *iwm)
|
||||
{
|
||||
kfree(iwm->eeprom);
|
||||
}
|
||||
@@ -1,127 +0,0 @@
|
||||
/*
|
||||
* Intel Wireless Multicomm 3200 WiFi driver
|
||||
*
|
||||
* Copyright (C) 2009 Intel Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* * Neither the name of Intel Corporation nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
*
|
||||
* Intel Corporation <ilw@linux.intel.com>
|
||||
* Samuel Ortiz <samuel.ortiz@intel.com>
|
||||
* Zhu Yi <yi.zhu@intel.com>
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef __IWM_EEPROM_H__
|
||||
#define __IWM_EEPROM_H__
|
||||
|
||||
enum {
|
||||
IWM_EEPROM_SIG = 0,
|
||||
IWM_EEPROM_FIRST = IWM_EEPROM_SIG,
|
||||
IWM_EEPROM_VERSION,
|
||||
IWM_EEPROM_OEM_HW_VERSION,
|
||||
IWM_EEPROM_MAC_VERSION,
|
||||
IWM_EEPROM_CARD_ID,
|
||||
IWM_EEPROM_RADIO_CONF,
|
||||
IWM_EEPROM_SKU_CAP,
|
||||
IWM_EEPROM_FAT_CHANNELS_CAP,
|
||||
|
||||
IWM_EEPROM_INDIRECT_OFFSET,
|
||||
IWM_EEPROM_CALIB_RXIQ_OFFSET = IWM_EEPROM_INDIRECT_OFFSET,
|
||||
|
||||
IWM_EEPROM_INDIRECT_DATA,
|
||||
IWM_EEPROM_CALIB_RXIQ = IWM_EEPROM_INDIRECT_DATA,
|
||||
|
||||
IWM_EEPROM_LAST,
|
||||
};
|
||||
|
||||
#define IWM_EEPROM_SIG_OFF 0x00
|
||||
#define IWM_EEPROM_VERSION_OFF (0x54 << 1)
|
||||
#define IWM_EEPROM_OEM_HW_VERSION_OFF (0x56 << 1)
|
||||
#define IWM_EEPROM_MAC_VERSION_OFF (0x30 << 1)
|
||||
#define IWM_EEPROM_CARD_ID_OFF (0x5d << 1)
|
||||
#define IWM_EEPROM_RADIO_CONF_OFF (0x58 << 1)
|
||||
#define IWM_EEPROM_SKU_CAP_OFF (0x55 << 1)
|
||||
#define IWM_EEPROM_CALIB_CONFIG_OFF (0x7c << 1)
|
||||
#define IWM_EEPROM_FAT_CHANNELS_CAP_OFF (0xde << 1)
|
||||
|
||||
#define IWM_EEPROM_SIG_LEN 4
|
||||
#define IWM_EEPROM_VERSION_LEN 2
|
||||
#define IWM_EEPROM_OEM_HW_VERSION_LEN 2
|
||||
#define IWM_EEPROM_MAC_VERSION_LEN 1
|
||||
#define IWM_EEPROM_CARD_ID_LEN 2
|
||||
#define IWM_EEPROM_RADIO_CONF_LEN 2
|
||||
#define IWM_EEPROM_SKU_CAP_LEN 2
|
||||
#define IWM_EEPROM_FAT_CHANNELS_CAP_LEN 40
|
||||
#define IWM_EEPROM_INDIRECT_LEN 2
|
||||
|
||||
#define IWM_MAX_EEPROM_DATA_LEN 240
|
||||
#define IWM_EEPROM_LEN 0x800
|
||||
|
||||
#define IWM_EEPROM_MIN_ALLOWED_VERSION 0x0610
|
||||
#define IWM_EEPROM_MAX_ALLOWED_VERSION 0x0700
|
||||
#define IWM_EEPROM_CURRENT_VERSION 0x0612
|
||||
|
||||
#define IWM_EEPROM_SKU_CAP_BAND_24GHZ (1 << 4)
|
||||
#define IWM_EEPROM_SKU_CAP_BAND_52GHZ (1 << 5)
|
||||
#define IWM_EEPROM_SKU_CAP_11N_ENABLE (1 << 6)
|
||||
|
||||
#define IWM_EEPROM_FAT_CHANNELS 20
|
||||
/* 2.4 gHz FAT primary channels: 1, 2, 3, 4, 5, 6, 7, 8, 9 */
|
||||
#define IWM_EEPROM_FAT_CHANNELS_24 9
|
||||
/* 5.2 gHz FAT primary channels: 36,44,52,60,100,108,116,124,132,149,157 */
|
||||
#define IWM_EEPROM_FAT_CHANNELS_52 11
|
||||
|
||||
#define IWM_EEPROM_FAT_CHANNEL_ENABLED (1 << 0)
|
||||
|
||||
enum {
|
||||
IWM_EEPROM_CALIB_CAL_HDR,
|
||||
IWM_EEPROM_CALIB_TX_POWER,
|
||||
IWM_EEPROM_CALIB_XTAL,
|
||||
IWM_EEPROM_CALIB_TEMPERATURE,
|
||||
IWM_EEPROM_CALIB_RX_BB_FILTER,
|
||||
IWM_EEPROM_CALIB_RX_IQ,
|
||||
IWM_EEPROM_CALIB_MAX,
|
||||
};
|
||||
|
||||
#define IWM_EEPROM_CALIB_RXIQ_OFF (IWM_EEPROM_CALIB_CONFIG_OFF + \
|
||||
(IWM_EEPROM_CALIB_RX_IQ << 1))
|
||||
#define IWM_EEPROM_CALIB_RXIQ_LEN sizeof(struct iwm_lmac_calib_rxiq)
|
||||
|
||||
struct iwm_eeprom_entry {
|
||||
char *name;
|
||||
u32 offset;
|
||||
u32 length;
|
||||
};
|
||||
|
||||
int iwm_eeprom_init(struct iwm_priv *iwm);
|
||||
void iwm_eeprom_exit(struct iwm_priv *iwm);
|
||||
u8 *iwm_eeprom_access(struct iwm_priv *iwm, u8 eeprom_id);
|
||||
int iwm_eeprom_fat_channels(struct iwm_priv *iwm);
|
||||
u32 iwm_eeprom_wireless_mode(struct iwm_priv *iwm);
|
||||
|
||||
#endif
|
||||
@@ -1,416 +0,0 @@
|
||||
/*
|
||||
* Intel Wireless Multicomm 3200 WiFi driver
|
||||
*
|
||||
* Copyright (C) 2009 Intel Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* * Neither the name of Intel Corporation nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
*
|
||||
* Intel Corporation <ilw@linux.intel.com>
|
||||
* Samuel Ortiz <samuel.ortiz@intel.com>
|
||||
* Zhu Yi <yi.zhu@intel.com>
|
||||
*
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/firmware.h>
|
||||
|
||||
#include "iwm.h"
|
||||
#include "bus.h"
|
||||
#include "hal.h"
|
||||
#include "umac.h"
|
||||
#include "debug.h"
|
||||
#include "fw.h"
|
||||
#include "commands.h"
|
||||
|
||||
static const char fw_barker[] = "*WESTOPFORNOONE*";
|
||||
|
||||
/*
|
||||
* @op_code: Op code we're looking for.
|
||||
* @index: There can be several instances of the same opcode within
|
||||
* the firmware. Index specifies which one we're looking for.
|
||||
*/
|
||||
static int iwm_fw_op_offset(struct iwm_priv *iwm, const struct firmware *fw,
|
||||
u16 op_code, u32 index)
|
||||
{
|
||||
int offset = -EINVAL, fw_offset;
|
||||
u32 op_index = 0;
|
||||
const u8 *fw_ptr;
|
||||
struct iwm_fw_hdr_rec *rec;
|
||||
|
||||
fw_offset = 0;
|
||||
fw_ptr = fw->data;
|
||||
|
||||
/* We first need to look for the firmware barker */
|
||||
if (memcmp(fw_ptr, fw_barker, IWM_HDR_BARKER_LEN)) {
|
||||
IWM_ERR(iwm, "No barker string in this FW\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (fw->size < IWM_HDR_LEN) {
|
||||
IWM_ERR(iwm, "FW is too small (%zu)\n", fw->size);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
fw_offset += IWM_HDR_BARKER_LEN;
|
||||
|
||||
while (fw_offset < fw->size) {
|
||||
rec = (struct iwm_fw_hdr_rec *)(fw_ptr + fw_offset);
|
||||
|
||||
IWM_DBG_FW(iwm, DBG, "FW: op_code: 0x%x, len: %d @ 0x%x\n",
|
||||
rec->op_code, rec->len, fw_offset);
|
||||
|
||||
if (rec->op_code == IWM_HDR_REC_OP_INVALID) {
|
||||
IWM_DBG_FW(iwm, DBG, "Reached INVALID op code\n");
|
||||
break;
|
||||
}
|
||||
|
||||
if (rec->op_code == op_code) {
|
||||
if (op_index == index) {
|
||||
fw_offset += sizeof(struct iwm_fw_hdr_rec);
|
||||
offset = fw_offset;
|
||||
goto out;
|
||||
}
|
||||
op_index++;
|
||||
}
|
||||
|
||||
fw_offset += sizeof(struct iwm_fw_hdr_rec) + rec->len;
|
||||
}
|
||||
|
||||
out:
|
||||
return offset;
|
||||
}
|
||||
|
||||
static int iwm_load_firmware_chunk(struct iwm_priv *iwm,
|
||||
const struct firmware *fw,
|
||||
struct iwm_fw_img_desc *img_desc)
|
||||
{
|
||||
struct iwm_udma_nonwifi_cmd target_cmd;
|
||||
u32 chunk_size;
|
||||
const u8 *chunk_ptr;
|
||||
int ret = 0;
|
||||
|
||||
IWM_DBG_FW(iwm, INFO, "Loading FW chunk: %d bytes @ 0x%x\n",
|
||||
img_desc->length, img_desc->address);
|
||||
|
||||
target_cmd.opcode = UMAC_HDI_OUT_OPCODE_WRITE;
|
||||
target_cmd.handle_by_hw = 1;
|
||||
target_cmd.op2 = 0;
|
||||
target_cmd.resp = 0;
|
||||
target_cmd.eop = 1;
|
||||
|
||||
chunk_size = img_desc->length;
|
||||
chunk_ptr = fw->data + img_desc->offset;
|
||||
|
||||
while (chunk_size > 0) {
|
||||
u32 tmp_chunk_size;
|
||||
|
||||
tmp_chunk_size = min_t(u32, chunk_size,
|
||||
IWM_MAX_NONWIFI_CMD_BUFF_SIZE);
|
||||
|
||||
target_cmd.addr = cpu_to_le32(img_desc->address +
|
||||
(chunk_ptr - fw->data - img_desc->offset));
|
||||
target_cmd.op1_sz = cpu_to_le32(tmp_chunk_size);
|
||||
|
||||
IWM_DBG_FW(iwm, DBG, "\t%d bytes @ 0x%x\n",
|
||||
tmp_chunk_size, target_cmd.addr);
|
||||
|
||||
ret = iwm_hal_send_target_cmd(iwm, &target_cmd, chunk_ptr);
|
||||
if (ret < 0) {
|
||||
IWM_ERR(iwm, "Couldn't load FW chunk\n");
|
||||
break;
|
||||
}
|
||||
|
||||
chunk_size -= tmp_chunk_size;
|
||||
chunk_ptr += tmp_chunk_size;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
/*
|
||||
* To load a fw image to the target, we basically go through the
|
||||
* fw, looking for OP_MEM_DESC records. Once we found one, we
|
||||
* pass it to iwm_load_firmware_chunk().
|
||||
* The OP_MEM_DESC records contain the actuall memory chunk to be
|
||||
* sent, but also the destination address.
|
||||
*/
|
||||
static int iwm_load_img(struct iwm_priv *iwm, const char *img_name)
|
||||
{
|
||||
const struct firmware *fw;
|
||||
struct iwm_fw_img_desc *img_desc;
|
||||
struct iwm_fw_img_ver *ver;
|
||||
int ret = 0, fw_offset;
|
||||
u32 opcode_idx = 0, build_date;
|
||||
char *build_tag;
|
||||
|
||||
ret = request_firmware(&fw, img_name, iwm_to_dev(iwm));
|
||||
if (ret) {
|
||||
IWM_ERR(iwm, "Request firmware failed");
|
||||
return ret;
|
||||
}
|
||||
|
||||
IWM_DBG_FW(iwm, INFO, "Start to load FW %s\n", img_name);
|
||||
|
||||
while (1) {
|
||||
fw_offset = iwm_fw_op_offset(iwm, fw,
|
||||
IWM_HDR_REC_OP_MEM_DESC,
|
||||
opcode_idx);
|
||||
if (fw_offset < 0)
|
||||
break;
|
||||
|
||||
img_desc = (struct iwm_fw_img_desc *)(fw->data + fw_offset);
|
||||
ret = iwm_load_firmware_chunk(iwm, fw, img_desc);
|
||||
if (ret < 0)
|
||||
goto err_release_fw;
|
||||
opcode_idx++;
|
||||
}
|
||||
|
||||
/* Read firmware version */
|
||||
fw_offset = iwm_fw_op_offset(iwm, fw, IWM_HDR_REC_OP_SW_VER, 0);
|
||||
if (fw_offset < 0)
|
||||
goto err_release_fw;
|
||||
|
||||
ver = (struct iwm_fw_img_ver *)(fw->data + fw_offset);
|
||||
|
||||
/* Read build tag */
|
||||
fw_offset = iwm_fw_op_offset(iwm, fw, IWM_HDR_REC_OP_BUILD_TAG, 0);
|
||||
if (fw_offset < 0)
|
||||
goto err_release_fw;
|
||||
|
||||
build_tag = (char *)(fw->data + fw_offset);
|
||||
|
||||
/* Read build date */
|
||||
fw_offset = iwm_fw_op_offset(iwm, fw, IWM_HDR_REC_OP_BUILD_DATE, 0);
|
||||
if (fw_offset < 0)
|
||||
goto err_release_fw;
|
||||
|
||||
build_date = *(u32 *)(fw->data + fw_offset);
|
||||
|
||||
IWM_INFO(iwm, "%s:\n", img_name);
|
||||
IWM_INFO(iwm, "\tVersion: %02X.%02X\n", ver->major, ver->minor);
|
||||
IWM_INFO(iwm, "\tBuild tag: %s\n", build_tag);
|
||||
IWM_INFO(iwm, "\tBuild date: %x-%x-%x\n",
|
||||
IWM_BUILD_YEAR(build_date), IWM_BUILD_MONTH(build_date),
|
||||
IWM_BUILD_DAY(build_date));
|
||||
|
||||
if (!strcmp(img_name, iwm->bus_ops->umac_name))
|
||||
sprintf(iwm->umac_version, "%02X.%02X",
|
||||
ver->major, ver->minor);
|
||||
|
||||
if (!strcmp(img_name, iwm->bus_ops->lmac_name))
|
||||
sprintf(iwm->lmac_version, "%02X.%02X",
|
||||
ver->major, ver->minor);
|
||||
|
||||
err_release_fw:
|
||||
release_firmware(fw);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int iwm_load_umac(struct iwm_priv *iwm)
|
||||
{
|
||||
struct iwm_udma_nonwifi_cmd target_cmd;
|
||||
int ret;
|
||||
|
||||
ret = iwm_load_img(iwm, iwm->bus_ops->umac_name);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
/* We've loaded the UMAC, we can tell the target to jump there */
|
||||
target_cmd.opcode = UMAC_HDI_OUT_OPCODE_JUMP;
|
||||
target_cmd.addr = cpu_to_le32(UMAC_MU_FW_INST_DATA_12_ADDR);
|
||||
target_cmd.op1_sz = 0;
|
||||
target_cmd.op2 = 0;
|
||||
target_cmd.handle_by_hw = 0;
|
||||
target_cmd.resp = 1 ;
|
||||
target_cmd.eop = 1;
|
||||
|
||||
ret = iwm_hal_send_target_cmd(iwm, &target_cmd, NULL);
|
||||
if (ret < 0)
|
||||
IWM_ERR(iwm, "Couldn't send JMP command\n");
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int iwm_load_lmac(struct iwm_priv *iwm, const char *img_name)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = iwm_load_img(iwm, img_name);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
return iwm_send_umac_reset(iwm,
|
||||
cpu_to_le32(UMAC_RST_CTRL_FLG_LARC_CLK_EN), 0);
|
||||
}
|
||||
|
||||
static int iwm_init_calib(struct iwm_priv *iwm, unsigned long cfg_bitmap,
|
||||
unsigned long expected_bitmap, u8 rx_iq_cmd)
|
||||
{
|
||||
/* Read RX IQ calibration result from EEPROM */
|
||||
if (test_bit(rx_iq_cmd, &cfg_bitmap)) {
|
||||
iwm_store_rxiq_calib_result(iwm);
|
||||
set_bit(PHY_CALIBRATE_RX_IQ_CMD, &iwm->calib_done_map);
|
||||
}
|
||||
|
||||
iwm_send_prio_table(iwm);
|
||||
iwm_send_init_calib_cfg(iwm, cfg_bitmap);
|
||||
|
||||
while (iwm->calib_done_map != expected_bitmap) {
|
||||
if (iwm_notif_handle(iwm, CALIBRATION_RES_NOTIFICATION,
|
||||
IWM_SRC_LMAC, WAIT_NOTIF_TIMEOUT)) {
|
||||
IWM_DBG_FW(iwm, DBG, "Initial calibration timeout\n");
|
||||
return -ETIMEDOUT;
|
||||
}
|
||||
|
||||
IWM_DBG_FW(iwm, DBG, "Got calibration result. calib_done_map: "
|
||||
"0x%lx, expected calibrations: 0x%lx\n",
|
||||
iwm->calib_done_map, expected_bitmap);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* We currently have to load 3 FWs:
|
||||
* 1) The UMAC (Upper MAC).
|
||||
* 2) The calibration LMAC (Lower MAC).
|
||||
* We then send the calibration init command, so that the device can
|
||||
* run a first calibration round.
|
||||
* 3) The operational LMAC, which replaces the calibration one when it's
|
||||
* done with the first calibration round.
|
||||
*
|
||||
* Once those 3 FWs have been loaded, we send the periodic calibration
|
||||
* command, and then the device is available for regular 802.11 operations.
|
||||
*/
|
||||
int iwm_load_fw(struct iwm_priv *iwm)
|
||||
{
|
||||
unsigned long init_calib_map, periodic_calib_map;
|
||||
unsigned long expected_calib_map;
|
||||
int ret;
|
||||
|
||||
/* We first start downloading the UMAC */
|
||||
ret = iwm_load_umac(iwm);
|
||||
if (ret < 0) {
|
||||
IWM_ERR(iwm, "UMAC loading failed\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* Handle UMAC_ALIVE notification */
|
||||
ret = iwm_notif_handle(iwm, UMAC_NOTIFY_OPCODE_ALIVE, IWM_SRC_UMAC,
|
||||
WAIT_NOTIF_TIMEOUT);
|
||||
if (ret) {
|
||||
IWM_ERR(iwm, "Handle UMAC_ALIVE failed: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* UMAC is alive, we can download the calibration LMAC */
|
||||
ret = iwm_load_lmac(iwm, iwm->bus_ops->calib_lmac_name);
|
||||
if (ret) {
|
||||
IWM_ERR(iwm, "Calibration LMAC loading failed\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* Handle UMAC_INIT_COMPLETE notification */
|
||||
ret = iwm_notif_handle(iwm, UMAC_NOTIFY_OPCODE_INIT_COMPLETE,
|
||||
IWM_SRC_UMAC, WAIT_NOTIF_TIMEOUT);
|
||||
if (ret) {
|
||||
IWM_ERR(iwm, "Handle INIT_COMPLETE failed for calibration "
|
||||
"LMAC: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* Read EEPROM data */
|
||||
ret = iwm_eeprom_init(iwm);
|
||||
if (ret < 0) {
|
||||
IWM_ERR(iwm, "Couldn't init eeprom array\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
init_calib_map = iwm->conf.calib_map & IWM_CALIB_MAP_INIT_MSK;
|
||||
expected_calib_map = iwm->conf.expected_calib_map &
|
||||
IWM_CALIB_MAP_INIT_MSK;
|
||||
periodic_calib_map = IWM_CALIB_MAP_PER_LMAC(iwm->conf.calib_map);
|
||||
|
||||
ret = iwm_init_calib(iwm, init_calib_map, expected_calib_map,
|
||||
CALIB_CFG_RX_IQ_IDX);
|
||||
if (ret < 0) {
|
||||
/* Let's try the old way */
|
||||
ret = iwm_init_calib(iwm, expected_calib_map,
|
||||
expected_calib_map,
|
||||
PHY_CALIBRATE_RX_IQ_CMD);
|
||||
if (ret < 0) {
|
||||
IWM_ERR(iwm, "Calibration result timeout\n");
|
||||
goto out;
|
||||
}
|
||||
}
|
||||
|
||||
/* Handle LMAC CALIBRATION_COMPLETE notification */
|
||||
ret = iwm_notif_handle(iwm, CALIBRATION_COMPLETE_NOTIFICATION,
|
||||
IWM_SRC_LMAC, WAIT_NOTIF_TIMEOUT);
|
||||
if (ret) {
|
||||
IWM_ERR(iwm, "Wait for CALIBRATION_COMPLETE timeout\n");
|
||||
goto out;
|
||||
}
|
||||
|
||||
IWM_INFO(iwm, "LMAC calibration done: 0x%lx\n", iwm->calib_done_map);
|
||||
|
||||
iwm_send_umac_reset(iwm, cpu_to_le32(UMAC_RST_CTRL_FLG_LARC_RESET), 1);
|
||||
|
||||
ret = iwm_notif_handle(iwm, UMAC_CMD_OPCODE_RESET, IWM_SRC_UMAC,
|
||||
WAIT_NOTIF_TIMEOUT);
|
||||
if (ret) {
|
||||
IWM_ERR(iwm, "Wait for UMAC RESET timeout\n");
|
||||
goto out;
|
||||
}
|
||||
|
||||
/* Download the operational LMAC */
|
||||
ret = iwm_load_lmac(iwm, iwm->bus_ops->lmac_name);
|
||||
if (ret) {
|
||||
IWM_ERR(iwm, "LMAC loading failed\n");
|
||||
goto out;
|
||||
}
|
||||
|
||||
ret = iwm_notif_handle(iwm, UMAC_NOTIFY_OPCODE_INIT_COMPLETE,
|
||||
IWM_SRC_UMAC, WAIT_NOTIF_TIMEOUT);
|
||||
if (ret) {
|
||||
IWM_ERR(iwm, "Handle INIT_COMPLETE failed for LMAC: %d\n", ret);
|
||||
goto out;
|
||||
}
|
||||
|
||||
iwm_send_prio_table(iwm);
|
||||
iwm_send_calib_results(iwm);
|
||||
iwm_send_periodic_calib_cfg(iwm, periodic_calib_map);
|
||||
iwm_send_ct_kill_cfg(iwm, iwm->conf.ct_kill_entry,
|
||||
iwm->conf.ct_kill_exit);
|
||||
|
||||
return 0;
|
||||
|
||||
out:
|
||||
iwm_eeprom_exit(iwm);
|
||||
return ret;
|
||||
}
|
||||
@@ -1,100 +0,0 @@
|
||||
/*
|
||||
* Intel Wireless Multicomm 3200 WiFi driver
|
||||
*
|
||||
* Copyright (C) 2009 Intel Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* * Neither the name of Intel Corporation nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
*
|
||||
* Intel Corporation <ilw@linux.intel.com>
|
||||
* Samuel Ortiz <samuel.ortiz@intel.com>
|
||||
* Zhu Yi <yi.zhu@intel.com>
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef __IWM_FW_H__
|
||||
#define __IWM_FW_H__
|
||||
|
||||
/**
|
||||
* struct iwm_fw_hdr_rec - An iwm firmware image is a
|
||||
* concatenation of various records. Each of them is
|
||||
* defined by an ID (aka op code), a length, and the
|
||||
* actual data.
|
||||
* @op_code: The record ID, see IWM_HDR_REC_OP_*
|
||||
*
|
||||
* @len: The record payload length
|
||||
*
|
||||
* @buf: The record payload
|
||||
*/
|
||||
struct iwm_fw_hdr_rec {
|
||||
u16 op_code;
|
||||
u16 len;
|
||||
u8 buf[0];
|
||||
};
|
||||
|
||||
/* Header's definitions */
|
||||
#define IWM_HDR_LEN (512)
|
||||
#define IWM_HDR_BARKER_LEN (16)
|
||||
|
||||
/* Header's opcodes */
|
||||
#define IWM_HDR_REC_OP_INVALID (0x00)
|
||||
#define IWM_HDR_REC_OP_BUILD_DATE (0x01)
|
||||
#define IWM_HDR_REC_OP_BUILD_TAG (0x02)
|
||||
#define IWM_HDR_REC_OP_SW_VER (0x03)
|
||||
#define IWM_HDR_REC_OP_HW_SKU (0x04)
|
||||
#define IWM_HDR_REC_OP_BUILD_OPT (0x05)
|
||||
#define IWM_HDR_REC_OP_MEM_DESC (0x06)
|
||||
#define IWM_HDR_REC_USERDEFS (0x07)
|
||||
|
||||
/* Header's records length (in bytes) */
|
||||
#define IWM_HDR_REC_LEN_BUILD_DATE (4)
|
||||
#define IWM_HDR_REC_LEN_BUILD_TAG (64)
|
||||
#define IWM_HDR_REC_LEN_SW_VER (4)
|
||||
#define IWM_HDR_REC_LEN_HW_SKU (4)
|
||||
#define IWM_HDR_REC_LEN_BUILD_OPT (4)
|
||||
#define IWM_HDR_REC_LEN_MEM_DESC (12)
|
||||
#define IWM_HDR_REC_LEN_USERDEF (64)
|
||||
|
||||
#define IWM_BUILD_YEAR(date) ((date >> 16) & 0xffff)
|
||||
#define IWM_BUILD_MONTH(date) ((date >> 8) & 0xff)
|
||||
#define IWM_BUILD_DAY(date) (date & 0xff)
|
||||
|
||||
struct iwm_fw_img_desc {
|
||||
u32 offset;
|
||||
u32 address;
|
||||
u32 length;
|
||||
};
|
||||
|
||||
struct iwm_fw_img_ver {
|
||||
u8 minor;
|
||||
u8 major;
|
||||
u16 reserved;
|
||||
};
|
||||
|
||||
int iwm_load_fw(struct iwm_priv *iwm);
|
||||
|
||||
#endif
|
||||
@@ -1,470 +0,0 @@
|
||||
/*
|
||||
* Intel Wireless Multicomm 3200 WiFi driver
|
||||
*
|
||||
* Copyright (C) 2009 Intel Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* * Neither the name of Intel Corporation nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
*
|
||||
* Intel Corporation <ilw@linux.intel.com>
|
||||
* Samuel Ortiz <samuel.ortiz@intel.com>
|
||||
* Zhu Yi <yi.zhu@intel.com>
|
||||
*
|
||||
*/
|
||||
|
||||
/*
|
||||
* Hardware Abstraction Layer for iwm.
|
||||
*
|
||||
* This file mostly defines an abstraction API for
|
||||
* sending various commands to the target.
|
||||
*
|
||||
* We have 2 types of commands: wifi and non-wifi ones.
|
||||
*
|
||||
* - wifi commands:
|
||||
* They are used for sending LMAC and UMAC commands,
|
||||
* and thus are the most commonly used ones.
|
||||
* There are 2 different wifi command types, the regular
|
||||
* one and the LMAC one. The former is used to send
|
||||
* UMAC commands (see UMAC_CMD_OPCODE_* from umac.h)
|
||||
* while the latter is used for sending commands to the
|
||||
* LMAC. If you look at LMAC commands you'll se that they
|
||||
* are actually regular iwlwifi target commands encapsulated
|
||||
* into a special UMAC command called UMAC passthrough.
|
||||
* This is due to the fact the host talks exclusively
|
||||
* to the UMAC and so there needs to be a special UMAC
|
||||
* command for talking to the LMAC.
|
||||
* This is how a wifi command is laid out:
|
||||
* ------------------------
|
||||
* | iwm_udma_out_wifi_hdr |
|
||||
* ------------------------
|
||||
* | SW meta_data (32 bits) |
|
||||
* ------------------------
|
||||
* | iwm_dev_cmd_hdr |
|
||||
* ------------------------
|
||||
* | payload |
|
||||
* | .... |
|
||||
*
|
||||
* - non-wifi, or general commands:
|
||||
* Those commands are handled by the device's bootrom,
|
||||
* and are typically sent when the UMAC and the LMAC
|
||||
* are not yet available.
|
||||
* * This is how a non-wifi command is laid out:
|
||||
* ---------------------------
|
||||
* | iwm_udma_out_nonwifi_hdr |
|
||||
* ---------------------------
|
||||
* | payload |
|
||||
* | .... |
|
||||
|
||||
*
|
||||
* All the commands start with a UDMA header, which is
|
||||
* basically a 32 bits field. The 4 LSB there define
|
||||
* an opcode that allows the target to differentiate
|
||||
* between wifi (opcode is 0xf) and non-wifi commands
|
||||
* (opcode is [0..0xe]).
|
||||
*
|
||||
* When a command (wifi or non-wifi) is supposed to receive
|
||||
* an answer, we queue the command buffer. When we do receive
|
||||
* a command response from the UMAC, we go through the list
|
||||
* of pending command, and pass both the command and the answer
|
||||
* to the rx handler. Each command is sent with a unique
|
||||
* sequence id, and the answer is sent with the same one. This
|
||||
* is how we're supposed to match an answer with its command.
|
||||
* See rx.c:iwm_rx_handle_[non]wifi() and iwm_get_pending_[non]wifi()
|
||||
* for the implementation details.
|
||||
*/
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/netdevice.h>
|
||||
#include <linux/slab.h>
|
||||
|
||||
#include "iwm.h"
|
||||
#include "bus.h"
|
||||
#include "hal.h"
|
||||
#include "umac.h"
|
||||
#include "debug.h"
|
||||
#include "trace.h"
|
||||
|
||||
static int iwm_nonwifi_cmd_init(struct iwm_priv *iwm,
|
||||
struct iwm_nonwifi_cmd *cmd,
|
||||
struct iwm_udma_nonwifi_cmd *udma_cmd)
|
||||
{
|
||||
INIT_LIST_HEAD(&cmd->pending);
|
||||
|
||||
spin_lock(&iwm->cmd_lock);
|
||||
|
||||
cmd->resp_received = 0;
|
||||
|
||||
cmd->seq_num = iwm->nonwifi_seq_num;
|
||||
udma_cmd->seq_num = cpu_to_le16(cmd->seq_num);
|
||||
|
||||
iwm->nonwifi_seq_num++;
|
||||
iwm->nonwifi_seq_num %= UMAC_NONWIFI_SEQ_NUM_MAX;
|
||||
|
||||
if (udma_cmd->resp)
|
||||
list_add_tail(&cmd->pending, &iwm->nonwifi_pending_cmd);
|
||||
|
||||
spin_unlock(&iwm->cmd_lock);
|
||||
|
||||
cmd->buf.start = cmd->buf.payload;
|
||||
cmd->buf.len = 0;
|
||||
|
||||
memcpy(&cmd->udma_cmd, udma_cmd, sizeof(*udma_cmd));
|
||||
|
||||
return cmd->seq_num;
|
||||
}
|
||||
|
||||
u16 iwm_alloc_wifi_cmd_seq(struct iwm_priv *iwm)
|
||||
{
|
||||
u16 seq_num = iwm->wifi_seq_num;
|
||||
|
||||
iwm->wifi_seq_num++;
|
||||
iwm->wifi_seq_num %= UMAC_WIFI_SEQ_NUM_MAX;
|
||||
|
||||
return seq_num;
|
||||
}
|
||||
|
||||
static void iwm_wifi_cmd_init(struct iwm_priv *iwm,
|
||||
struct iwm_wifi_cmd *cmd,
|
||||
struct iwm_udma_wifi_cmd *udma_cmd,
|
||||
struct iwm_umac_cmd *umac_cmd,
|
||||
struct iwm_lmac_cmd *lmac_cmd,
|
||||
u16 payload_size)
|
||||
{
|
||||
INIT_LIST_HEAD(&cmd->pending);
|
||||
|
||||
spin_lock(&iwm->cmd_lock);
|
||||
|
||||
cmd->seq_num = iwm_alloc_wifi_cmd_seq(iwm);
|
||||
umac_cmd->seq_num = cpu_to_le16(cmd->seq_num);
|
||||
|
||||
if (umac_cmd->resp)
|
||||
list_add_tail(&cmd->pending, &iwm->wifi_pending_cmd);
|
||||
|
||||
spin_unlock(&iwm->cmd_lock);
|
||||
|
||||
cmd->buf.start = cmd->buf.payload;
|
||||
cmd->buf.len = 0;
|
||||
|
||||
if (lmac_cmd) {
|
||||
cmd->buf.start -= sizeof(struct iwm_lmac_hdr);
|
||||
|
||||
lmac_cmd->seq_num = cpu_to_le16(cmd->seq_num);
|
||||
lmac_cmd->count = cpu_to_le16(payload_size);
|
||||
|
||||
memcpy(&cmd->lmac_cmd, lmac_cmd, sizeof(*lmac_cmd));
|
||||
|
||||
umac_cmd->count = cpu_to_le16(sizeof(struct iwm_lmac_hdr));
|
||||
} else
|
||||
umac_cmd->count = 0;
|
||||
|
||||
umac_cmd->count = cpu_to_le16(payload_size +
|
||||
le16_to_cpu(umac_cmd->count));
|
||||
udma_cmd->count = cpu_to_le16(sizeof(struct iwm_umac_fw_cmd_hdr) +
|
||||
le16_to_cpu(umac_cmd->count));
|
||||
|
||||
memcpy(&cmd->udma_cmd, udma_cmd, sizeof(*udma_cmd));
|
||||
memcpy(&cmd->umac_cmd, umac_cmd, sizeof(*umac_cmd));
|
||||
}
|
||||
|
||||
void iwm_cmd_flush(struct iwm_priv *iwm)
|
||||
{
|
||||
struct iwm_wifi_cmd *wcmd, *wnext;
|
||||
struct iwm_nonwifi_cmd *nwcmd, *nwnext;
|
||||
|
||||
list_for_each_entry_safe(wcmd, wnext, &iwm->wifi_pending_cmd, pending) {
|
||||
list_del(&wcmd->pending);
|
||||
kfree(wcmd);
|
||||
}
|
||||
|
||||
list_for_each_entry_safe(nwcmd, nwnext, &iwm->nonwifi_pending_cmd,
|
||||
pending) {
|
||||
list_del(&nwcmd->pending);
|
||||
kfree(nwcmd);
|
||||
}
|
||||
}
|
||||
|
||||
struct iwm_wifi_cmd *iwm_get_pending_wifi_cmd(struct iwm_priv *iwm, u16 seq_num)
|
||||
{
|
||||
struct iwm_wifi_cmd *cmd;
|
||||
|
||||
list_for_each_entry(cmd, &iwm->wifi_pending_cmd, pending)
|
||||
if (cmd->seq_num == seq_num) {
|
||||
list_del(&cmd->pending);
|
||||
return cmd;
|
||||
}
|
||||
|
||||
return NULL;
|
||||
}
|
||||
|
||||
struct iwm_nonwifi_cmd *iwm_get_pending_nonwifi_cmd(struct iwm_priv *iwm,
|
||||
u8 seq_num, u8 cmd_opcode)
|
||||
{
|
||||
struct iwm_nonwifi_cmd *cmd;
|
||||
|
||||
list_for_each_entry(cmd, &iwm->nonwifi_pending_cmd, pending)
|
||||
if ((cmd->seq_num == seq_num) &&
|
||||
(cmd->udma_cmd.opcode == cmd_opcode) &&
|
||||
(cmd->resp_received)) {
|
||||
list_del(&cmd->pending);
|
||||
return cmd;
|
||||
}
|
||||
|
||||
return NULL;
|
||||
}
|
||||
|
||||
static void iwm_build_udma_nonwifi_hdr(struct iwm_priv *iwm,
|
||||
struct iwm_udma_out_nonwifi_hdr *hdr,
|
||||
struct iwm_udma_nonwifi_cmd *cmd)
|
||||
{
|
||||
memset(hdr, 0, sizeof(*hdr));
|
||||
|
||||
SET_VAL32(hdr->cmd, UMAC_HDI_OUT_CMD_OPCODE, cmd->opcode);
|
||||
SET_VAL32(hdr->cmd, UDMA_HDI_OUT_NW_CMD_RESP, cmd->resp);
|
||||
SET_VAL32(hdr->cmd, UMAC_HDI_OUT_CMD_EOT, 1);
|
||||
SET_VAL32(hdr->cmd, UDMA_HDI_OUT_NW_CMD_HANDLE_BY_HW,
|
||||
cmd->handle_by_hw);
|
||||
SET_VAL32(hdr->cmd, UMAC_HDI_OUT_CMD_SIGNATURE, UMAC_HDI_OUT_SIGNATURE);
|
||||
SET_VAL32(hdr->cmd, UDMA_HDI_OUT_CMD_NON_WIFI_HW_SEQ_NUM,
|
||||
le16_to_cpu(cmd->seq_num));
|
||||
|
||||
hdr->addr = cmd->addr;
|
||||
hdr->op1_sz = cmd->op1_sz;
|
||||
hdr->op2 = cmd->op2;
|
||||
}
|
||||
|
||||
static int iwm_send_udma_nonwifi_cmd(struct iwm_priv *iwm,
|
||||
struct iwm_nonwifi_cmd *cmd)
|
||||
{
|
||||
struct iwm_udma_out_nonwifi_hdr *udma_hdr;
|
||||
struct iwm_nonwifi_cmd_buff *buf;
|
||||
struct iwm_udma_nonwifi_cmd *udma_cmd = &cmd->udma_cmd;
|
||||
|
||||
buf = &cmd->buf;
|
||||
|
||||
buf->start -= sizeof(struct iwm_umac_nonwifi_out_hdr);
|
||||
buf->len += sizeof(struct iwm_umac_nonwifi_out_hdr);
|
||||
|
||||
udma_hdr = (struct iwm_udma_out_nonwifi_hdr *)(buf->start);
|
||||
|
||||
iwm_build_udma_nonwifi_hdr(iwm, udma_hdr, udma_cmd);
|
||||
|
||||
IWM_DBG_CMD(iwm, DBG,
|
||||
"Send UDMA nonwifi cmd: opcode = 0x%x, resp = 0x%x, "
|
||||
"hw = 0x%x, seqnum = %d, addr = 0x%x, op1_sz = 0x%x, "
|
||||
"op2 = 0x%x\n", udma_cmd->opcode, udma_cmd->resp,
|
||||
udma_cmd->handle_by_hw, cmd->seq_num, udma_cmd->addr,
|
||||
udma_cmd->op1_sz, udma_cmd->op2);
|
||||
|
||||
trace_iwm_tx_nonwifi_cmd(iwm, udma_hdr);
|
||||
return iwm_bus_send_chunk(iwm, buf->start, buf->len);
|
||||
}
|
||||
|
||||
void iwm_udma_wifi_hdr_set_eop(struct iwm_priv *iwm, u8 *buf, u8 eop)
|
||||
{
|
||||
struct iwm_udma_out_wifi_hdr *hdr = (struct iwm_udma_out_wifi_hdr *)buf;
|
||||
|
||||
SET_VAL32(hdr->cmd, UMAC_HDI_OUT_CMD_EOT, eop);
|
||||
}
|
||||
|
||||
void iwm_build_udma_wifi_hdr(struct iwm_priv *iwm,
|
||||
struct iwm_udma_out_wifi_hdr *hdr,
|
||||
struct iwm_udma_wifi_cmd *cmd)
|
||||
{
|
||||
memset(hdr, 0, sizeof(*hdr));
|
||||
|
||||
SET_VAL32(hdr->cmd, UMAC_HDI_OUT_CMD_OPCODE, UMAC_HDI_OUT_OPCODE_WIFI);
|
||||
SET_VAL32(hdr->cmd, UMAC_HDI_OUT_CMD_EOT, cmd->eop);
|
||||
SET_VAL32(hdr->cmd, UMAC_HDI_OUT_CMD_SIGNATURE, UMAC_HDI_OUT_SIGNATURE);
|
||||
|
||||
SET_VAL32(hdr->meta_data, UMAC_HDI_OUT_BYTE_COUNT,
|
||||
le16_to_cpu(cmd->count));
|
||||
SET_VAL32(hdr->meta_data, UMAC_HDI_OUT_CREDIT_GRP, cmd->credit_group);
|
||||
SET_VAL32(hdr->meta_data, UMAC_HDI_OUT_RATID, cmd->ra_tid);
|
||||
SET_VAL32(hdr->meta_data, UMAC_HDI_OUT_LMAC_OFFSET, cmd->lmac_offset);
|
||||
}
|
||||
|
||||
void iwm_build_umac_hdr(struct iwm_priv *iwm,
|
||||
struct iwm_umac_fw_cmd_hdr *hdr,
|
||||
struct iwm_umac_cmd *cmd)
|
||||
{
|
||||
memset(hdr, 0, sizeof(*hdr));
|
||||
|
||||
SET_VAL32(hdr->meta_data, UMAC_FW_CMD_BYTE_COUNT,
|
||||
le16_to_cpu(cmd->count));
|
||||
SET_VAL32(hdr->meta_data, UMAC_FW_CMD_TX_STA_COLOR, cmd->color);
|
||||
SET_VAL8(hdr->cmd.flags, UMAC_DEV_CMD_FLAGS_RESP_REQ, cmd->resp);
|
||||
|
||||
hdr->cmd.cmd = cmd->id;
|
||||
hdr->cmd.seq_num = cmd->seq_num;
|
||||
}
|
||||
|
||||
static int iwm_send_udma_wifi_cmd(struct iwm_priv *iwm,
|
||||
struct iwm_wifi_cmd *cmd)
|
||||
{
|
||||
struct iwm_umac_wifi_out_hdr *umac_hdr;
|
||||
struct iwm_wifi_cmd_buff *buf;
|
||||
struct iwm_udma_wifi_cmd *udma_cmd = &cmd->udma_cmd;
|
||||
struct iwm_umac_cmd *umac_cmd = &cmd->umac_cmd;
|
||||
int ret;
|
||||
|
||||
buf = &cmd->buf;
|
||||
|
||||
buf->start -= sizeof(struct iwm_umac_wifi_out_hdr);
|
||||
buf->len += sizeof(struct iwm_umac_wifi_out_hdr);
|
||||
|
||||
umac_hdr = (struct iwm_umac_wifi_out_hdr *)(buf->start);
|
||||
|
||||
iwm_build_udma_wifi_hdr(iwm, &umac_hdr->hw_hdr, udma_cmd);
|
||||
iwm_build_umac_hdr(iwm, &umac_hdr->sw_hdr, umac_cmd);
|
||||
|
||||
IWM_DBG_CMD(iwm, DBG,
|
||||
"Send UDMA wifi cmd: opcode = 0x%x, UMAC opcode = 0x%x, "
|
||||
"eop = 0x%x, count = 0x%x, credit_group = 0x%x, "
|
||||
"ra_tid = 0x%x, lmac_offset = 0x%x, seqnum = %d\n",
|
||||
UMAC_HDI_OUT_OPCODE_WIFI, umac_cmd->id,
|
||||
udma_cmd->eop, udma_cmd->count, udma_cmd->credit_group,
|
||||
udma_cmd->ra_tid, udma_cmd->lmac_offset, cmd->seq_num);
|
||||
|
||||
if (umac_cmd->id == UMAC_CMD_OPCODE_WIFI_PASS_THROUGH)
|
||||
IWM_DBG_CMD(iwm, DBG, "\tLMAC opcode: 0x%x\n",
|
||||
cmd->lmac_cmd.id);
|
||||
|
||||
ret = iwm_tx_credit_alloc(iwm, udma_cmd->credit_group, buf->len);
|
||||
|
||||
/* We keep sending UMAC reset regardless of the command credits.
|
||||
* The UMAC is supposed to be reset anyway and the Tx credits are
|
||||
* reinitialized afterwards. If we are lucky, the reset could
|
||||
* still be done even though we have run out of credits for the
|
||||
* command pool at this moment.*/
|
||||
if (ret && (umac_cmd->id != UMAC_CMD_OPCODE_RESET)) {
|
||||
IWM_DBG_TX(iwm, DBG, "Failed to alloc tx credit for cmd %d\n",
|
||||
umac_cmd->id);
|
||||
return ret;
|
||||
}
|
||||
|
||||
trace_iwm_tx_wifi_cmd(iwm, umac_hdr);
|
||||
return iwm_bus_send_chunk(iwm, buf->start, buf->len);
|
||||
}
|
||||
|
||||
/* target_cmd a.k.a udma_nonwifi_cmd can be sent when UMAC is not available */
|
||||
int iwm_hal_send_target_cmd(struct iwm_priv *iwm,
|
||||
struct iwm_udma_nonwifi_cmd *udma_cmd,
|
||||
const void *payload)
|
||||
{
|
||||
struct iwm_nonwifi_cmd *cmd;
|
||||
int ret, seq_num;
|
||||
|
||||
cmd = kzalloc(sizeof(struct iwm_nonwifi_cmd), GFP_KERNEL);
|
||||
if (!cmd) {
|
||||
IWM_ERR(iwm, "Couldn't alloc memory for hal cmd\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
seq_num = iwm_nonwifi_cmd_init(iwm, cmd, udma_cmd);
|
||||
|
||||
if (cmd->udma_cmd.opcode == UMAC_HDI_OUT_OPCODE_WRITE ||
|
||||
cmd->udma_cmd.opcode == UMAC_HDI_OUT_OPCODE_WRITE_PERSISTENT) {
|
||||
cmd->buf.len = le32_to_cpu(cmd->udma_cmd.op1_sz);
|
||||
memcpy(&cmd->buf.payload, payload, cmd->buf.len);
|
||||
}
|
||||
|
||||
ret = iwm_send_udma_nonwifi_cmd(iwm, cmd);
|
||||
|
||||
if (!udma_cmd->resp)
|
||||
kfree(cmd);
|
||||
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
return seq_num;
|
||||
}
|
||||
|
||||
static void iwm_build_lmac_hdr(struct iwm_priv *iwm, struct iwm_lmac_hdr *hdr,
|
||||
struct iwm_lmac_cmd *cmd)
|
||||
{
|
||||
memset(hdr, 0, sizeof(*hdr));
|
||||
|
||||
hdr->id = cmd->id;
|
||||
hdr->flags = 0; /* Is this ever used? */
|
||||
hdr->seq_num = cmd->seq_num;
|
||||
}
|
||||
|
||||
/*
|
||||
* iwm_hal_send_host_cmd(): sends commands to the UMAC or the LMAC.
|
||||
* Sending command to the LMAC is equivalent to sending a
|
||||
* regular UMAC command with the LMAC passthrough or the LMAC
|
||||
* wrapper UMAC command IDs.
|
||||
*/
|
||||
int iwm_hal_send_host_cmd(struct iwm_priv *iwm,
|
||||
struct iwm_udma_wifi_cmd *udma_cmd,
|
||||
struct iwm_umac_cmd *umac_cmd,
|
||||
struct iwm_lmac_cmd *lmac_cmd,
|
||||
const void *payload, u16 payload_size)
|
||||
{
|
||||
struct iwm_wifi_cmd *cmd;
|
||||
struct iwm_lmac_hdr *hdr;
|
||||
int lmac_hdr_len = 0;
|
||||
int ret;
|
||||
|
||||
cmd = kzalloc(sizeof(struct iwm_wifi_cmd), GFP_KERNEL);
|
||||
if (!cmd) {
|
||||
IWM_ERR(iwm, "Couldn't alloc memory for wifi hal cmd\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
iwm_wifi_cmd_init(iwm, cmd, udma_cmd, umac_cmd, lmac_cmd, payload_size);
|
||||
|
||||
if (lmac_cmd) {
|
||||
hdr = (struct iwm_lmac_hdr *)(cmd->buf.start);
|
||||
|
||||
iwm_build_lmac_hdr(iwm, hdr, &cmd->lmac_cmd);
|
||||
lmac_hdr_len = sizeof(struct iwm_lmac_hdr);
|
||||
}
|
||||
|
||||
memcpy(cmd->buf.payload, payload, payload_size);
|
||||
cmd->buf.len = le16_to_cpu(umac_cmd->count);
|
||||
|
||||
ret = iwm_send_udma_wifi_cmd(iwm, cmd);
|
||||
|
||||
/* We free the cmd if we're not expecting any response */
|
||||
if (!umac_cmd->resp)
|
||||
kfree(cmd);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*
|
||||
* iwm_hal_send_umac_cmd(): This is a special case for
|
||||
* iwm_hal_send_host_cmd() to send direct UMAC cmd (without
|
||||
* LMAC involved).
|
||||
*/
|
||||
int iwm_hal_send_umac_cmd(struct iwm_priv *iwm,
|
||||
struct iwm_udma_wifi_cmd *udma_cmd,
|
||||
struct iwm_umac_cmd *umac_cmd,
|
||||
const void *payload, u16 payload_size)
|
||||
{
|
||||
return iwm_hal_send_host_cmd(iwm, udma_cmd, umac_cmd, NULL,
|
||||
payload, payload_size);
|
||||
}
|
||||
@@ -1,237 +0,0 @@
|
||||
/*
|
||||
* Intel Wireless Multicomm 3200 WiFi driver
|
||||
*
|
||||
* Copyright (C) 2009 Intel Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* * Neither the name of Intel Corporation nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
*
|
||||
* Intel Corporation <ilw@linux.intel.com>
|
||||
* Samuel Ortiz <samuel.ortiz@intel.com>
|
||||
* Zhu Yi <yi.zhu@intel.com>
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _IWM_HAL_H_
|
||||
#define _IWM_HAL_H_
|
||||
|
||||
#include "umac.h"
|
||||
|
||||
#define GET_VAL8(s, name) ((s >> name##_POS) & name##_SEED)
|
||||
#define GET_VAL16(s, name) ((le16_to_cpu(s) >> name##_POS) & name##_SEED)
|
||||
#define GET_VAL32(s, name) ((le32_to_cpu(s) >> name##_POS) & name##_SEED)
|
||||
|
||||
#define SET_VAL8(s, name, val) \
|
||||
do { \
|
||||
s = (s & ~(name##_SEED << name##_POS)) | \
|
||||
((val & name##_SEED) << name##_POS); \
|
||||
} while (0)
|
||||
|
||||
#define SET_VAL16(s, name, val) \
|
||||
do { \
|
||||
s = cpu_to_le16((le16_to_cpu(s) & ~(name##_SEED << name##_POS)) | \
|
||||
((val & name##_SEED) << name##_POS)); \
|
||||
} while (0)
|
||||
|
||||
#define SET_VAL32(s, name, val) \
|
||||
do { \
|
||||
s = cpu_to_le32((le32_to_cpu(s) & ~(name##_SEED << name##_POS)) | \
|
||||
((val & name##_SEED) << name##_POS)); \
|
||||
} while (0)
|
||||
|
||||
|
||||
#define UDMA_UMAC_INIT { .eop = 1, \
|
||||
.credit_group = 0x4, \
|
||||
.ra_tid = UMAC_HDI_ACT_TBL_IDX_HOST_CMD, \
|
||||
.lmac_offset = 0 }
|
||||
#define UDMA_LMAC_INIT { .eop = 1, \
|
||||
.credit_group = 0x4, \
|
||||
.ra_tid = UMAC_HDI_ACT_TBL_IDX_HOST_CMD, \
|
||||
.lmac_offset = 4 }
|
||||
|
||||
|
||||
/* UDMA IN OP CODE -- cmd bits [3:0] */
|
||||
#define UDMA_HDI_IN_NW_CMD_OPCODE_POS 0
|
||||
#define UDMA_HDI_IN_NW_CMD_OPCODE_SEED 0xF
|
||||
|
||||
#define UDMA_IN_OPCODE_GENERAL_RESP 0x0
|
||||
#define UDMA_IN_OPCODE_READ_RESP 0x1
|
||||
#define UDMA_IN_OPCODE_WRITE_RESP 0x2
|
||||
#define UDMA_IN_OPCODE_PERS_WRITE_RESP 0x5
|
||||
#define UDMA_IN_OPCODE_PERS_READ_RESP 0x6
|
||||
#define UDMA_IN_OPCODE_RD_MDFY_WR_RESP 0x7
|
||||
#define UDMA_IN_OPCODE_EP_MNGMT_MSG 0x8
|
||||
#define UDMA_IN_OPCODE_CRDT_CHNG_MSG 0x9
|
||||
#define UDMA_IN_OPCODE_CNTRL_DATABASE_MSG 0xA
|
||||
#define UDMA_IN_OPCODE_SW_MSG 0xB
|
||||
#define UDMA_IN_OPCODE_WIFI 0xF
|
||||
#define UDMA_IN_OPCODE_WIFI_LMAC 0x1F
|
||||
#define UDMA_IN_OPCODE_WIFI_UMAC 0x2F
|
||||
|
||||
/* HW API: udma_hdi_nonwifi API (OUT and IN) */
|
||||
|
||||
/* iwm_udma_nonwifi_cmd request response -- bits [9:9] */
|
||||
#define UDMA_HDI_OUT_NW_CMD_RESP_POS 9
|
||||
#define UDMA_HDI_OUT_NW_CMD_RESP_SEED 0x1
|
||||
|
||||
/* iwm_udma_nonwifi_cmd handle by HW -- bits [11:11] */
|
||||
#define UDMA_HDI_OUT_NW_CMD_HANDLE_BY_HW_POS 11
|
||||
#define UDMA_HDI_OUT_NW_CMD_HANDLE_BY_HW_SEED 0x1
|
||||
|
||||
/* iwm_udma_nonwifi_cmd sequence-number -- bits [12:15] */
|
||||
#define UDMA_HDI_OUT_NW_CMD_SEQ_NUM_POS 12
|
||||
#define UDMA_HDI_OUT_NW_CMD_SEQ_NUM_SEED 0xF
|
||||
|
||||
/* UDMA IN Non-WIFI HW sequence number -- bits [12:15] */
|
||||
#define UDMA_IN_NW_HW_SEQ_NUM_POS 12
|
||||
#define UDMA_IN_NW_HW_SEQ_NUM_SEED 0xF
|
||||
|
||||
/* UDMA IN Non-WIFI HW signature -- bits [16:31] */
|
||||
#define UDMA_IN_NW_HW_SIG_POS 16
|
||||
#define UDMA_IN_NW_HW_SIG_SEED 0xFFFF
|
||||
|
||||
/* fixed signature */
|
||||
#define UDMA_IN_NW_HW_SIG 0xCBBC
|
||||
|
||||
/* UDMA IN Non-WIFI HW block length -- bits [32:35] */
|
||||
#define UDMA_IN_NW_HW_LENGTH_SEED 0xF
|
||||
#define UDMA_IN_NW_HW_LENGTH_POS 32
|
||||
|
||||
/* End of HW API: udma_hdi_nonwifi API (OUT and IN) */
|
||||
|
||||
#define IWM_SDIO_FW_MAX_CHUNK_SIZE 2032
|
||||
#define IWM_MAX_WIFI_HEADERS_SIZE 32
|
||||
#define IWM_MAX_NONWIFI_HEADERS_SIZE 16
|
||||
#define IWM_MAX_NONWIFI_CMD_BUFF_SIZE (IWM_SDIO_FW_MAX_CHUNK_SIZE - \
|
||||
IWM_MAX_NONWIFI_HEADERS_SIZE)
|
||||
#define IWM_MAX_WIFI_CMD_BUFF_SIZE (IWM_SDIO_FW_MAX_CHUNK_SIZE - \
|
||||
IWM_MAX_WIFI_HEADERS_SIZE)
|
||||
|
||||
#define IWM_HAL_CONCATENATE_BUF_SIZE (32 * 1024)
|
||||
|
||||
struct iwm_wifi_cmd_buff {
|
||||
u16 len;
|
||||
u8 *start;
|
||||
u8 hdr[IWM_MAX_WIFI_HEADERS_SIZE];
|
||||
u8 payload[IWM_MAX_WIFI_CMD_BUFF_SIZE];
|
||||
};
|
||||
|
||||
struct iwm_nonwifi_cmd_buff {
|
||||
u16 len;
|
||||
u8 *start;
|
||||
u8 hdr[IWM_MAX_NONWIFI_HEADERS_SIZE];
|
||||
u8 payload[IWM_MAX_NONWIFI_CMD_BUFF_SIZE];
|
||||
};
|
||||
|
||||
struct iwm_udma_nonwifi_cmd {
|
||||
u8 opcode;
|
||||
u8 eop;
|
||||
u8 resp;
|
||||
u8 handle_by_hw;
|
||||
__le32 addr;
|
||||
__le32 op1_sz;
|
||||
__le32 op2;
|
||||
__le16 seq_num;
|
||||
};
|
||||
|
||||
struct iwm_udma_wifi_cmd {
|
||||
__le16 count;
|
||||
u8 eop;
|
||||
u8 credit_group;
|
||||
u8 ra_tid;
|
||||
u8 lmac_offset;
|
||||
};
|
||||
|
||||
struct iwm_umac_cmd {
|
||||
u8 id;
|
||||
__le16 count;
|
||||
u8 resp;
|
||||
__le16 seq_num;
|
||||
u8 color;
|
||||
};
|
||||
|
||||
struct iwm_lmac_cmd {
|
||||
u8 id;
|
||||
__le16 count;
|
||||
u8 resp;
|
||||
__le16 seq_num;
|
||||
};
|
||||
|
||||
struct iwm_nonwifi_cmd {
|
||||
u16 seq_num;
|
||||
bool resp_received;
|
||||
struct list_head pending;
|
||||
struct iwm_udma_nonwifi_cmd udma_cmd;
|
||||
struct iwm_umac_cmd umac_cmd;
|
||||
struct iwm_lmac_cmd lmac_cmd;
|
||||
struct iwm_nonwifi_cmd_buff buf;
|
||||
u32 flags;
|
||||
};
|
||||
|
||||
struct iwm_wifi_cmd {
|
||||
u16 seq_num;
|
||||
struct list_head pending;
|
||||
struct iwm_udma_wifi_cmd udma_cmd;
|
||||
struct iwm_umac_cmd umac_cmd;
|
||||
struct iwm_lmac_cmd lmac_cmd;
|
||||
struct iwm_wifi_cmd_buff buf;
|
||||
u32 flags;
|
||||
};
|
||||
|
||||
void iwm_cmd_flush(struct iwm_priv *iwm);
|
||||
|
||||
struct iwm_wifi_cmd *iwm_get_pending_wifi_cmd(struct iwm_priv *iwm,
|
||||
u16 seq_num);
|
||||
struct iwm_nonwifi_cmd *iwm_get_pending_nonwifi_cmd(struct iwm_priv *iwm,
|
||||
u8 seq_num, u8 cmd_opcode);
|
||||
|
||||
|
||||
int iwm_hal_send_target_cmd(struct iwm_priv *iwm,
|
||||
struct iwm_udma_nonwifi_cmd *ucmd,
|
||||
const void *payload);
|
||||
|
||||
int iwm_hal_send_host_cmd(struct iwm_priv *iwm,
|
||||
struct iwm_udma_wifi_cmd *udma_cmd,
|
||||
struct iwm_umac_cmd *umac_cmd,
|
||||
struct iwm_lmac_cmd *lmac_cmd,
|
||||
const void *payload, u16 payload_size);
|
||||
|
||||
int iwm_hal_send_umac_cmd(struct iwm_priv *iwm,
|
||||
struct iwm_udma_wifi_cmd *udma_cmd,
|
||||
struct iwm_umac_cmd *umac_cmd,
|
||||
const void *payload, u16 payload_size);
|
||||
|
||||
u16 iwm_alloc_wifi_cmd_seq(struct iwm_priv *iwm);
|
||||
|
||||
void iwm_udma_wifi_hdr_set_eop(struct iwm_priv *iwm, u8 *buf, u8 eop);
|
||||
void iwm_build_udma_wifi_hdr(struct iwm_priv *iwm,
|
||||
struct iwm_udma_out_wifi_hdr *hdr,
|
||||
struct iwm_udma_wifi_cmd *cmd);
|
||||
void iwm_build_umac_hdr(struct iwm_priv *iwm,
|
||||
struct iwm_umac_fw_cmd_hdr *hdr,
|
||||
struct iwm_umac_cmd *cmd);
|
||||
#endif /* _IWM_HAL_H_ */
|
||||
@@ -1,367 +0,0 @@
|
||||
/*
|
||||
* Intel Wireless Multicomm 3200 WiFi driver
|
||||
*
|
||||
* Copyright (C) 2009 Intel Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* * Neither the name of Intel Corporation nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
*
|
||||
* Intel Corporation <ilw@linux.intel.com>
|
||||
* Samuel Ortiz <samuel.ortiz@intel.com>
|
||||
* Zhu Yi <yi.zhu@intel.com>
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef __IWM_H__
|
||||
#define __IWM_H__
|
||||
|
||||
#include <linux/netdevice.h>
|
||||
#include <linux/wireless.h>
|
||||
#include <net/cfg80211.h>
|
||||
|
||||
#include "debug.h"
|
||||
#include "hal.h"
|
||||
#include "umac.h"
|
||||
#include "lmac.h"
|
||||
#include "eeprom.h"
|
||||
#include "trace.h"
|
||||
|
||||
#define IWM_COPYRIGHT "Copyright(c) 2009 Intel Corporation"
|
||||
#define IWM_AUTHOR "<ilw@linux.intel.com>"
|
||||
|
||||
#define IWM_SRC_LMAC UMAC_HDI_IN_SOURCE_FHRX
|
||||
#define IWM_SRC_UDMA UMAC_HDI_IN_SOURCE_UDMA
|
||||
#define IWM_SRC_UMAC UMAC_HDI_IN_SOURCE_FW
|
||||
#define IWM_SRC_NUM 3
|
||||
|
||||
#define IWM_POWER_INDEX_MIN 0
|
||||
#define IWM_POWER_INDEX_MAX 5
|
||||
#define IWM_POWER_INDEX_DEFAULT 3
|
||||
|
||||
struct iwm_conf {
|
||||
u32 sdio_ior_timeout;
|
||||
unsigned long calib_map;
|
||||
unsigned long expected_calib_map;
|
||||
u8 ct_kill_entry;
|
||||
u8 ct_kill_exit;
|
||||
bool reset_on_fatal_err;
|
||||
bool auto_connect;
|
||||
bool wimax_not_present;
|
||||
bool enable_qos;
|
||||
u32 mode;
|
||||
|
||||
u32 power_index;
|
||||
u32 frag_threshold;
|
||||
u32 rts_threshold;
|
||||
bool cts_to_self;
|
||||
|
||||
u32 assoc_timeout;
|
||||
u32 roam_timeout;
|
||||
u32 wireless_mode;
|
||||
|
||||
u8 ibss_band;
|
||||
u8 ibss_channel;
|
||||
|
||||
u8 mac_addr[ETH_ALEN];
|
||||
};
|
||||
|
||||
enum {
|
||||
COEX_MODE_SA = 1,
|
||||
COEX_MODE_XOR,
|
||||
COEX_MODE_CM,
|
||||
COEX_MODE_MAX,
|
||||
};
|
||||
|
||||
struct iwm_if_ops;
|
||||
struct iwm_wifi_cmd;
|
||||
|
||||
struct pool_entry {
|
||||
int id; /* group id */
|
||||
int sid; /* super group id */
|
||||
int min_pages; /* min capacity in pages */
|
||||
int max_pages; /* max capacity in pages */
|
||||
int alloc_pages; /* allocated # of pages. incresed by driver */
|
||||
int total_freed_pages; /* total freed # of pages. incresed by UMAC */
|
||||
};
|
||||
|
||||
struct spool_entry {
|
||||
int id;
|
||||
int max_pages;
|
||||
int alloc_pages;
|
||||
};
|
||||
|
||||
struct iwm_tx_credit {
|
||||
spinlock_t lock;
|
||||
int pool_nr;
|
||||
unsigned long full_pools_map; /* bitmap for # of filled tx pools */
|
||||
struct pool_entry pools[IWM_MACS_OUT_GROUPS];
|
||||
struct spool_entry spools[IWM_MACS_OUT_SGROUPS];
|
||||
};
|
||||
|
||||
struct iwm_notif {
|
||||
struct list_head pending;
|
||||
u32 cmd_id;
|
||||
void *cmd;
|
||||
u8 src;
|
||||
void *buf;
|
||||
unsigned long buf_size;
|
||||
};
|
||||
|
||||
struct iwm_tid_info {
|
||||
__le16 last_seq_num;
|
||||
bool stopped;
|
||||
struct mutex mutex;
|
||||
};
|
||||
|
||||
struct iwm_sta_info {
|
||||
u8 addr[ETH_ALEN];
|
||||
bool valid;
|
||||
bool qos;
|
||||
u8 color;
|
||||
struct iwm_tid_info tid_info[IWM_UMAC_TID_NR];
|
||||
};
|
||||
|
||||
struct iwm_tx_info {
|
||||
u8 sta;
|
||||
u8 color;
|
||||
u8 tid;
|
||||
};
|
||||
|
||||
struct iwm_rx_info {
|
||||
unsigned long rx_size;
|
||||
unsigned long rx_buf_size;
|
||||
};
|
||||
|
||||
#define IWM_NUM_KEYS 4
|
||||
|
||||
struct iwm_umac_key_hdr {
|
||||
u8 mac[ETH_ALEN];
|
||||
u8 key_idx;
|
||||
u8 multicast; /* BCast encrypt & BCast decrypt of frames FROM mac */
|
||||
} __packed;
|
||||
|
||||
struct iwm_key {
|
||||
struct iwm_umac_key_hdr hdr;
|
||||
u32 cipher;
|
||||
u8 key[WLAN_MAX_KEY_LEN];
|
||||
u8 seq[IW_ENCODE_SEQ_MAX_SIZE];
|
||||
int key_len;
|
||||
int seq_len;
|
||||
};
|
||||
|
||||
#define IWM_RX_ID_HASH 0xff
|
||||
#define IWM_RX_ID_GET_HASH(id) ((id) % IWM_RX_ID_HASH)
|
||||
|
||||
#define IWM_STA_TABLE_NUM 16
|
||||
#define IWM_TX_LIST_SIZE 64
|
||||
#define IWM_RX_LIST_SIZE 256
|
||||
|
||||
#define IWM_SCAN_ID_MAX 0xff
|
||||
|
||||
#define IWM_STATUS_READY 0
|
||||
#define IWM_STATUS_SCANNING 1
|
||||
#define IWM_STATUS_SCAN_ABORTING 2
|
||||
#define IWM_STATUS_SME_CONNECTING 3
|
||||
#define IWM_STATUS_ASSOCIATED 4
|
||||
#define IWM_STATUS_RESETTING 5
|
||||
|
||||
struct iwm_tx_queue {
|
||||
int id;
|
||||
struct sk_buff_head queue;
|
||||
struct sk_buff_head stopped_queue;
|
||||
spinlock_t lock;
|
||||
struct workqueue_struct *wq;
|
||||
struct work_struct worker;
|
||||
u8 concat_buf[IWM_HAL_CONCATENATE_BUF_SIZE];
|
||||
int concat_count;
|
||||
u8 *concat_ptr;
|
||||
};
|
||||
|
||||
/* Queues 0 ~ 3 for AC data, 5 for iPAN */
|
||||
#define IWM_TX_QUEUES 5
|
||||
#define IWM_TX_DATA_QUEUES 4
|
||||
#define IWM_TX_CMD_QUEUE 4
|
||||
|
||||
struct iwm_bss_info {
|
||||
struct list_head node;
|
||||
struct cfg80211_bss *cfg_bss;
|
||||
struct iwm_umac_notif_bss_info *bss;
|
||||
};
|
||||
|
||||
typedef int (*iwm_handler)(struct iwm_priv *priv, u8 *buf,
|
||||
unsigned long buf_size, struct iwm_wifi_cmd *cmd);
|
||||
|
||||
#define IWM_WATCHDOG_PERIOD (6 * HZ)
|
||||
|
||||
struct iwm_priv {
|
||||
struct wireless_dev *wdev;
|
||||
struct iwm_if_ops *bus_ops;
|
||||
|
||||
struct iwm_conf conf;
|
||||
|
||||
unsigned long status;
|
||||
|
||||
struct list_head pending_notif;
|
||||
wait_queue_head_t notif_queue;
|
||||
|
||||
wait_queue_head_t nonwifi_queue;
|
||||
|
||||
unsigned long calib_done_map;
|
||||
struct {
|
||||
u8 *buf;
|
||||
u32 size;
|
||||
} calib_res[CALIBRATION_CMD_NUM];
|
||||
|
||||
struct iwm_umac_profile *umac_profile;
|
||||
bool umac_profile_active;
|
||||
|
||||
u8 bssid[ETH_ALEN];
|
||||
u8 channel;
|
||||
u16 rate;
|
||||
u32 txpower;
|
||||
|
||||
struct iwm_sta_info sta_table[IWM_STA_TABLE_NUM];
|
||||
struct list_head bss_list;
|
||||
|
||||
void (*nonwifi_rx_handlers[UMAC_HDI_IN_OPCODE_NONWIFI_MAX])
|
||||
(struct iwm_priv *priv, u8 *buf, unsigned long buf_size);
|
||||
|
||||
const iwm_handler *umac_handlers;
|
||||
const iwm_handler *lmac_handlers;
|
||||
DECLARE_BITMAP(lmac_handler_map, LMAC_COMMAND_ID_NUM);
|
||||
DECLARE_BITMAP(umac_handler_map, LMAC_COMMAND_ID_NUM);
|
||||
DECLARE_BITMAP(udma_handler_map, LMAC_COMMAND_ID_NUM);
|
||||
|
||||
struct list_head wifi_pending_cmd;
|
||||
struct list_head nonwifi_pending_cmd;
|
||||
u16 wifi_seq_num;
|
||||
u8 nonwifi_seq_num;
|
||||
spinlock_t cmd_lock;
|
||||
|
||||
u32 core_enabled;
|
||||
|
||||
u8 scan_id;
|
||||
struct cfg80211_scan_request *scan_request;
|
||||
|
||||
struct sk_buff_head rx_list;
|
||||
struct list_head rx_tickets;
|
||||
spinlock_t ticket_lock;
|
||||
struct list_head rx_packets[IWM_RX_ID_HASH];
|
||||
spinlock_t packet_lock[IWM_RX_ID_HASH];
|
||||
struct workqueue_struct *rx_wq;
|
||||
struct work_struct rx_worker;
|
||||
|
||||
struct iwm_tx_credit tx_credit;
|
||||
struct iwm_tx_queue txq[IWM_TX_QUEUES];
|
||||
|
||||
struct iwm_key keys[IWM_NUM_KEYS];
|
||||
s8 default_key;
|
||||
|
||||
DECLARE_BITMAP(wifi_ntfy, WIFI_IF_NTFY_MAX);
|
||||
wait_queue_head_t wifi_ntfy_queue;
|
||||
|
||||
wait_queue_head_t mlme_queue;
|
||||
|
||||
struct iw_statistics wstats;
|
||||
struct delayed_work stats_request;
|
||||
struct delayed_work disconnect;
|
||||
struct delayed_work ct_kill_delay;
|
||||
|
||||
struct iwm_debugfs dbg;
|
||||
|
||||
u8 *eeprom;
|
||||
struct timer_list watchdog;
|
||||
struct work_struct reset_worker;
|
||||
struct work_struct auth_retry_worker;
|
||||
struct mutex mutex;
|
||||
|
||||
u8 *req_ie;
|
||||
int req_ie_len;
|
||||
u8 *resp_ie;
|
||||
int resp_ie_len;
|
||||
|
||||
struct iwm_fw_error_hdr *last_fw_err;
|
||||
char umac_version[8];
|
||||
char lmac_version[8];
|
||||
|
||||
char private[0] __attribute__((__aligned__(NETDEV_ALIGN)));
|
||||
};
|
||||
|
||||
static inline void *iwm_private(struct iwm_priv *iwm)
|
||||
{
|
||||
BUG_ON(!iwm);
|
||||
return &iwm->private;
|
||||
}
|
||||
|
||||
#define hw_to_iwm(h) (h->iwm)
|
||||
#define iwm_to_dev(i) (wiphy_dev(i->wdev->wiphy))
|
||||
#define iwm_to_wiphy(i) (i->wdev->wiphy)
|
||||
#define wiphy_to_iwm(w) (struct iwm_priv *)(wiphy_priv(w))
|
||||
#define iwm_to_wdev(i) (i->wdev)
|
||||
#define wdev_to_iwm(w) (struct iwm_priv *)(wdev_priv(w))
|
||||
#define iwm_to_ndev(i) (i->wdev->netdev)
|
||||
#define ndev_to_iwm(n) (wdev_to_iwm(n->ieee80211_ptr))
|
||||
#define skb_to_rx_info(s) ((struct iwm_rx_info *)(s->cb))
|
||||
#define skb_to_tx_info(s) ((struct iwm_tx_info *)s->cb)
|
||||
|
||||
void *iwm_if_alloc(int sizeof_bus, struct device *dev,
|
||||
struct iwm_if_ops *if_ops);
|
||||
void iwm_if_free(struct iwm_priv *iwm);
|
||||
int iwm_if_add(struct iwm_priv *iwm);
|
||||
void iwm_if_remove(struct iwm_priv *iwm);
|
||||
int iwm_mode_to_nl80211_iftype(int mode);
|
||||
int iwm_priv_init(struct iwm_priv *iwm);
|
||||
void iwm_priv_deinit(struct iwm_priv *iwm);
|
||||
void iwm_reset(struct iwm_priv *iwm);
|
||||
void iwm_resetting(struct iwm_priv *iwm);
|
||||
void iwm_tx_credit_init_pools(struct iwm_priv *iwm,
|
||||
struct iwm_umac_notif_alive *alive);
|
||||
int iwm_tx_credit_alloc(struct iwm_priv *iwm, int id, int nb);
|
||||
int iwm_notif_send(struct iwm_priv *iwm, struct iwm_wifi_cmd *cmd,
|
||||
u8 cmd_id, u8 source, u8 *buf, unsigned long buf_size);
|
||||
int iwm_notif_handle(struct iwm_priv *iwm, u32 cmd, u8 source, long timeout);
|
||||
void iwm_init_default_profile(struct iwm_priv *iwm,
|
||||
struct iwm_umac_profile *profile);
|
||||
void iwm_link_on(struct iwm_priv *iwm);
|
||||
void iwm_link_off(struct iwm_priv *iwm);
|
||||
int iwm_up(struct iwm_priv *iwm);
|
||||
int iwm_down(struct iwm_priv *iwm);
|
||||
|
||||
/* TX API */
|
||||
int iwm_tid_to_queue(u16 tid);
|
||||
void iwm_tx_credit_inc(struct iwm_priv *iwm, int id, int total_freed_pages);
|
||||
void iwm_tx_worker(struct work_struct *work);
|
||||
int iwm_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
|
||||
|
||||
/* RX API */
|
||||
void iwm_rx_setup_handlers(struct iwm_priv *iwm);
|
||||
int iwm_rx_handle(struct iwm_priv *iwm, u8 *buf, unsigned long buf_size);
|
||||
int iwm_rx_handle_resp(struct iwm_priv *iwm, u8 *buf, unsigned long buf_size,
|
||||
struct iwm_wifi_cmd *cmd);
|
||||
void iwm_rx_free(struct iwm_priv *iwm);
|
||||
|
||||
#endif
|
||||
@@ -1,484 +0,0 @@
|
||||
/*
|
||||
* Intel Wireless Multicomm 3200 WiFi driver
|
||||
*
|
||||
* Copyright (C) 2009 Intel Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* * Neither the name of Intel Corporation nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
*
|
||||
* Intel Corporation <ilw@linux.intel.com>
|
||||
* Samuel Ortiz <samuel.ortiz@intel.com>
|
||||
* Zhu Yi <yi.zhu@intel.com>
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef __IWM_LMAC_H__
|
||||
#define __IWM_LMAC_H__
|
||||
|
||||
struct iwm_lmac_hdr {
|
||||
u8 id;
|
||||
u8 flags;
|
||||
__le16 seq_num;
|
||||
} __packed;
|
||||
|
||||
/* LMAC commands */
|
||||
#define CALIB_CFG_FLAG_SEND_COMPLETE_NTFY_AFTER_MSK 0x1
|
||||
|
||||
struct iwm_lmac_cal_cfg_elt {
|
||||
__le32 enable; /* 1 means LMAC needs to do something */
|
||||
__le32 start; /* 1 to start calibration, 0 to stop */
|
||||
__le32 send_res; /* 1 for sending back results */
|
||||
__le32 apply_res; /* 1 for applying calibration results to HW */
|
||||
__le32 reserved;
|
||||
} __packed;
|
||||
|
||||
struct iwm_lmac_cal_cfg_status {
|
||||
struct iwm_lmac_cal_cfg_elt init;
|
||||
struct iwm_lmac_cal_cfg_elt periodic;
|
||||
__le32 flags; /* CALIB_CFG_FLAG_SEND_COMPLETE_NTFY_AFTER_MSK */
|
||||
} __packed;
|
||||
|
||||
struct iwm_lmac_cal_cfg_cmd {
|
||||
struct iwm_lmac_cal_cfg_status ucode_cfg;
|
||||
struct iwm_lmac_cal_cfg_status driver_cfg;
|
||||
__le32 reserved;
|
||||
} __packed;
|
||||
|
||||
struct iwm_lmac_cal_cfg_resp {
|
||||
__le32 status;
|
||||
} __packed;
|
||||
|
||||
#define IWM_CARD_STATE_SW_HW_ENABLED 0x00
|
||||
#define IWM_CARD_STATE_HW_DISABLED 0x01
|
||||
#define IWM_CARD_STATE_SW_DISABLED 0x02
|
||||
#define IWM_CARD_STATE_CTKILL_DISABLED 0x04
|
||||
#define IWM_CARD_STATE_IS_RXON 0x10
|
||||
|
||||
struct iwm_lmac_card_state {
|
||||
__le32 flags;
|
||||
} __packed;
|
||||
|
||||
/**
|
||||
* COEX_PRIORITY_TABLE_CMD
|
||||
*
|
||||
* Priority entry for each state
|
||||
* Will keep two tables, for STA and WIPAN
|
||||
*/
|
||||
enum {
|
||||
/* UN-ASSOCIATION PART */
|
||||
COEX_UNASSOC_IDLE = 0,
|
||||
COEX_UNASSOC_MANUAL_SCAN,
|
||||
COEX_UNASSOC_AUTO_SCAN,
|
||||
|
||||
/* CALIBRATION */
|
||||
COEX_CALIBRATION,
|
||||
COEX_PERIODIC_CALIBRATION,
|
||||
|
||||
/* CONNECTION */
|
||||
COEX_CONNECTION_ESTAB,
|
||||
|
||||
/* ASSOCIATION PART */
|
||||
COEX_ASSOCIATED_IDLE,
|
||||
COEX_ASSOC_MANUAL_SCAN,
|
||||
COEX_ASSOC_AUTO_SCAN,
|
||||
COEX_ASSOC_ACTIVE_LEVEL,
|
||||
|
||||
/* RF ON/OFF */
|
||||
COEX_RF_ON,
|
||||
COEX_RF_OFF,
|
||||
COEX_STAND_ALONE_DEBUG,
|
||||
|
||||
/* IPNN */
|
||||
COEX_IPAN_ASSOC_LEVEL,
|
||||
|
||||
/* RESERVED */
|
||||
COEX_RSRVD1,
|
||||
COEX_RSRVD2,
|
||||
|
||||
COEX_EVENTS_NUM
|
||||
};
|
||||
|
||||
#define COEX_EVT_FLAG_MEDIUM_FREE_NTFY_MSK 0x1
|
||||
#define COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_MSK 0x2
|
||||
#define COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_MSK 0x4
|
||||
|
||||
struct coex_event {
|
||||
u8 req_prio;
|
||||
u8 win_med_prio;
|
||||
u8 reserved;
|
||||
u8 flags;
|
||||
} __packed;
|
||||
|
||||
#define COEX_FLAGS_STA_TABLE_VALID_MSK 0x1
|
||||
#define COEX_FLAGS_UNASSOC_WAKEUP_UMASK_MSK 0x4
|
||||
#define COEX_FLAGS_ASSOC_WAKEUP_UMASK_MSK 0x8
|
||||
#define COEX_FLAGS_COEX_ENABLE_MSK 0x80
|
||||
|
||||
struct iwm_coex_prio_table_cmd {
|
||||
u8 flags;
|
||||
u8 reserved[3];
|
||||
struct coex_event sta_prio[COEX_EVENTS_NUM];
|
||||
} __packed;
|
||||
|
||||
/* Coexistence definitions
|
||||
*
|
||||
* Constants to fill in the Priorities' Tables
|
||||
* RP - Requested Priority
|
||||
* WP - Win Medium Priority: priority assigned when the contention has been won
|
||||
* FLAGS - Combination of COEX_EVT_FLAG_MEDIUM_FREE_NTFY_MSK and
|
||||
* COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_MSK
|
||||
*/
|
||||
|
||||
#define COEX_UNASSOC_IDLE_FLAGS 0
|
||||
#define COEX_UNASSOC_MANUAL_SCAN_FLAGS (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_MSK | \
|
||||
COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_MSK)
|
||||
#define COEX_UNASSOC_AUTO_SCAN_FLAGS (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_MSK | \
|
||||
COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_MSK)
|
||||
#define COEX_CALIBRATION_FLAGS (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_MSK | \
|
||||
COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_MSK)
|
||||
#define COEX_PERIODIC_CALIBRATION_FLAGS 0
|
||||
/* COEX_CONNECTION_ESTAB: we need DELAY_MEDIUM_FREE_NTFY to let WiMAX
|
||||
* disconnect from network. */
|
||||
#define COEX_CONNECTION_ESTAB_FLAGS (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_MSK | \
|
||||
COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_MSK | \
|
||||
COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_MSK)
|
||||
#define COEX_ASSOCIATED_IDLE_FLAGS 0
|
||||
#define COEX_ASSOC_MANUAL_SCAN_FLAGS (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_MSK | \
|
||||
COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_MSK)
|
||||
#define COEX_ASSOC_AUTO_SCAN_FLAGS (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_MSK | \
|
||||
COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_MSK)
|
||||
#define COEX_ASSOC_ACTIVE_LEVEL_FLAGS 0
|
||||
#define COEX_RF_ON_FLAGS 0
|
||||
#define COEX_RF_OFF_FLAGS 0
|
||||
#define COEX_STAND_ALONE_DEBUG_FLAGS (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_MSK | \
|
||||
COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_MSK)
|
||||
#define COEX_IPAN_ASSOC_LEVEL_FLAGS (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_MSK | \
|
||||
COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_MSK | \
|
||||
COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_MSK)
|
||||
#define COEX_RSRVD1_FLAGS 0
|
||||
#define COEX_RSRVD2_FLAGS 0
|
||||
/* XOR_RF_ON is the event wrapping all radio ownership. We need
|
||||
* DELAY_MEDIUM_FREE_NTFY to let WiMAX disconnect from network. */
|
||||
#define COEX_XOR_RF_ON_FLAGS (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_MSK | \
|
||||
COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_MSK | \
|
||||
COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_MSK)
|
||||
|
||||
/* CT kill config command */
|
||||
struct iwm_ct_kill_cfg_cmd {
|
||||
u32 exit_threshold;
|
||||
u32 reserved;
|
||||
u32 entry_threshold;
|
||||
} __packed;
|
||||
|
||||
|
||||
/* LMAC OP CODES */
|
||||
#define REPLY_PAD 0x0
|
||||
#define REPLY_ALIVE 0x1
|
||||
#define REPLY_ERROR 0x2
|
||||
#define REPLY_ECHO 0x3
|
||||
#define REPLY_HALT 0x6
|
||||
|
||||
/* RXON state commands */
|
||||
#define REPLY_RX_ON 0x10
|
||||
#define REPLY_RX_ON_ASSOC 0x11
|
||||
#define REPLY_RX_OFF 0x12
|
||||
#define REPLY_QOS_PARAM 0x13
|
||||
#define REPLY_RX_ON_TIMING 0x14
|
||||
#define REPLY_INTERNAL_QOS_PARAM 0x15
|
||||
#define REPLY_RX_INT_TIMEOUT_CNFG 0x16
|
||||
#define REPLY_NULL 0x17
|
||||
|
||||
/* Multi-Station support */
|
||||
#define REPLY_ADD_STA 0x18
|
||||
#define REPLY_REMOVE_STA 0x19
|
||||
#define REPLY_RESET_ALL_STA 0x1a
|
||||
|
||||
/* RX, TX */
|
||||
#define REPLY_ALM_RX 0x1b
|
||||
#define REPLY_TX 0x1c
|
||||
#define REPLY_TXFIFO_FLUSH 0x1e
|
||||
|
||||
/* MISC commands */
|
||||
#define REPLY_MGMT_MCAST_KEY 0x1f
|
||||
#define REPLY_WEPKEY 0x20
|
||||
#define REPLY_INIT_IV 0x21
|
||||
#define REPLY_WRITE_MIB 0x22
|
||||
#define REPLY_READ_MIB 0x23
|
||||
#define REPLY_RADIO_FE 0x24
|
||||
#define REPLY_TXFIFO_CFG 0x25
|
||||
#define REPLY_WRITE_READ 0x26
|
||||
#define REPLY_INSTALL_SEC_KEY 0x27
|
||||
|
||||
|
||||
#define REPLY_RATE_SCALE 0x47
|
||||
#define REPLY_LEDS_CMD 0x48
|
||||
#define REPLY_TX_LINK_QUALITY_CMD 0x4e
|
||||
#define REPLY_ANA_MIB_OVERRIDE_CMD 0x4f
|
||||
#define REPLY_WRITE2REG_CMD 0x50
|
||||
|
||||
/* winfi-wifi coexistence */
|
||||
#define COEX_PRIORITY_TABLE_CMD 0x5a
|
||||
#define COEX_MEDIUM_NOTIFICATION 0x5b
|
||||
#define COEX_EVENT_CMD 0x5c
|
||||
|
||||
/* more Protocol and Protocol-test commands */
|
||||
#define REPLY_MAX_SLEEP_TIME_CMD 0x61
|
||||
#define CALIBRATION_CFG_CMD 0x65
|
||||
#define CALIBRATION_RES_NOTIFICATION 0x66
|
||||
#define CALIBRATION_COMPLETE_NOTIFICATION 0x67
|
||||
|
||||
/* Measurements */
|
||||
#define REPLY_QUIET_CMD 0x71
|
||||
#define REPLY_CHANNEL_SWITCH 0x72
|
||||
#define CHANNEL_SWITCH_NOTIFICATION 0x73
|
||||
|
||||
#define REPLY_SPECTRUM_MEASUREMENT_CMD 0x74
|
||||
#define SPECTRUM_MEASURE_NOTIFICATION 0x75
|
||||
#define REPLY_MEASUREMENT_ABORT_CMD 0x76
|
||||
|
||||
/* Power Management */
|
||||
#define POWER_TABLE_CMD 0x77
|
||||
#define SAVE_RESTORE_ADDRESS_CMD 0x78
|
||||
#define REPLY_WATERMARK_CMD 0x79
|
||||
#define PM_DEBUG_STATISTIC_NOTIFIC 0x7B
|
||||
#define PD_FLUSH_N_NOTIFICATION 0x7C
|
||||
|
||||
/* Scan commands and notifications */
|
||||
#define REPLY_SCAN_REQUEST_CMD 0x80
|
||||
#define REPLY_SCAN_ABORT_CMD 0x81
|
||||
#define SCAN_START_NOTIFICATION 0x82
|
||||
#define SCAN_RESULTS_NOTIFICATION 0x83
|
||||
#define SCAN_COMPLETE_NOTIFICATION 0x84
|
||||
|
||||
/* Continuous TX commands */
|
||||
#define REPLY_CONT_TX_CMD 0x85
|
||||
#define END_OF_CONT_TX_NOTIFICATION 0x86
|
||||
|
||||
/* Timer/Eeprom commands */
|
||||
#define TIMER_CMD 0x87
|
||||
#define EEPROM_WRITE_CMD 0x88
|
||||
|
||||
/* PAPD commands */
|
||||
#define FEEDBACK_REQUEST_NOTIFICATION 0x8b
|
||||
#define REPLY_CW_CMD 0x8c
|
||||
|
||||
/* IBSS/AP commands Continue */
|
||||
#define BEACON_NOTIFICATION 0x90
|
||||
#define REPLY_TX_BEACON 0x91
|
||||
#define REPLY_REQUEST_ATIM 0x93
|
||||
#define WHO_IS_AWAKE_NOTIFICATION 0x94
|
||||
#define TX_PWR_DBM_LIMIT_CMD 0x95
|
||||
#define QUIET_NOTIFICATION 0x96
|
||||
#define TX_PWR_TABLE_CMD 0x97
|
||||
#define TX_ANT_CONFIGURATION_CMD 0x98
|
||||
#define MEASURE_ABORT_NOTIFICATION 0x99
|
||||
#define REPLY_CALIBRATION_TUNE 0x9a
|
||||
|
||||
/* bt config command */
|
||||
#define REPLY_BT_CONFIG 0x9b
|
||||
#define REPLY_STATISTICS_CMD 0x9c
|
||||
#define STATISTICS_NOTIFICATION 0x9d
|
||||
|
||||
/* RF-KILL commands and notifications */
|
||||
#define REPLY_CARD_STATE_CMD 0xa0
|
||||
#define CARD_STATE_NOTIFICATION 0xa1
|
||||
|
||||
/* Missed beacons notification */
|
||||
#define MISSED_BEACONS_NOTIFICATION 0xa2
|
||||
#define MISSED_BEACONS_NOTIFICATION_TH_CMD 0xa3
|
||||
|
||||
#define REPLY_CT_KILL_CONFIG_CMD 0xa4
|
||||
|
||||
/* HD commands and notifications */
|
||||
#define REPLY_HD_PARAMS_CMD 0xa6
|
||||
#define HD_PARAMS_NOTIFICATION 0xa7
|
||||
#define SENSITIVITY_CMD 0xa8
|
||||
#define U_APSD_PARAMS_CMD 0xa9
|
||||
#define NOISY_PLATFORM_CMD 0xaa
|
||||
#define ILLEGAL_CMD 0xac
|
||||
#define REPLY_PHY_CALIBRATION_CMD 0xb0
|
||||
#define REPLAY_RX_GAIN_CALIB_CMD 0xb1
|
||||
|
||||
/* WiPAN commands */
|
||||
#define REPLY_WIPAN_PARAMS_CMD 0xb2
|
||||
#define REPLY_WIPAN_RX_ON_CMD 0xb3
|
||||
#define REPLY_WIPAN_RX_ON_TIMING 0xb4
|
||||
#define REPLY_WIPAN_TX_PWR_TABLE_CMD 0xb5
|
||||
#define REPLY_WIPAN_RXON_ASSOC_CMD 0xb6
|
||||
#define REPLY_WIPAN_QOS_PARAM 0xb7
|
||||
#define WIPAN_REPLY_WEPKEY 0xb8
|
||||
|
||||
/* BeamForming commands */
|
||||
#define BEAMFORMER_CFG_CMD 0xba
|
||||
#define BEAMFORMEE_NOTIFICATION 0xbb
|
||||
|
||||
/* TGn new Commands */
|
||||
#define REPLY_RX_PHY_CMD 0xc0
|
||||
#define REPLY_RX_MPDU_CMD 0xc1
|
||||
#define REPLY_MULTICAST_HASH 0xc2
|
||||
#define REPLY_KDR_RX 0xc3
|
||||
#define REPLY_RX_DSP_EXT_INFO 0xc4
|
||||
#define REPLY_COMPRESSED_BA 0xc5
|
||||
|
||||
/* PNC commands */
|
||||
#define PNC_CONFIG_CMD 0xc8
|
||||
#define PNC_UPDATE_TABLE_CMD 0xc9
|
||||
#define XVT_GENERAL_CTRL_CMD 0xca
|
||||
#define REPLY_LEGACY_RADIO_FE 0xdd
|
||||
|
||||
/* WoWLAN commands */
|
||||
#define WOWLAN_PATTERNS 0xe0
|
||||
#define WOWLAN_WAKEUP_FILTER 0xe1
|
||||
#define WOWLAN_TSC_RSC_PARAM 0xe2
|
||||
#define WOWLAN_TKIP_PARAM 0xe3
|
||||
#define WOWLAN_KEK_KCK_MATERIAL 0xe4
|
||||
#define WOWLAN_GET_STATUSES 0xe5
|
||||
#define WOWLAN_TX_POWER_PER_DB 0xe6
|
||||
#define REPLY_WOWLAN_GET_STATUSES WOWLAN_GET_STATUSES
|
||||
|
||||
#define REPLY_DEBUG_CMD 0xf0
|
||||
#define REPLY_DSP_DEBUG_CMD 0xf1
|
||||
#define REPLY_DEBUG_MONITOR_CMD 0xf2
|
||||
#define REPLY_DEBUG_XVT_CMD 0xf3
|
||||
#define REPLY_DEBUG_DC_CALIB 0xf4
|
||||
#define REPLY_DYNAMIC_BP 0xf5
|
||||
|
||||
/* General purpose Commands */
|
||||
#define REPLY_GP1_CMD 0xfa
|
||||
#define REPLY_GP2_CMD 0xfb
|
||||
#define REPLY_GP3_CMD 0xfc
|
||||
#define REPLY_GP4_CMD 0xfd
|
||||
#define REPLY_REPLAY_WRAPPER 0xfe
|
||||
#define REPLY_FRAME_DURATION_CALC_CMD 0xff
|
||||
|
||||
#define LMAC_COMMAND_ID_MAX 0xff
|
||||
#define LMAC_COMMAND_ID_NUM (LMAC_COMMAND_ID_MAX + 1)
|
||||
|
||||
|
||||
/* Calibration */
|
||||
|
||||
enum {
|
||||
PHY_CALIBRATE_DC_CMD = 0,
|
||||
PHY_CALIBRATE_LO_CMD = 1,
|
||||
PHY_CALIBRATE_RX_BB_CMD = 2,
|
||||
PHY_CALIBRATE_TX_IQ_CMD = 3,
|
||||
PHY_CALIBRATE_RX_IQ_CMD = 4,
|
||||
PHY_CALIBRATION_NOISE_CMD = 5,
|
||||
PHY_CALIBRATE_AGC_TABLE_CMD = 6,
|
||||
PHY_CALIBRATE_CRYSTAL_FRQ_CMD = 7,
|
||||
PHY_CALIBRATE_OPCODES_NUM,
|
||||
SHILOH_PHY_CALIBRATE_DC_CMD = 8,
|
||||
SHILOH_PHY_CALIBRATE_LO_CMD = 9,
|
||||
SHILOH_PHY_CALIBRATE_RX_BB_CMD = 10,
|
||||
SHILOH_PHY_CALIBRATE_TX_IQ_CMD = 11,
|
||||
SHILOH_PHY_CALIBRATE_RX_IQ_CMD = 12,
|
||||
SHILOH_PHY_CALIBRATION_NOISE_CMD = 13,
|
||||
SHILOH_PHY_CALIBRATE_AGC_TABLE_CMD = 14,
|
||||
SHILOH_PHY_CALIBRATE_CRYSTAL_FRQ_CMD = 15,
|
||||
SHILOH_PHY_CALIBRATE_BASE_BAND_CMD = 16,
|
||||
SHILOH_PHY_CALIBRATE_TXIQ_PERIODIC_CMD = 17,
|
||||
CALIBRATION_CMD_NUM,
|
||||
};
|
||||
|
||||
enum {
|
||||
CALIB_CFG_RX_BB_IDX = 0,
|
||||
CALIB_CFG_DC_IDX = 1,
|
||||
CALIB_CFG_LO_IDX = 2,
|
||||
CALIB_CFG_TX_IQ_IDX = 3,
|
||||
CALIB_CFG_RX_IQ_IDX = 4,
|
||||
CALIB_CFG_NOISE_IDX = 5,
|
||||
CALIB_CFG_CRYSTAL_IDX = 6,
|
||||
CALIB_CFG_TEMPERATURE_IDX = 7,
|
||||
CALIB_CFG_PAPD_IDX = 8,
|
||||
CALIB_CFG_LAST_IDX = CALIB_CFG_PAPD_IDX,
|
||||
CALIB_CFG_MODULE_NUM,
|
||||
};
|
||||
|
||||
#define IWM_CALIB_MAP_INIT_MSK 0xFFFF
|
||||
#define IWM_CALIB_MAP_PER_LMAC(m) ((m & 0xFF0000) >> 16)
|
||||
#define IWM_CALIB_MAP_PER_UMAC(m) ((m & 0xFF000000) >> 24)
|
||||
#define IWM_CALIB_OPCODE_TO_INDEX(op) (op - PHY_CALIBRATE_OPCODES_NUM)
|
||||
|
||||
struct iwm_lmac_calib_hdr {
|
||||
u8 opcode;
|
||||
u8 first_grp;
|
||||
u8 grp_num;
|
||||
u8 all_data_valid;
|
||||
} __packed;
|
||||
|
||||
#define IWM_LMAC_CALIB_FREQ_GROUPS_NR 7
|
||||
#define IWM_CALIB_FREQ_GROUPS_NR 5
|
||||
#define IWM_CALIB_DC_MODES_NR 12
|
||||
|
||||
struct iwm_calib_rxiq_entry {
|
||||
u16 ptam_postdist_ars;
|
||||
u16 ptam_postdist_arc;
|
||||
} __packed;
|
||||
|
||||
struct iwm_calib_rxiq_group {
|
||||
struct iwm_calib_rxiq_entry mode[IWM_CALIB_DC_MODES_NR];
|
||||
} __packed;
|
||||
|
||||
struct iwm_lmac_calib_rxiq {
|
||||
struct iwm_calib_rxiq_group group[IWM_LMAC_CALIB_FREQ_GROUPS_NR];
|
||||
} __packed;
|
||||
|
||||
struct iwm_calib_rxiq {
|
||||
struct iwm_lmac_calib_hdr hdr;
|
||||
struct iwm_calib_rxiq_group group[IWM_CALIB_FREQ_GROUPS_NR];
|
||||
} __packed;
|
||||
|
||||
#define LMAC_STA_ID_SEED 0x0f
|
||||
#define LMAC_STA_ID_POS 0
|
||||
|
||||
#define LMAC_STA_COLOR_SEED 0x7
|
||||
#define LMAC_STA_COLOR_POS 4
|
||||
|
||||
struct iwm_lmac_power_report {
|
||||
u8 pa_status;
|
||||
u8 pa_integ_res_A[3];
|
||||
u8 pa_integ_res_B[3];
|
||||
u8 pa_integ_res_C[3];
|
||||
} __packed;
|
||||
|
||||
struct iwm_lmac_tx_resp {
|
||||
u8 frame_cnt; /* 1-no aggregation, greater then 1 - aggregation */
|
||||
u8 bt_kill_cnt;
|
||||
__le16 retry_cnt;
|
||||
__le32 initial_tx_rate;
|
||||
__le16 wireless_media_time;
|
||||
struct iwm_lmac_power_report power_report;
|
||||
__le32 tfd_info;
|
||||
__le16 seq_ctl;
|
||||
__le16 byte_cnt;
|
||||
u8 tlc_rate_info;
|
||||
u8 ra_tid;
|
||||
__le16 frame_ctl;
|
||||
__le32 status;
|
||||
} __packed;
|
||||
|
||||
#endif
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user