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V4L/DVB (12271): lgs8gxx: add lgs8g75 support

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lgs8gxx: add lgs8g75 demodulator support

Signed-off-by: David T.L. Wong <davidtlwong@gmail.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
This commit is contained in:
David Wong
2009-06-17 01:38:10 -03:00
committed by Mauro Carvalho Chehab
parent a0d64456f7
commit b80dc1c673
3 changed files with 400 additions and 105 deletions
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drivers/media/dvb/frontends/lgs8gxx.c
+386 -96
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File diff suppressed because it is too large Load Diff
drivers/media/dvb/frontends/lgs8gxx.h
+8 -3
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@@ -1,9 +1,9 @@
/*
* Support for Legend Silicon DMB-TH demodulator
* LGS8913, LGS8GL5
* Support for Legend Silicon GB20600 (a.k.a DMB-TH) demodulator
* LGS8913, LGS8GL5, LGS8G75
* experimental support LGS8G42, LGS8G52
*
* Copyright (C) 2007,2008 David T.L. Wong <davidtlwong@gmail.com>
* Copyright (C) 2007-2009 David T.L. Wong <davidtlwong@gmail.com>
* Copyright (C) 2008 Sirius International (Hong Kong) Limited
* Timothy Lee <timothy.lee@siriushk.com> (for initial work on LGS8GL5)
*
@@ -34,6 +34,7 @@
#define LGS8GXX_PROD_LGS8G42 3
#define LGS8GXX_PROD_LGS8G52 4
#define LGS8GXX_PROD_LGS8G54 5
#define LGS8GXX_PROD_LGS8G75 6
struct lgs8gxx_config {
@@ -70,6 +71,10 @@ struct lgs8gxx_config {
/*IF use Negative center frequency*/
u8 if_neg_center;
/*8G75 internal ADC input range selection*/
/*0: 0.8Vpp, 1: 1.0Vpp, 2: 1.6Vpp, 3: 2.0Vpp*/
u8 adc_vpp;
/* slave address and configuration of the tuner */
u8 tuner_address;
};
drivers/media/dvb/frontends/lgs8gxx_priv.h
+6 -6
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@@ -1,9 +1,9 @@
/*
* Support for Legend Silicon DMB-TH demodulator
* LGS8913, LGS8GL5
* Support for Legend Silicon GB20600 (a.k.a DMB-TH) demodulator
* LGS8913, LGS8GL5, LGS8G75
* experimental support LGS8G42, LGS8G52
*
* Copyright (C) 2007,2008 David T.L. Wong <davidtlwong@gmail.com>
* Copyright (C) 2007-2009 David T.L. Wong <davidtlwong@gmail.com>
* Copyright (C) 2008 Sirius International (Hong Kong) Limited
* Timothy Lee <timothy.lee@siriushk.com> (for initial work on LGS8GL5)
*
@@ -38,7 +38,7 @@ struct lgs8gxx_state {
#define SC_QAM64 0x10 /* 64QAM modulation */
#define SC_QAM32 0x0C /* 32QAM modulation */
#define SC_QAM16 0x08 /* 16QAM modulation */
#define SC_QAM4NR 0x04 /* 4QAM modulation */
#define SC_QAM4NR 0x04 /* 4QAM-NR modulation */
#define SC_QAM4 0x00 /* 4QAM modulation */
#define LGS_FEC_MASK 0x03 /* FEC Rate Mask */
@@ -47,8 +47,8 @@ struct lgs8gxx_state {
#define LGS_FEC_0_8 0x02 /* FEC Rate 0.8 */
#define TIM_MASK 0x20 /* Time Interleave Length Mask */
#define TIM_LONG 0x00 /* Time Interleave Length = 720 */
#define TIM_MIDDLE 0x20 /* Time Interleave Length = 240 */
#define TIM_LONG 0x20 /* Time Interleave Length = 720 */
#define TIM_MIDDLE 0x00 /* Time Interleave Length = 240 */
#define CF_MASK 0x80 /* Control Frame Mask */
#define CF_EN 0x80 /* Control Frame On */