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Merge remote-tracking branches 'asoc/topic/sta350', 'asoc/topic/tas2552', 'asoc/topic/tas3a227e' and 'asoc/topic/tas571x' into asoc-next
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@@ -0,0 +1,41 @@
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Texas Instruments TAS5711/TAS5717/TAS5719 stereo power amplifiers
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The codec is controlled through an I2C interface. It also has two other
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signals that can be wired up to GPIOs: reset (strongly recommended), and
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powerdown (optional).
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Required properties:
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- compatible: "ti,tas5711", "ti,tas5717", or "ti,tas5719"
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- reg: The I2C address of the device
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- #sound-dai-cells: must be equal to 0
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Optional properties:
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- reset-gpios: GPIO specifier for the TAS571x's active low reset line
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- pdn-gpios: GPIO specifier for the TAS571x's active low powerdown line
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- clocks: clock phandle for the MCLK input
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- clock-names: should be "mclk"
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- AVDD-supply: regulator phandle for the AVDD supply (all chips)
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- DVDD-supply: regulator phandle for the DVDD supply (all chips)
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- HPVDD-supply: regulator phandle for the HPVDD supply (5717/5719)
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- PVDD_AB-supply: regulator phandle for the PVDD_AB supply (5717/5719)
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- PVDD_CD-supply: regulator phandle for the PVDD_CD supply (5717/5719)
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- PVDD_A-supply: regulator phandle for the PVDD_A supply (5711)
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- PVDD_B-supply: regulator phandle for the PVDD_B supply (5711)
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- PVDD_C-supply: regulator phandle for the PVDD_C supply (5711)
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- PVDD_D-supply: regulator phandle for the PVDD_D supply (5711)
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Example:
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tas5717: audio-codec@2a {
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compatible = "ti,tas5717";
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reg = <0x2a>;
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#sound-dai-cells = <0>;
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reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
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pdn-gpios = <&gpio5 2 GPIO_ACTIVE_LOW>;
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clocks = <&clk_core CLK_I2S>;
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clock-names = "mclk";
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};
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@@ -9922,6 +9922,12 @@ L: netdev@vger.kernel.org
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S: Maintained
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F: drivers/net/ethernet/ti/netcp*
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TI TAS571X FAMILY ASoC CODEC DRIVER
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M: Kevin Cernekee <cernekee@chromium.org>
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L: alsa-devel@alsa-project.org (moderated for non-subscribers)
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S: Odd Fixes
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F: sound/soc/codecs/tas571x*
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TI TWL4030 SERIES SOC CODEC DRIVER
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M: Peter Ujfalusi <peter.ujfalusi@ti.com>
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L: alsa-devel@alsa-project.org (moderated for non-subscribers)
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@@ -0,0 +1,18 @@
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#ifndef __DT_TAS2552_H
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#define __DT_TAS2552_H
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#define TAS2552_PLL_CLKIN (0)
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#define TAS2552_PDM_CLK (1)
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#define TAS2552_CLK_TARGET_MASK (1)
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#define TAS2552_PLL_CLKIN_MCLK ((0 << 1) | TAS2552_PLL_CLKIN)
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#define TAS2552_PLL_CLKIN_BCLK ((1 << 1) | TAS2552_PLL_CLKIN)
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#define TAS2552_PLL_CLKIN_IVCLKIN ((2 << 1) | TAS2552_PLL_CLKIN)
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#define TAS2552_PLL_CLKIN_1_8_FIXED ((3 << 1) | TAS2552_PLL_CLKIN)
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#define TAS2552_PDM_CLK_PLL ((0 << 1) | TAS2552_PDM_CLK)
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#define TAS2552_PDM_CLK_IVCLKIN ((1 << 1) | TAS2552_PDM_CLK)
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#define TAS2552_PDM_CLK_BCLK ((2 << 1) | TAS2552_PDM_CLK)
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#define TAS2552_PDM_CLK_MCLK ((3 << 1) | TAS2552_PDM_CLK)
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#endif /* __DT_TAS2552_H */
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@@ -104,6 +104,7 @@ config SND_SOC_ALL_CODECS
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select SND_SOC_STAC9766 if SND_SOC_AC97_BUS
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select SND_SOC_TAS2552 if I2C
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select SND_SOC_TAS5086 if I2C
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select SND_SOC_TAS571X if I2C
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select SND_SOC_TFA9879 if I2C
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select SND_SOC_TLV320AIC23_I2C if I2C
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select SND_SOC_TLV320AIC23_SPI if SPI_MASTER
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@@ -612,6 +613,10 @@ config SND_SOC_TAS5086
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tristate "Texas Instruments TAS5086 speaker amplifier"
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depends on I2C
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config SND_SOC_TAS571X
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tristate "Texas Instruments TAS5711/TAS5717/TAS5719 power amplifiers"
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depends on I2C
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config SND_SOC_TFA9879
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tristate "NXP Semiconductors TFA9879 amplifier"
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depends on I2C
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@@ -106,6 +106,7 @@ snd-soc-sta350-objs := sta350.o
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snd-soc-sta529-objs := sta529.o
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snd-soc-stac9766-objs := stac9766.o
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snd-soc-tas5086-objs := tas5086.o
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snd-soc-tas571x-objs := tas571x.o
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snd-soc-tfa9879-objs := tfa9879.o
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snd-soc-tlv320aic23-objs := tlv320aic23.o
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snd-soc-tlv320aic23-i2c-objs := tlv320aic23-i2c.o
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@@ -288,6 +289,7 @@ obj-$(CONFIG_SND_SOC_STA529) += snd-soc-sta529.o
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obj-$(CONFIG_SND_SOC_STAC9766) += snd-soc-stac9766.o
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obj-$(CONFIG_SND_SOC_TAS2552) += snd-soc-tas2552.o
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obj-$(CONFIG_SND_SOC_TAS5086) += snd-soc-tas5086.o
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obj-$(CONFIG_SND_SOC_TAS571X) += snd-soc-tas571x.o
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obj-$(CONFIG_SND_SOC_TFA9879) += snd-soc-tfa9879.o
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obj-$(CONFIG_SND_SOC_TLV320AIC23) += snd-soc-tlv320aic23.o
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obj-$(CONFIG_SND_SOC_TLV320AIC23_I2C) += snd-soc-tlv320aic23-i2c.o
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@@ -1217,8 +1217,8 @@ static int sta350_i2c_probe(struct i2c_client *i2c,
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if (IS_ERR(sta350->gpiod_nreset))
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return PTR_ERR(sta350->gpiod_nreset);
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sta350->gpiod_power_down = devm_gpiod_get(dev, "power-down",
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GPIOD_OUT_LOW);
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sta350->gpiod_power_down = devm_gpiod_get_optional(dev, "power-down",
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GPIOD_OUT_LOW);
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if (IS_ERR(sta350->gpiod_power_down))
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return PTR_ERR(sta350->gpiod_power_down);
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+239
-73
@@ -34,6 +34,7 @@
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#include <sound/soc-dapm.h>
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#include <sound/tlv.h>
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#include <sound/tas2552-plat.h>
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#include <dt-bindings/sound/tas2552.h>
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#include "tas2552.h"
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@@ -45,7 +46,7 @@ static struct reg_default tas2552_reg_defs[] = {
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{TAS2552_PDM_CFG, 0x01},
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{TAS2552_PGA_GAIN, 0x00},
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{TAS2552_BOOST_PT_CTRL, 0x0f},
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{TAS2552_RESERVED_0D, 0x00},
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{TAS2552_RESERVED_0D, 0xbe},
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{TAS2552_LIMIT_RATE_HYS, 0x08},
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{TAS2552_CFG_2, 0xef},
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{TAS2552_SER_CTRL_1, 0x00},
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@@ -75,20 +76,45 @@ struct tas2552_data {
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struct regulator_bulk_data supplies[TAS2552_NUM_SUPPLIES];
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struct gpio_desc *enable_gpio;
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unsigned char regs[TAS2552_VBAT_DATA];
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unsigned int mclk;
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unsigned int pll_clkin;
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unsigned int pdm_clk;
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unsigned int dai_fmt;
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unsigned int tdm_delay;
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};
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static int tas2552_post_event(struct snd_soc_dapm_widget *w,
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struct snd_kcontrol *kcontrol, int event)
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{
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struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
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switch (event) {
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case SND_SOC_DAPM_POST_PMU:
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snd_soc_write(codec, TAS2552_RESERVED_0D, 0xc0);
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snd_soc_update_bits(codec, TAS2552_LIMIT_RATE_HYS, (1 << 5),
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(1 << 5));
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snd_soc_update_bits(codec, TAS2552_CFG_2, 1, 0);
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snd_soc_update_bits(codec, TAS2552_CFG_1, TAS2552_SWS, 0);
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break;
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case SND_SOC_DAPM_POST_PMD:
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snd_soc_update_bits(codec, TAS2552_CFG_1, TAS2552_SWS,
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TAS2552_SWS);
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snd_soc_update_bits(codec, TAS2552_CFG_2, 1, 1);
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snd_soc_update_bits(codec, TAS2552_LIMIT_RATE_HYS, (1 << 5), 0);
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snd_soc_write(codec, TAS2552_RESERVED_0D, 0xbe);
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break;
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}
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return 0;
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}
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/* Input mux controls */
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static const char *tas2552_input_texts[] = {
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"Digital", "Analog"
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};
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static const char * const tas2552_input_texts[] = {
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"Digital", "Analog" };
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static SOC_ENUM_SINGLE_DECL(tas2552_input_mux_enum, TAS2552_CFG_3, 7,
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tas2552_input_texts);
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static const struct snd_kcontrol_new tas2552_input_mux_control[] = {
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SOC_DAPM_ENUM("Input selection", tas2552_input_mux_enum)
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};
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static const struct snd_kcontrol_new tas2552_input_mux_control =
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SOC_DAPM_ENUM("Route", tas2552_input_mux_enum);
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static const struct snd_soc_dapm_widget tas2552_dapm_widgets[] =
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{
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@@ -96,12 +122,13 @@ static const struct snd_soc_dapm_widget tas2552_dapm_widgets[] =
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/* MUX Controls */
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SND_SOC_DAPM_MUX("Input selection", SND_SOC_NOPM, 0, 0,
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tas2552_input_mux_control),
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&tas2552_input_mux_control),
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SND_SOC_DAPM_AIF_IN("DAC IN", "DAC Playback", 0, SND_SOC_NOPM, 0, 0),
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SND_SOC_DAPM_DAC("DAC", NULL, SND_SOC_NOPM, 0, 0),
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SND_SOC_DAPM_OUT_DRV("ClassD", TAS2552_CFG_2, 7, 0, NULL, 0),
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SND_SOC_DAPM_SUPPLY("PLL", TAS2552_CFG_2, 3, 0, NULL, 0),
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SND_SOC_DAPM_POST("Post Event", tas2552_post_event),
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SND_SOC_DAPM_OUTPUT("OUT")
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};
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@@ -118,15 +145,16 @@ static const struct snd_soc_dapm_route tas2552_audio_map[] = {
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#ifdef CONFIG_PM
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static void tas2552_sw_shutdown(struct tas2552_data *tas_data, int sw_shutdown)
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{
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u8 cfg1_reg;
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u8 cfg1_reg = 0;
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if (!tas_data->codec)
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return;
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if (sw_shutdown)
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cfg1_reg = 0;
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else
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cfg1_reg = TAS2552_SWS_MASK;
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cfg1_reg = TAS2552_SWS;
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snd_soc_update_bits(tas_data->codec, TAS2552_CFG_1,
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TAS2552_SWS_MASK, cfg1_reg);
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snd_soc_update_bits(tas_data->codec, TAS2552_CFG_1, TAS2552_SWS,
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cfg1_reg);
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}
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#endif
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@@ -138,15 +166,92 @@ static int tas2552_hw_params(struct snd_pcm_substream *substream,
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struct tas2552_data *tas2552 = dev_get_drvdata(codec->dev);
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int sample_rate, pll_clk;
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int d;
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int cpf;
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u8 p, j;
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u8 ser_ctrl1_reg, wclk_rate;
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if (!tas2552->mclk)
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switch (params_width(params)) {
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case 16:
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ser_ctrl1_reg = TAS2552_WORDLENGTH_16BIT;
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cpf = 32 + tas2552->tdm_delay;
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break;
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case 20:
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ser_ctrl1_reg = TAS2552_WORDLENGTH_20BIT;
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cpf = 64 + tas2552->tdm_delay;
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break;
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case 24:
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ser_ctrl1_reg = TAS2552_WORDLENGTH_24BIT;
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cpf = 64 + tas2552->tdm_delay;
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break;
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case 32:
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ser_ctrl1_reg = TAS2552_WORDLENGTH_32BIT;
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cpf = 64 + tas2552->tdm_delay;
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break;
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default:
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dev_err(codec->dev, "Not supported sample size: %d\n",
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params_width(params));
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return -EINVAL;
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}
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if (cpf <= 32)
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ser_ctrl1_reg |= TAS2552_CLKSPERFRAME_32;
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else if (cpf <= 64)
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ser_ctrl1_reg |= TAS2552_CLKSPERFRAME_64;
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else if (cpf <= 128)
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ser_ctrl1_reg |= TAS2552_CLKSPERFRAME_128;
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else
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ser_ctrl1_reg |= TAS2552_CLKSPERFRAME_256;
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snd_soc_update_bits(codec, TAS2552_SER_CTRL_1,
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TAS2552_WORDLENGTH_MASK | TAS2552_CLKSPERFRAME_MASK,
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ser_ctrl1_reg);
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switch (params_rate(params)) {
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case 8000:
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wclk_rate = TAS2552_WCLK_FREQ_8KHZ;
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break;
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case 11025:
|
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case 12000:
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wclk_rate = TAS2552_WCLK_FREQ_11_12KHZ;
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break;
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case 16000:
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wclk_rate = TAS2552_WCLK_FREQ_16KHZ;
|
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break;
|
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case 22050:
|
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case 24000:
|
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wclk_rate = TAS2552_WCLK_FREQ_22_24KHZ;
|
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break;
|
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case 32000:
|
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wclk_rate = TAS2552_WCLK_FREQ_32KHZ;
|
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break;
|
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case 44100:
|
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case 48000:
|
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wclk_rate = TAS2552_WCLK_FREQ_44_48KHZ;
|
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break;
|
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case 88200:
|
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case 96000:
|
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wclk_rate = TAS2552_WCLK_FREQ_88_96KHZ;
|
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break;
|
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case 176400:
|
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case 192000:
|
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wclk_rate = TAS2552_WCLK_FREQ_176_192KHZ;
|
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break;
|
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default:
|
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dev_err(codec->dev, "Not supported sample rate: %d\n",
|
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params_rate(params));
|
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return -EINVAL;
|
||||
}
|
||||
|
||||
snd_soc_update_bits(codec, TAS2552_CFG_3, TAS2552_WCLK_FREQ_MASK,
|
||||
wclk_rate);
|
||||
|
||||
if (!tas2552->pll_clkin)
|
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return -EINVAL;
|
||||
|
||||
snd_soc_update_bits(codec, TAS2552_CFG_2, TAS2552_PLL_ENABLE, 0);
|
||||
|
||||
if (tas2552->mclk == TAS2552_245MHZ_CLK ||
|
||||
tas2552->mclk == TAS2552_225MHZ_CLK) {
|
||||
if (tas2552->pll_clkin == TAS2552_245MHZ_CLK ||
|
||||
tas2552->pll_clkin == TAS2552_225MHZ_CLK) {
|
||||
/* By pass the PLL configuration */
|
||||
snd_soc_update_bits(codec, TAS2552_PLL_CTRL_2,
|
||||
TAS2552_PLL_BYPASS_MASK,
|
||||
@@ -170,8 +275,8 @@ static int tas2552_hw_params(struct snd_pcm_substream *substream,
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
j = (pll_clk * 2 * (1 << p)) / tas2552->mclk;
|
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d = (pll_clk * 2 * (1 << p)) % tas2552->mclk;
|
||||
j = (pll_clk * 2 * (1 << p)) / tas2552->pll_clkin;
|
||||
d = (pll_clk * 2 * (1 << p)) % tas2552->pll_clkin;
|
||||
|
||||
snd_soc_update_bits(codec, TAS2552_PLL_CTRL_1,
|
||||
TAS2552_PLL_J_MASK, j);
|
||||
@@ -185,56 +290,74 @@ static int tas2552_hw_params(struct snd_pcm_substream *substream,
|
||||
return 0;
|
||||
}
|
||||
|
||||
#define TAS2552_DAI_FMT_MASK (TAS2552_BCLKDIR | \
|
||||
TAS2552_WCLKDIR | \
|
||||
TAS2552_DATAFORMAT_MASK)
|
||||
static int tas2552_prepare(struct snd_pcm_substream *substream,
|
||||
struct snd_soc_dai *dai)
|
||||
{
|
||||
struct snd_soc_codec *codec = dai->codec;
|
||||
struct tas2552_data *tas2552 = snd_soc_codec_get_drvdata(codec);
|
||||
int delay = 0;
|
||||
|
||||
/* TDM slot selection only valid in DSP_A/_B mode */
|
||||
if (tas2552->dai_fmt == SND_SOC_DAIFMT_DSP_A)
|
||||
delay += (tas2552->tdm_delay + 1);
|
||||
else if (tas2552->dai_fmt == SND_SOC_DAIFMT_DSP_B)
|
||||
delay += tas2552->tdm_delay;
|
||||
|
||||
/* Configure data delay */
|
||||
snd_soc_write(codec, TAS2552_SER_CTRL_2, delay);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int tas2552_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
|
||||
{
|
||||
struct snd_soc_codec *codec = dai->codec;
|
||||
struct tas2552_data *tas2552 = dev_get_drvdata(codec->dev);
|
||||
u8 serial_format;
|
||||
u8 serial_control_mask;
|
||||
|
||||
switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
|
||||
case SND_SOC_DAIFMT_CBS_CFS:
|
||||
serial_format = 0x00;
|
||||
break;
|
||||
case SND_SOC_DAIFMT_CBS_CFM:
|
||||
serial_format = TAS2552_WORD_CLK_MASK;
|
||||
serial_format = TAS2552_WCLKDIR;
|
||||
break;
|
||||
case SND_SOC_DAIFMT_CBM_CFS:
|
||||
serial_format = TAS2552_BIT_CLK_MASK;
|
||||
serial_format = TAS2552_BCLKDIR;
|
||||
break;
|
||||
case SND_SOC_DAIFMT_CBM_CFM:
|
||||
serial_format = (TAS2552_BIT_CLK_MASK | TAS2552_WORD_CLK_MASK);
|
||||
serial_format = (TAS2552_BCLKDIR | TAS2552_WCLKDIR);
|
||||
break;
|
||||
default:
|
||||
dev_vdbg(codec->dev, "DAI Format master is not found\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
serial_control_mask = TAS2552_BIT_CLK_MASK | TAS2552_WORD_CLK_MASK;
|
||||
|
||||
switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
|
||||
case SND_SOC_DAIFMT_I2S:
|
||||
serial_format &= TAS2552_DAIFMT_I2S_MASK;
|
||||
switch (fmt & (SND_SOC_DAIFMT_FORMAT_MASK |
|
||||
SND_SOC_DAIFMT_INV_MASK)) {
|
||||
case (SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF):
|
||||
break;
|
||||
case SND_SOC_DAIFMT_DSP_A:
|
||||
serial_format |= TAS2552_DAIFMT_DSP;
|
||||
case (SND_SOC_DAIFMT_DSP_A | SND_SOC_DAIFMT_IB_NF):
|
||||
case (SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_IB_NF):
|
||||
serial_format |= TAS2552_DATAFORMAT_DSP;
|
||||
break;
|
||||
case SND_SOC_DAIFMT_RIGHT_J:
|
||||
serial_format |= TAS2552_DAIFMT_RIGHT_J;
|
||||
case (SND_SOC_DAIFMT_RIGHT_J | SND_SOC_DAIFMT_NB_NF):
|
||||
serial_format |= TAS2552_DATAFORMAT_RIGHT_J;
|
||||
break;
|
||||
case SND_SOC_DAIFMT_LEFT_J:
|
||||
serial_format |= TAS2552_DAIFMT_LEFT_J;
|
||||
case (SND_SOC_DAIFMT_LEFT_J | SND_SOC_DAIFMT_NB_NF):
|
||||
serial_format |= TAS2552_DATAFORMAT_LEFT_J;
|
||||
break;
|
||||
default:
|
||||
dev_vdbg(codec->dev, "DAI Format is not found\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
tas2552->dai_fmt = fmt & SND_SOC_DAIFMT_FORMAT_MASK;
|
||||
|
||||
if (fmt & SND_SOC_DAIFMT_FORMAT_MASK)
|
||||
serial_control_mask |= TAS2552_DATA_FORMAT_MASK;
|
||||
|
||||
snd_soc_update_bits(codec, TAS2552_SER_CTRL_1, serial_control_mask,
|
||||
serial_format);
|
||||
|
||||
snd_soc_update_bits(codec, TAS2552_SER_CTRL_1, TAS2552_DAI_FMT_MASK,
|
||||
serial_format);
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -243,23 +366,75 @@ static int tas2552_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id,
|
||||
{
|
||||
struct snd_soc_codec *codec = dai->codec;
|
||||
struct tas2552_data *tas2552 = dev_get_drvdata(codec->dev);
|
||||
u8 reg, mask, val;
|
||||
|
||||
tas2552->mclk = freq;
|
||||
switch (clk_id) {
|
||||
case TAS2552_PLL_CLKIN_MCLK:
|
||||
case TAS2552_PLL_CLKIN_BCLK:
|
||||
case TAS2552_PLL_CLKIN_IVCLKIN:
|
||||
case TAS2552_PLL_CLKIN_1_8_FIXED:
|
||||
mask = TAS2552_PLL_SRC_MASK;
|
||||
val = (clk_id << 3) & mask; /* bit 4:5 in the register */
|
||||
reg = TAS2552_CFG_1;
|
||||
tas2552->pll_clkin = freq;
|
||||
break;
|
||||
case TAS2552_PDM_CLK_PLL:
|
||||
case TAS2552_PDM_CLK_IVCLKIN:
|
||||
case TAS2552_PDM_CLK_BCLK:
|
||||
case TAS2552_PDM_CLK_MCLK:
|
||||
mask = TAS2552_PDM_CLK_SEL_MASK;
|
||||
val = (clk_id >> 1) & mask; /* bit 0:1 in the register */
|
||||
reg = TAS2552_PDM_CFG;
|
||||
tas2552->pdm_clk = freq;
|
||||
break;
|
||||
default:
|
||||
dev_err(codec->dev, "Invalid clk id: %d\n", clk_id);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
snd_soc_update_bits(codec, reg, mask, val);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int tas2552_set_dai_tdm_slot(struct snd_soc_dai *dai,
|
||||
unsigned int tx_mask, unsigned int rx_mask,
|
||||
int slots, int slot_width)
|
||||
{
|
||||
struct snd_soc_codec *codec = dai->codec;
|
||||
struct tas2552_data *tas2552 = snd_soc_codec_get_drvdata(codec);
|
||||
unsigned int lsb;
|
||||
|
||||
if (unlikely(!tx_mask)) {
|
||||
dev_err(codec->dev, "tx masks need to be non 0\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
/* TDM based on DSP mode requires slots to be adjacent */
|
||||
lsb = __ffs(tx_mask);
|
||||
if ((lsb + 1) != __fls(tx_mask)) {
|
||||
dev_err(codec->dev, "Invalid mask, slots must be adjacent\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
tas2552->tdm_delay = lsb * slot_width;
|
||||
|
||||
/* DOUT in high-impedance on inactive bit clocks */
|
||||
snd_soc_update_bits(codec, TAS2552_DOUT,
|
||||
TAS2552_SDOUT_TRISTATE, TAS2552_SDOUT_TRISTATE);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int tas2552_mute(struct snd_soc_dai *dai, int mute)
|
||||
{
|
||||
u8 cfg1_reg;
|
||||
u8 cfg1_reg = 0;
|
||||
struct snd_soc_codec *codec = dai->codec;
|
||||
|
||||
if (mute)
|
||||
cfg1_reg = TAS2552_MUTE_MASK;
|
||||
else
|
||||
cfg1_reg = ~TAS2552_MUTE_MASK;
|
||||
cfg1_reg |= TAS2552_MUTE;
|
||||
|
||||
snd_soc_update_bits(codec, TAS2552_CFG_1, TAS2552_MUTE_MASK, cfg1_reg);
|
||||
snd_soc_update_bits(codec, TAS2552_CFG_1, TAS2552_MUTE, cfg1_reg);
|
||||
|
||||
return 0;
|
||||
}
|
||||
@@ -269,7 +444,7 @@ static int tas2552_runtime_suspend(struct device *dev)
|
||||
{
|
||||
struct tas2552_data *tas2552 = dev_get_drvdata(dev);
|
||||
|
||||
tas2552_sw_shutdown(tas2552, 0);
|
||||
tas2552_sw_shutdown(tas2552, 1);
|
||||
|
||||
regcache_cache_only(tas2552->regmap, true);
|
||||
regcache_mark_dirty(tas2552->regmap);
|
||||
@@ -287,7 +462,7 @@ static int tas2552_runtime_resume(struct device *dev)
|
||||
if (tas2552->enable_gpio)
|
||||
gpiod_set_value(tas2552->enable_gpio, 1);
|
||||
|
||||
tas2552_sw_shutdown(tas2552, 1);
|
||||
tas2552_sw_shutdown(tas2552, 0);
|
||||
|
||||
regcache_cache_only(tas2552->regmap, false);
|
||||
regcache_sync(tas2552->regmap);
|
||||
@@ -303,8 +478,10 @@ static const struct dev_pm_ops tas2552_pm = {
|
||||
|
||||
static struct snd_soc_dai_ops tas2552_speaker_dai_ops = {
|
||||
.hw_params = tas2552_hw_params,
|
||||
.prepare = tas2552_prepare,
|
||||
.set_sysclk = tas2552_set_dai_sysclk,
|
||||
.set_fmt = tas2552_set_dai_fmt,
|
||||
.set_tdm_slot = tas2552_set_dai_tdm_slot,
|
||||
.digital_mute = tas2552_mute,
|
||||
};
|
||||
|
||||
@@ -330,16 +507,11 @@ static struct snd_soc_dai_driver tas2552_dai[] = {
|
||||
/*
|
||||
* DAC digital volumes. From -7 to 24 dB in 1 dB steps
|
||||
*/
|
||||
static DECLARE_TLV_DB_SCALE(dac_tlv, -7, 100, 24);
|
||||
static DECLARE_TLV_DB_SCALE(dac_tlv, -7, 100, 0);
|
||||
|
||||
static const struct snd_kcontrol_new tas2552_snd_controls[] = {
|
||||
SOC_SINGLE_TLV("Speaker Driver Playback Volume",
|
||||
TAS2552_PGA_GAIN, 0, 0x1f, 1, dac_tlv),
|
||||
SOC_DAPM_SINGLE("Playback AMP", SND_SOC_NOPM, 0, 1, 0),
|
||||
};
|
||||
|
||||
static const struct reg_default tas2552_init_regs[] = {
|
||||
{ TAS2552_RESERVED_0D, 0xc0 },
|
||||
TAS2552_PGA_GAIN, 0, 0x1f, 0, dac_tlv),
|
||||
};
|
||||
|
||||
static int tas2552_codec_probe(struct snd_soc_codec *codec)
|
||||
@@ -368,31 +540,19 @@ static int tas2552_codec_probe(struct snd_soc_codec *codec)
|
||||
goto probe_fail;
|
||||
}
|
||||
|
||||
snd_soc_write(codec, TAS2552_CFG_1, TAS2552_MUTE_MASK |
|
||||
TAS2552_PLL_SRC_BCLK);
|
||||
snd_soc_update_bits(codec, TAS2552_CFG_1, TAS2552_MUTE, TAS2552_MUTE);
|
||||
snd_soc_write(codec, TAS2552_CFG_3, TAS2552_I2S_OUT_SEL |
|
||||
TAS2552_DIN_SRC_SEL_AVG_L_R | TAS2552_88_96KHZ);
|
||||
TAS2552_DIN_SRC_SEL_AVG_L_R);
|
||||
snd_soc_write(codec, TAS2552_DOUT, TAS2552_PDM_DATA_I);
|
||||
snd_soc_write(codec, TAS2552_OUTPUT_DATA, TAS2552_PDM_DATA_V_I | 0x8);
|
||||
snd_soc_write(codec, TAS2552_PDM_CFG, TAS2552_PDM_BCLK_SEL);
|
||||
snd_soc_write(codec, TAS2552_BOOST_PT_CTRL, TAS2552_APT_DELAY_200 |
|
||||
TAS2552_APT_THRESH_2_1_7);
|
||||
|
||||
ret = regmap_register_patch(tas2552->regmap, tas2552_init_regs,
|
||||
ARRAY_SIZE(tas2552_init_regs));
|
||||
if (ret != 0) {
|
||||
dev_err(codec->dev, "Failed to write init registers: %d\n",
|
||||
ret);
|
||||
goto patch_fail;
|
||||
}
|
||||
|
||||
snd_soc_write(codec, TAS2552_CFG_2, TAS2552_BOOST_EN |
|
||||
TAS2552_APT_EN | TAS2552_LIM_EN);
|
||||
|
||||
return 0;
|
||||
|
||||
patch_fail:
|
||||
pm_runtime_put(codec->dev);
|
||||
probe_fail:
|
||||
if (tas2552->enable_gpio)
|
||||
gpiod_set_value(tas2552->enable_gpio, 0);
|
||||
@@ -454,6 +614,8 @@ static struct snd_soc_codec_driver soc_codec_dev_tas2552 = {
|
||||
.remove = tas2552_codec_remove,
|
||||
.suspend = tas2552_suspend,
|
||||
.resume = tas2552_resume,
|
||||
.ignore_pmdown_time = true,
|
||||
|
||||
.controls = tas2552_snd_controls,
|
||||
.num_controls = ARRAY_SIZE(tas2552_snd_controls),
|
||||
.dapm_widgets = tas2552_dapm_widgets,
|
||||
@@ -486,8 +648,12 @@ static int tas2552_probe(struct i2c_client *client,
|
||||
return -ENOMEM;
|
||||
|
||||
data->enable_gpio = devm_gpiod_get(dev, "enable", GPIOD_OUT_LOW);
|
||||
if (IS_ERR(data->enable_gpio))
|
||||
return PTR_ERR(data->enable_gpio);
|
||||
if (IS_ERR(data->enable_gpio)) {
|
||||
if (PTR_ERR(data->enable_gpio) == -EPROBE_DEFER)
|
||||
return -EPROBE_DEFER;
|
||||
|
||||
data->enable_gpio = NULL;;
|
||||
}
|
||||
|
||||
data->tas2552_client = client;
|
||||
data->regmap = devm_regmap_init_i2c(client, &tas2552_regmap_config);
|
||||
|
||||
+49
-39
@@ -45,10 +45,14 @@
|
||||
#define TAS2552_MAX_REG 0x20
|
||||
|
||||
/* CFG1 Register Masks */
|
||||
#define TAS2552_MUTE_MASK (1 << 2)
|
||||
#define TAS2552_SWS_MASK (1 << 1)
|
||||
#define TAS2552_WCLK_MASK 0x07
|
||||
#define TAS2552_CLASSD_EN_MASK (1 << 7)
|
||||
#define TAS2552_DEV_RESET (1 << 0)
|
||||
#define TAS2552_SWS (1 << 1)
|
||||
#define TAS2552_MUTE (1 << 2)
|
||||
#define TAS2552_PLL_SRC_MCLK (0x0 << 4)
|
||||
#define TAS2552_PLL_SRC_BCLK (0x1 << 4)
|
||||
#define TAS2552_PLL_SRC_IVCLKIN (0x2 << 4)
|
||||
#define TAS2552_PLL_SRC_1_8_FIXED (0x3 << 4)
|
||||
#define TAS2552_PLL_SRC_MASK TAS2552_PLL_SRC_1_8_FIXED
|
||||
|
||||
/* CFG2 Register Masks */
|
||||
#define TAS2552_CLASSD_EN (1 << 7)
|
||||
@@ -59,38 +63,44 @@
|
||||
#define TAS2552_IVSENSE_EN (1 << 1)
|
||||
|
||||
/* CFG3 Register Masks */
|
||||
#define TAS2552_WORD_CLK_MASK (1 << 7)
|
||||
#define TAS2552_BIT_CLK_MASK (1 << 6)
|
||||
#define TAS2552_DATA_FORMAT_MASK (0x11 << 2)
|
||||
|
||||
#define TAS2552_DAIFMT_I2S_MASK 0xf3
|
||||
#define TAS2552_DAIFMT_DSP (1 << 3)
|
||||
#define TAS2552_DAIFMT_RIGHT_J (1 << 4)
|
||||
#define TAS2552_DAIFMT_LEFT_J (0x11 << 3)
|
||||
|
||||
#define TAS2552_PLL_SRC_MCLK 0x00
|
||||
#define TAS2552_PLL_SRC_BCLK (1 << 3)
|
||||
#define TAS2552_PLL_SRC_IVCLKIN (1 << 4)
|
||||
#define TAS2552_PLL_SRC_1_8_FIXED (0x11 << 3)
|
||||
|
||||
#define TAS2552_DIN_SRC_SEL_MUTED 0x00
|
||||
#define TAS2552_DIN_SRC_SEL_LEFT (1 << 4)
|
||||
#define TAS2552_DIN_SRC_SEL_RIGHT (1 << 5)
|
||||
#define TAS2552_DIN_SRC_SEL_AVG_L_R (0x11 << 4)
|
||||
|
||||
#define TAS2552_WCLK_FREQ_8KHZ (0x0 << 0)
|
||||
#define TAS2552_WCLK_FREQ_11_12KHZ (0x1 << 0)
|
||||
#define TAS2552_WCLK_FREQ_16KHZ (0x2 << 0)
|
||||
#define TAS2552_WCLK_FREQ_22_24KHZ (0x3 << 0)
|
||||
#define TAS2552_WCLK_FREQ_32KHZ (0x4 << 0)
|
||||
#define TAS2552_WCLK_FREQ_44_48KHZ (0x5 << 0)
|
||||
#define TAS2552_WCLK_FREQ_88_96KHZ (0x6 << 0)
|
||||
#define TAS2552_WCLK_FREQ_176_192KHZ (0x7 << 0)
|
||||
#define TAS2552_WCLK_FREQ_MASK TAS2552_WCLK_FREQ_176_192KHZ
|
||||
#define TAS2552_DIN_SRC_SEL_MUTED (0x0 << 3)
|
||||
#define TAS2552_DIN_SRC_SEL_LEFT (0x1 << 3)
|
||||
#define TAS2552_DIN_SRC_SEL_RIGHT (0x2 << 3)
|
||||
#define TAS2552_DIN_SRC_SEL_AVG_L_R (0x3 << 3)
|
||||
#define TAS2552_PDM_IN_SEL (1 << 5)
|
||||
#define TAS2552_I2S_OUT_SEL (1 << 6)
|
||||
#define TAS2552_ANALOG_IN_SEL (1 << 7)
|
||||
#define TAS2552_ANALOG_IN_SEL (1 << 7)
|
||||
|
||||
/* CFG3 WCLK Dividers */
|
||||
#define TAS2552_8KHZ 0x00
|
||||
#define TAS2552_11_12KHZ (1 << 1)
|
||||
#define TAS2552_16KHZ (1 << 2)
|
||||
#define TAS2552_22_24KHZ (1 << 3)
|
||||
#define TAS2552_32KHZ (1 << 4)
|
||||
#define TAS2552_44_48KHZ (1 << 5)
|
||||
#define TAS2552_88_96KHZ (1 << 6)
|
||||
#define TAS2552_176_192KHZ (1 << 7)
|
||||
/* DOUT Register Masks */
|
||||
#define TAS2552_SDOUT_TRISTATE (1 << 2)
|
||||
|
||||
/* Serial Interface Control Register Masks */
|
||||
#define TAS2552_WORDLENGTH_16BIT (0x0 << 0)
|
||||
#define TAS2552_WORDLENGTH_20BIT (0x1 << 0)
|
||||
#define TAS2552_WORDLENGTH_24BIT (0x2 << 0)
|
||||
#define TAS2552_WORDLENGTH_32BIT (0x3 << 0)
|
||||
#define TAS2552_WORDLENGTH_MASK TAS2552_WORDLENGTH_32BIT
|
||||
#define TAS2552_DATAFORMAT_I2S (0x0 << 2)
|
||||
#define TAS2552_DATAFORMAT_DSP (0x1 << 2)
|
||||
#define TAS2552_DATAFORMAT_RIGHT_J (0x2 << 2)
|
||||
#define TAS2552_DATAFORMAT_LEFT_J (0x3 << 2)
|
||||
#define TAS2552_DATAFORMAT_MASK TAS2552_DATAFORMAT_LEFT_J
|
||||
#define TAS2552_CLKSPERFRAME_32 (0x0 << 4)
|
||||
#define TAS2552_CLKSPERFRAME_64 (0x1 << 4)
|
||||
#define TAS2552_CLKSPERFRAME_128 (0x2 << 4)
|
||||
#define TAS2552_CLKSPERFRAME_256 (0x3 << 4)
|
||||
#define TAS2552_CLKSPERFRAME_MASK TAS2552_CLKSPERFRAME_256
|
||||
#define TAS2552_BCLKDIR (1 << 6)
|
||||
#define TAS2552_WCLKDIR (1 << 7)
|
||||
|
||||
/* OUTPUT_DATA register */
|
||||
#define TAS2552_PDM_DATA_I 0x00
|
||||
@@ -99,12 +109,12 @@
|
||||
#define TAS2552_PDM_DATA_V_I (0x11 << 6)
|
||||
|
||||
/* PDM CFG Register */
|
||||
#define TAS2552_PDM_DATA_ES_RISE 0x4
|
||||
|
||||
#define TAS2552_PDM_PLL_CLK_SEL 0x00
|
||||
#define TAS2552_PDM_IV_CLK_SEL (1 << 1)
|
||||
#define TAS2552_PDM_BCLK_SEL (1 << 2)
|
||||
#define TAS2552_PDM_MCLK_SEL (1 << 3)
|
||||
#define TAS2552_PDM_CLK_SEL_PLL (0x0 << 0)
|
||||
#define TAS2552_PDM_CLK_SEL_IVCLKIN (0x1 << 0)
|
||||
#define TAS2552_PDM_CLK_SEL_BCLK (0x2 << 0)
|
||||
#define TAS2552_PDM_CLK_SEL_MCLK (0x3 << 0)
|
||||
#define TAS2552_PDM_CLK_SEL_MASK TAS2552_PDM_CLK_SEL_MCLK
|
||||
#define TAS2552_PDM_DATA_ES (1 << 2)
|
||||
|
||||
/* Boost pass-through register */
|
||||
#define TAS2552_APT_DELAY_50 0x00
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,33 @@
|
||||
/*
|
||||
* TAS571x amplifier audio driver
|
||||
*
|
||||
* Copyright (C) 2015 Google, Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*/
|
||||
|
||||
#ifndef _TAS571X_H
|
||||
#define _TAS571X_H
|
||||
|
||||
/* device registers */
|
||||
#define TAS571X_SDI_REG 0x04
|
||||
#define TAS571X_SDI_FMT_MASK 0x0f
|
||||
|
||||
#define TAS571X_SYS_CTRL_2_REG 0x05
|
||||
#define TAS571X_SYS_CTRL_2_SDN_MASK 0x40
|
||||
|
||||
#define TAS571X_SOFT_MUTE_REG 0x06
|
||||
#define TAS571X_SOFT_MUTE_CH1_SHIFT 0
|
||||
#define TAS571X_SOFT_MUTE_CH2_SHIFT 1
|
||||
#define TAS571X_SOFT_MUTE_CH3_SHIFT 2
|
||||
|
||||
#define TAS571X_MVOL_REG 0x07
|
||||
#define TAS571X_CH1_VOL_REG 0x08
|
||||
#define TAS571X_CH2_VOL_REG 0x09
|
||||
|
||||
#define TAS571X_OSC_TRIM_REG 0x1b
|
||||
|
||||
#endif /* _TAS571X_H */
|
||||
@@ -254,12 +254,13 @@ static const struct regmap_config ts3a227e_regmap_config = {
|
||||
.num_reg_defaults = ARRAY_SIZE(ts3a227e_reg_defaults),
|
||||
};
|
||||
|
||||
static int ts3a227e_parse_dt(struct ts3a227e *ts3a227e, struct device_node *np)
|
||||
static int ts3a227e_parse_device_property(struct ts3a227e *ts3a227e,
|
||||
struct device *dev)
|
||||
{
|
||||
u32 micbias;
|
||||
int err;
|
||||
|
||||
err = of_property_read_u32(np, "ti,micbias", &micbias);
|
||||
err = device_property_read_u32(dev, "ti,micbias", &micbias);
|
||||
if (!err) {
|
||||
regmap_update_bits(ts3a227e->regmap, TS3A227E_REG_SETTING_3,
|
||||
MICBIAS_SETTING_MASK,
|
||||
@@ -287,12 +288,10 @@ static int ts3a227e_i2c_probe(struct i2c_client *i2c,
|
||||
if (IS_ERR(ts3a227e->regmap))
|
||||
return PTR_ERR(ts3a227e->regmap);
|
||||
|
||||
if (dev->of_node) {
|
||||
ret = ts3a227e_parse_dt(ts3a227e, dev->of_node);
|
||||
if (ret) {
|
||||
dev_err(dev, "Failed to parse device tree: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
ret = ts3a227e_parse_device_property(ts3a227e, dev);
|
||||
if (ret) {
|
||||
dev_err(dev, "Failed to parse device property: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = devm_request_threaded_irq(dev, i2c->irq, NULL, ts3a227e_interrupt,
|
||||
|
||||
Reference in New Issue
Block a user