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Merge remote-tracking branches 'asoc/topic/cs42l42', 'asoc/topic/cs42l56', 'asoc/topic/cs42l73' and 'asoc/topic/cs42xx8' into asoc-next

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This commit is contained in:
Mark Brown
2016-12-12 15:52:54 +00:00
parent cc9624790d 45ee1d8555 8c317fafdd ca493dabbc 03d2ec460f
commit b177e7a5ae
9 changed files with 2960 additions and 24 deletions
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Documentation/devicetree/bindings/sound/cs42l42.txt
+110
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@@ -0,0 +1,110 @@
CS42L42 audio CODEC
Required properties:
- compatible : "cirrus,cs42l42"
- reg : the I2C address of the device for I2C.
- VP-supply, VCP-supply, VD_FILT-supply, VL-supply, VA-supply :
power supplies for the device, as covered in
Documentation/devicetree/bindings/regulator/regulator.txt.
Optional properties:
- reset-gpios : a GPIO spec for the reset pin. If specified, it will be
deasserted before communication to the codec starts.
- interrupt-parent : Specifies the phandle of the interrupt controller to
which the IRQs from CS42L42 are delivered to.
- interrupts : IRQ line info CS42L42.
(See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
for further information relating to interrupt properties)
- cirrus,ts-inv : Boolean property. For jacks that invert the tip sense
polarity. Normal jacks will short tip sense pin to HS1 when headphones are
plugged in and leave tip sense floating when not plugged in. Inverting jacks
short tip sense when unplugged and float when plugged in.
0 = (Default) Non-inverted
1 = Inverted
- cirrus,ts-dbnc-rise : Debounce the rising edge of TIP_SENSE_PLUG. With no
debounce, the tip sense pin might be noisy on a plug event.
0 - 0ms,
1 - 125ms,
2 - 250ms,
3 - 500ms,
4 - 750ms,
5 - (Default) 1s,
6 - 1.25s,
7 - 1.5s,
- cirrus,ts-dbnc-fall : Debounce the falling edge of TIP_SENSE_UNPLUG.
With no debounce, the tip sense pin might be noisy on an unplug event.
0 - 0ms,
1 - 125ms,
2 - 250ms,
3 - 500ms,
4 - 750ms,
5 - (Default) 1s,
6 - 1.25s,
7 - 1.5s,
- cirrus,btn-det-init-dbnce : This sets how long the driver sleeps after
enabling button detection interrupts. After auto-detection and before
servicing button interrupts, the HS bias needs time to settle. If you
don't wait, there is possibility for erroneous button interrupt.
0ms - 200ms,
Default = 100ms
- cirrus,btn-det-event-dbnce : This sets how long the driver delays after
receiving a button press interrupt. With level detect interrupts, you want
to wait a small amount of time to make sure the button press is making a
clean connection with the bias resistors.
0ms - 20ms,
Default = 10ms
- cirrus,bias-lvls : For a level-detect headset button scheme, each button
will bias the mic pin to a certain voltage. To determine which button was
pressed, the driver will compare this biased voltage to sequential,
decreasing voltages and will stop when a comparator is tripped,
indicating a comparator voltage < bias voltage. This value represents a
percentage of the internally generated HS bias voltage. For different
hardware setups, a designer might want to tweak this. This is an array of
descending values for the comparator voltage.
Array of 4 values
Each 0-63
< x1 x2 x3 x4 >
Default = < 15 8 4 1>
Example:
cs42l42: cs42l42@48 {
compatible = "cirrus,cs42l42";
reg = <0x48>;
VA-supply = <&dummy_vreg>;
VP-supply = <&dummy_vreg>;
VCP-supply = <&dummy_vreg>;
VD_FILT-supply = <&dummy_vreg>;
VL-supply = <&dummy_vreg>;
reset-gpios = <&axi_gpio_0 1 0>;
interrupt-parent = <&gpio0>;
interrupts = <55 8>
cirrus,ts-inv = <0x00>;
cirrus,ts-dbnc-rise = <0x05>;
cirrus,ts-dbnc-fall = <0x00>;
cirrus,btn-det-init-dbnce = <100>;
cirrus,btn-det-event-dbnce = <10>;
cirrus,bias-lvls = <0x0F 0x08 0x04 0x01>;
cirrus,hs-bias-ramp-rate = <0x02>;
};
include/dt-bindings/sound/cs42l42.h
+73
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@@ -0,0 +1,73 @@
/*
* cs42l42.h -- CS42L42 ALSA SoC audio driver DT bindings header
*
* Copyright 2016 Cirrus Logic, Inc.
*
* Author: James Schulman <james.schulman@cirrus.com>
* Author: Brian Austin <brian.austin@cirrus.com>
* Author: Michael White <michael.white@cirrus.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
#ifndef __DT_CS42L42_H
#define __DT_CS42L42_H
/* HPOUT Load Capacity */
#define CS42L42_HPOUT_LOAD_1NF 0
#define CS42L42_HPOUT_LOAD_10NF 1
/* HPOUT Clamp to GND Overide */
#define CS42L42_HPOUT_CLAMP_EN 0
#define CS42L42_HPOUT_CLAMP_DIS 1
/* Tip Sense Inversion */
#define CS42L42_TS_INV_DIS 0
#define CS42L42_TS_INV_EN 1
/* Tip Sense Debounce */
#define CS42L42_TS_DBNCE_0 0
#define CS42L42_TS_DBNCE_125 1
#define CS42L42_TS_DBNCE_250 2
#define CS42L42_TS_DBNCE_500 3
#define CS42L42_TS_DBNCE_750 4
#define CS42L42_TS_DBNCE_1000 5
#define CS42L42_TS_DBNCE_1250 6
#define CS42L42_TS_DBNCE_1500 7
/* Button Press Software Debounce Times */
#define CS42L42_BTN_DET_INIT_DBNCE_MIN 0
#define CS42L42_BTN_DET_INIT_DBNCE_DEFAULT 100
#define CS42L42_BTN_DET_INIT_DBNCE_MAX 200
#define CS42L42_BTN_DET_EVENT_DBNCE_MIN 0
#define CS42L42_BTN_DET_EVENT_DBNCE_DEFAULT 10
#define CS42L42_BTN_DET_EVENT_DBNCE_MAX 20
/* Button Detect Level Sensitivities */
#define CS42L42_NUM_BIASES 4
#define CS42L42_HS_DET_LEVEL_15 0x0F
#define CS42L42_HS_DET_LEVEL_8 0x08
#define CS42L42_HS_DET_LEVEL_4 0x04
#define CS42L42_HS_DET_LEVEL_1 0x01
#define CS42L42_HS_DET_LEVEL_MIN 0
#define CS42L42_HS_DET_LEVEL_MAX 0x3F
/* HS Bias Ramp Rate */
#define CS42L42_HSBIAS_RAMP_FAST_RISE_SLOW_FALL 0
#define CS42L42_HSBIAS_RAMP_FAST 1
#define CS42L42_HSBIAS_RAMP_SLOW 2
#define CS42L42_HSBIAS_RAMP_SLOWEST 3
#define CS42L42_HSBIAS_RAMP_TIME0 10
#define CS42L42_HSBIAS_RAMP_TIME1 40
#define CS42L42_HSBIAS_RAMP_TIME2 90
#define CS42L42_HSBIAS_RAMP_TIME3 170
#endif /* __DT_CS42L42_H */
sound/soc/codecs/Kconfig
+5
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@@ -49,6 +49,7 @@ config SND_SOC_ALL_CODECS
select SND_SOC_CS35L32 if I2C
select SND_SOC_CS35L33 if I2C
select SND_SOC_CS35L34 if I2C
select SND_SOC_CS42L42 if I2C
select SND_SOC_CS42L51_I2C if I2C
select SND_SOC_CS42L52 if I2C && INPUT
select SND_SOC_CS42L56 if I2C && INPUT
@@ -404,6 +405,10 @@ config SND_SOC_CS35L34
tristate "Cirrus Logic CS35L34 CODEC"
depends on I2C
config SND_SOC_CS42L42
tristate "Cirrus Logic CS42L42 CODEC"
depends on I2C
config SND_SOC_CS42L51
tristate
sound/soc/codecs/Makefile
+2
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@@ -39,6 +39,7 @@ snd-soc-cq93vc-objs := cq93vc.o
snd-soc-cs35l32-objs := cs35l32.o
snd-soc-cs35l33-objs := cs35l33.o
snd-soc-cs35l34-objs := cs35l34.o
snd-soc-cs42l42-objs := cs42l42.o
snd-soc-cs42l51-objs := cs42l51.o
snd-soc-cs42l51-i2c-objs := cs42l51-i2c.o
snd-soc-cs42l52-objs := cs42l52.o
@@ -265,6 +266,7 @@ obj-$(CONFIG_SND_SOC_CQ0093VC) += snd-soc-cq93vc.o
obj-$(CONFIG_SND_SOC_CS35L32) += snd-soc-cs35l32.o
obj-$(CONFIG_SND_SOC_CS35L33) += snd-soc-cs35l33.o
obj-$(CONFIG_SND_SOC_CS35L34) += snd-soc-cs35l34.o
obj-$(CONFIG_SND_SOC_CS42L42) += snd-soc-cs42l42.o
obj-$(CONFIG_SND_SOC_CS42L51) += snd-soc-cs42l51.o
obj-$(CONFIG_SND_SOC_CS42L51_I2C) += snd-soc-cs42l51-i2c.o
obj-$(CONFIG_SND_SOC_CS42L52) += snd-soc-cs42l52.o
sound/soc/codecs/cs42l42.c
+1986
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File diff suppressed because it is too large Load Diff
sound/soc/codecs/cs42l42.h
+776
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File diff suppressed because it is too large Load Diff
sound/soc/codecs/cs42l56.c
+8 -10
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@@ -64,8 +64,6 @@ struct cs42l56_private {
};
static const struct reg_default cs42l56_reg_defaults[] = {
{ 1, 0x56 }, /* r01 - ID 1 */
{ 2, 0x04 }, /* r02 - ID 2 */
{ 3, 0x7f }, /* r03 - Power Ctl 1 */
{ 4, 0xff }, /* r04 - Power Ctl 2 */
{ 5, 0x00 }, /* ro5 - Clocking Ctl 1 */
@@ -1262,8 +1260,6 @@ static int cs42l56_i2c_probe(struct i2c_client *i2c_client,
return ret;
}
regcache_cache_bypass(cs42l56->regmap, true);
ret = regmap_read(cs42l56->regmap, CS42L56_CHIP_ID_1, &reg);
devid = reg & CS42L56_CHIP_ID_MASK;
if (devid != CS42L56_DEVID) {
@@ -1279,23 +1275,25 @@ static int cs42l56_i2c_probe(struct i2c_client *i2c_client,
dev_info(&i2c_client->dev, "Alpha Rev %X Metal Rev %X\n",
alpha_rev, metal_rev);
regcache_cache_bypass(cs42l56->regmap, false);
if (cs42l56->pdata.ain1a_ref_cfg)
regmap_update_bits(cs42l56->regmap, CS42L56_AIN_REFCFG_ADC_MUX,
CS42L56_AIN1A_REF_MASK, 1);
CS42L56_AIN1A_REF_MASK,
CS42L56_AIN1A_REF_MASK);
if (cs42l56->pdata.ain1b_ref_cfg)
regmap_update_bits(cs42l56->regmap, CS42L56_AIN_REFCFG_ADC_MUX,
CS42L56_AIN1B_REF_MASK, 1);
CS42L56_AIN1B_REF_MASK,
CS42L56_AIN1B_REF_MASK);
if (cs42l56->pdata.ain2a_ref_cfg)
regmap_update_bits(cs42l56->regmap, CS42L56_AIN_REFCFG_ADC_MUX,
CS42L56_AIN2A_REF_MASK, 1);
CS42L56_AIN2A_REF_MASK,
CS42L56_AIN2A_REF_MASK);
if (cs42l56->pdata.ain2b_ref_cfg)
regmap_update_bits(cs42l56->regmap, CS42L56_AIN_REFCFG_ADC_MUX,
CS42L56_AIN2B_REF_MASK, 1);
CS42L56_AIN2B_REF_MASK,
CS42L56_AIN2B_REF_MASK);
if (cs42l56->pdata.micbias_lvl)
regmap_update_bits(cs42l56->regmap, CS42L56_GAIN_BIAS_CTL,
sound/soc/codecs/cs42l73.c
-4
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@@ -1337,8 +1337,6 @@ static int cs42l73_i2c_probe(struct i2c_client *i2c_client,
gpio_set_value_cansleep(cs42l73->pdata.reset_gpio, 1);
}
regcache_cache_bypass(cs42l73->regmap, true);
/* initialize codec */
ret = regmap_read(cs42l73->regmap, CS42L73_DEVID_AB, &reg);
devid = (reg & 0xFF) << 12;
@@ -1366,8 +1364,6 @@ static int cs42l73_i2c_probe(struct i2c_client *i2c_client,
dev_info(&i2c_client->dev,
"Cirrus Logic CS42L73, Revision: %02X\n", reg & 0xFF);
regcache_cache_bypass(cs42l73->regmap, false);
ret = snd_soc_register_codec(&i2c_client->dev,
&soc_codec_dev_cs42l73, cs42l73_dai,
ARRAY_SIZE(cs42l73_dai));
sound/soc/codecs/cs42xx8.c
-10
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@@ -321,7 +321,6 @@ static struct snd_soc_dai_driver cs42xx8_dai = {
};
static const struct reg_default cs42xx8_reg[] = {
{ 0x01, 0x01 }, /* Chip I.D. and Revision Register */
{ 0x02, 0x00 }, /* Power Control */
{ 0x03, 0xF0 }, /* Functional Mode */
{ 0x04, 0x46 }, /* Interface Formats */
@@ -498,13 +497,6 @@ int cs42xx8_probe(struct device *dev, struct regmap *regmap)
/* Make sure hardware reset done */
msleep(5);
/*
* We haven't marked the chip revision as volatile due to
* sharing a register with the right input volume; explicitly
* bypass the cache to read it.
*/
regcache_cache_bypass(cs42xx8->regmap, true);
/* Validate the chip ID */
ret = regmap_read(cs42xx8->regmap, CS42XX8_CHIPID, &val);
if (ret < 0) {
@@ -523,8 +515,6 @@ int cs42xx8_probe(struct device *dev, struct regmap *regmap)
dev_info(dev, "found device, revision %X\n",
val & CS42XX8_CHIPID_REV_ID_MASK);
regcache_cache_bypass(cs42xx8->regmap, false);
cs42xx8_dai.name = cs42xx8->drvdata->name;
/* Each adc supports stereo input */