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Merge tag 'spi-v3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi
Pull spi updates from Mark Brown:
"The major highlight this release is a refactoring of the core to allow
us to run synchronous transfers in the context of the caller when
there is no contention for the bus. This improves performance in the
very common case by eliminating context switches and reducing the
number of hardware setup and teardown operations we need to perform.
Other changes:
- New drivers for DLN-2 USB-SPI adapter and ST SPI controllers.
- A big round of cleanups, performance and feature improvements for
the xilinx driver from Ricardo Ribalda Delgado.
- A wide range of smaller cleanups, fixes and feature improvements
throughout the subsystem"
* tag 'spi-v3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (68 commits)
spi: mxs: cleanup wait_for_completion return handling
spi: ti-qspi: cleanup wait_for_completion return handling
spi: spi-imx: cleanup wait_for_completion handling
spi: sh-msiof: cleanup wait_for_completion return handling
spi: match var type to return type of wait_for_completion
spi: spi-pxa2xx: only include mach/dma.h for legacy DMA
spi: atmel: cleanup wait_for_completion return handling
spi: fsl-dspi: Remove possible memory leak of 'chip'
spi: sh-msiof: Update calculation of frequency dividing
spi: spidev: Convert buf pointers for 32-bit compat SPI_IOC_MESSAGE(n)
spi/xilinx: Fix access invalid memory on xilinx_spi_tx
spi: Revert "spi/xilinx: Remove iowrite/ioread wrappers"
spi/xilinx: Check number of slaves range
spi/xilinx: Use polling mode on small transfers
spi/xilinx: Remove remaining_words driver data variable
spi/xilinx: Remove iowrite/ioread wrappers
spi/xilinx: Convert bits_per_word in bytes_per_word
spi/xilinx: Convert remainding_bytes in remaining words
spi/xilinx: Make spi_tx and spi_rx simmetric
spi/xilinx: Remove rx_fn and tx_fn pointer
...
This commit is contained in:
@@ -30,6 +30,22 @@ Optional properties:
|
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specifiers, one for transmission, and one for
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reception.
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- dma-names : Must contain a list of two DMA names, "tx" and "rx".
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- renesas,dtdl : delay sync signal (setup) in transmit mode.
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Must contain one of the following values:
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0 (no bit delay)
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50 (0.5-clock-cycle delay)
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100 (1-clock-cycle delay)
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150 (1.5-clock-cycle delay)
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200 (2-clock-cycle delay)
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- renesas,syncdl : delay sync signal (hold) in transmit mode.
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Must contain one of the following values:
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0 (no bit delay)
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50 (0.5-clock-cycle delay)
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100 (1-clock-cycle delay)
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150 (1.5-clock-cycle delay)
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200 (2-clock-cycle delay)
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300 (3-clock-cycle delay)
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Optional properties, deprecated for soctype-specific bindings:
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- renesas,tx-fifo-size : Overrides the default tx fifo size given in words
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@@ -0,0 +1,41 @@
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* CSR SiRFprimaII Serial Peripheral Interface
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Required properties:
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- compatible : Should be "sirf,prima2-spi"
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- reg : Offset and length of the register set for the device
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- interrupts : Should contain SPI interrupt
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- resets: phandle to the reset controller asserting this device in
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reset
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See ../reset/reset.txt for details.
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- dmas : Must contain an entry for each entry in clock-names.
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See ../dma/dma.txt for details.
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- dma-names : Must include the following entries:
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- rx
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- tx
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- clocks : Must contain an entry for each entry in clock-names.
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See ../clocks/clock-bindings.txt for details.
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- #address-cells: Number of cells required to define a chip select
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address on the SPI bus. Should be set to 1.
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- #size-cells: Should be zero.
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Optional properties:
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- spi-max-frequency: Specifies maximum SPI clock frequency,
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Units - Hz. Definition as per
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Documentation/devicetree/bindings/spi/spi-bus.txt
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- cs-gpios: should specify GPIOs used for chipselects.
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Example:
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spi0: spi@b00d0000 {
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compatible = "sirf,prima2-spi";
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reg = <0xb00d0000 0x10000>;
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interrupts = <15>;
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dmas = <&dmac1 9>,
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<&dmac1 4>;
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dma-names = "rx", "tx";
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&clks 19>;
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resets = <&rstc 26>;
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};
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@@ -0,0 +1,40 @@
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STMicroelectronics SSC (SPI) Controller
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---------------------------------------
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Required properties:
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- compatible : "st,comms-ssc4-spi"
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- reg : Offset and length of the device's register set
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- interrupts : The interrupt specifier
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- clock-names : Must contain "ssc"
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- clocks : Must contain an entry for each name in clock-names
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See ../clk/*
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- pinctrl-names : Uses "default", can use "sleep" if provided
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See ../pinctrl/pinctrl-binding.txt
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Optional properties:
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- cs-gpios : List of GPIO chip selects
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See ../spi/spi-bus.txt
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Child nodes represent devices on the SPI bus
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See ../spi/spi-bus.txt
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Example:
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spi@9840000 {
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compatible = "st,comms-ssc4-spi";
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reg = <0x9840000 0x110>;
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interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
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clock-names = "ssc";
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pinctrl-0 = <&pinctrl_spi0_default>;
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pinctrl-names = "default";
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cs-gpios = <&pio17 5 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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st95hf@0{
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compatible = "st,st95hf";
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reg = <0>;
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spi-max-frequency = <1000000>;
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interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
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};
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};
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@@ -293,7 +293,6 @@ static void mrst_power_off_unused_dev(struct pci_dev *dev)
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0801, mrst_power_off_unused_dev);
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0809, mrst_power_off_unused_dev);
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x080C, mrst_power_off_unused_dev);
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0812, mrst_power_off_unused_dev);
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0815, mrst_power_off_unused_dev);
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/*
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+19
-5
@@ -185,6 +185,16 @@ config SPI_DAVINCI
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help
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SPI master controller for DaVinci/DA8x/OMAP-L/AM1x SPI modules.
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config SPI_DLN2
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tristate "Diolan DLN-2 USB SPI adapter"
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depends on MFD_DLN2
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help
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If you say yes to this option, support will be included for Diolan
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DLN2, a USB to SPI interface.
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This driver can also be built as a module. If so, the module
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will be called spi-dln2.
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config SPI_EFM32
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tristate "EFM32 SPI controller"
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depends on OF && ARM && (ARCH_EFM32 || COMPILE_TEST)
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@@ -279,7 +289,7 @@ config SPI_FSL_CPM
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depends on FSL_SOC
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config SPI_FSL_SPI
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bool "Freescale SPI controller and Aeroflex Gaisler GRLIB SPI controller"
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tristate "Freescale SPI controller and Aeroflex Gaisler GRLIB SPI controller"
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depends on OF
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select SPI_FSL_LIB
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select SPI_FSL_CPM if FSL_SOC
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@@ -292,7 +302,6 @@ config SPI_FSL_SPI
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config SPI_FSL_DSPI
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tristate "Freescale DSPI controller"
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select SPI_BITBANG
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select REGMAP_MMIO
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depends on SOC_VF610 || COMPILE_TEST
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help
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@@ -300,7 +309,7 @@ config SPI_FSL_DSPI
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mode. VF610 platform uses the controller.
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config SPI_FSL_ESPI
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bool "Freescale eSPI controller"
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tristate "Freescale eSPI controller"
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depends on FSL_SOC
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select SPI_FSL_LIB
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help
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@@ -460,7 +469,6 @@ config SPI_S3C24XX_FIQ
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config SPI_S3C64XX
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tristate "Samsung S3C64XX series type SPI"
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depends on (PLAT_SAMSUNG || ARCH_EXYNOS)
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select S3C64XX_PL080 if ARCH_S3C64XX
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help
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SPI driver for Samsung S3C64XX and newer SoCs.
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@@ -503,6 +511,13 @@ config SPI_SIRF
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help
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SPI driver for CSR SiRFprimaII SoCs
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config SPI_ST_SSC4
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tristate "STMicroelectronics SPI SSC-based driver"
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depends on ARCH_STI
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help
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STMicroelectronics SoCs support for SPI. If you say yes to
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this option, support will be included for the SSC driven SPI.
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config SPI_SUN4I
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tristate "Allwinner A10 SoCs SPI controller"
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depends on ARCH_SUNXI || COMPILE_TEST
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@@ -595,7 +610,6 @@ config SPI_XTENSA_XTFPGA
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16 bit words in SPI mode 0, automatically asserting CS on transfer
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start and deasserting on end.
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config SPI_NUC900
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tristate "Nuvoton NUC900 series SPI"
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depends on ARCH_W90X900
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@@ -27,6 +27,7 @@ obj-$(CONFIG_SPI_CADENCE) += spi-cadence.o
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obj-$(CONFIG_SPI_CLPS711X) += spi-clps711x.o
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obj-$(CONFIG_SPI_COLDFIRE_QSPI) += spi-coldfire-qspi.o
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obj-$(CONFIG_SPI_DAVINCI) += spi-davinci.o
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obj-$(CONFIG_SPI_DLN2) += spi-dln2.o
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obj-$(CONFIG_SPI_DESIGNWARE) += spi-dw.o
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obj-$(CONFIG_SPI_DW_MMIO) += spi-dw-mmio.o
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obj-$(CONFIG_SPI_DW_PCI) += spi-dw-midpci.o
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@@ -76,6 +77,7 @@ obj-$(CONFIG_SPI_SH_HSPI) += spi-sh-hspi.o
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obj-$(CONFIG_SPI_SH_MSIOF) += spi-sh-msiof.o
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obj-$(CONFIG_SPI_SH_SCI) += spi-sh-sci.o
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obj-$(CONFIG_SPI_SIRF) += spi-sirf.o
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obj-$(CONFIG_SPI_ST_SSC4) += spi-st-ssc4.o
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obj-$(CONFIG_SPI_SUN4I) += spi-sun4i.o
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obj-$(CONFIG_SPI_SUN6I) += spi-sun6i.o
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obj-$(CONFIG_SPI_TEGRA114) += spi-tegra114.o
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@@ -1046,6 +1046,7 @@ static int atmel_spi_one_transfer(struct spi_master *master,
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struct atmel_spi_device *asd;
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int timeout;
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int ret;
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unsigned long dma_timeout;
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as = spi_master_get_devdata(master);
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@@ -1103,15 +1104,12 @@ static int atmel_spi_one_transfer(struct spi_master *master,
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/* interrupts are disabled, so free the lock for schedule */
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atmel_spi_unlock(as);
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ret = wait_for_completion_timeout(&as->xfer_completion,
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SPI_DMA_TIMEOUT);
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dma_timeout = wait_for_completion_timeout(&as->xfer_completion,
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SPI_DMA_TIMEOUT);
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atmel_spi_lock(as);
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if (WARN_ON(ret == 0)) {
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dev_err(&spi->dev,
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"spi trasfer timeout, err %d\n", ret);
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if (WARN_ON(dma_timeout == 0)) {
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dev_err(&spi->dev, "spi transfer timeout\n");
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as->done_status = -EIO;
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} else {
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ret = 0;
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}
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if (as->done_status)
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@@ -15,10 +15,6 @@
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
|
||||
@@ -17,10 +17,6 @@
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
|
||||
*/
|
||||
|
||||
#include <linux/clk.h>
|
||||
|
||||
@@ -13,10 +13,6 @@
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the
|
||||
* Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
|
||||
@@ -10,10 +10,6 @@
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <linux/spinlock.h>
|
||||
|
||||
@@ -12,10 +12,6 @@
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
|
||||
@@ -12,11 +12,6 @@
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA
|
||||
*
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
|
||||
@@ -11,10 +11,6 @@
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <linux/interrupt.h>
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -247,9 +247,9 @@ static struct dw_spi_dma_ops mid_dma_ops = {
|
||||
|
||||
/* Some specific info for SPI0 controller on Intel MID */
|
||||
|
||||
/* HW info for MRST CLk Control Unit, one 32b reg */
|
||||
/* HW info for MRST Clk Control Unit, 32b reg per controller */
|
||||
#define MRST_SPI_CLK_BASE 100000000 /* 100m */
|
||||
#define MRST_CLK_SPI0_REG 0xff11d86c
|
||||
#define MRST_CLK_SPI_REG 0xff11d86c
|
||||
#define CLK_SPI_BDIV_OFFSET 0
|
||||
#define CLK_SPI_BDIV_MASK 0x00000007
|
||||
#define CLK_SPI_CDIV_OFFSET 9
|
||||
@@ -261,16 +261,17 @@ int dw_spi_mid_init(struct dw_spi *dws)
|
||||
void __iomem *clk_reg;
|
||||
u32 clk_cdiv;
|
||||
|
||||
clk_reg = ioremap_nocache(MRST_CLK_SPI0_REG, 16);
|
||||
clk_reg = ioremap_nocache(MRST_CLK_SPI_REG, 16);
|
||||
if (!clk_reg)
|
||||
return -ENOMEM;
|
||||
|
||||
/* get SPI controller operating freq info */
|
||||
clk_cdiv = (readl(clk_reg) & CLK_SPI_CDIV_MASK) >> CLK_SPI_CDIV_OFFSET;
|
||||
/* Get SPI controller operating freq info */
|
||||
clk_cdiv = readl(clk_reg + dws->bus_num * sizeof(u32));
|
||||
clk_cdiv &= CLK_SPI_CDIV_MASK;
|
||||
clk_cdiv >>= CLK_SPI_CDIV_OFFSET;
|
||||
dws->max_freq = MRST_SPI_CLK_BASE / (clk_cdiv + 1);
|
||||
iounmap(clk_reg);
|
||||
|
||||
dws->num_cs = 16;
|
||||
iounmap(clk_reg);
|
||||
|
||||
#ifdef CONFIG_SPI_DW_MID_DMA
|
||||
dws->dma_priv = kzalloc(sizeof(struct mid_dma), GFP_KERNEL);
|
||||
|
||||
@@ -30,10 +30,20 @@ struct dw_spi_pci {
|
||||
|
||||
struct spi_pci_desc {
|
||||
int (*setup)(struct dw_spi *);
|
||||
u16 num_cs;
|
||||
u16 bus_num;
|
||||
};
|
||||
|
||||
static struct spi_pci_desc spi_pci_mid_desc = {
|
||||
static struct spi_pci_desc spi_pci_mid_desc_1 = {
|
||||
.setup = dw_spi_mid_init,
|
||||
.num_cs = 32,
|
||||
.bus_num = 0,
|
||||
};
|
||||
|
||||
static struct spi_pci_desc spi_pci_mid_desc_2 = {
|
||||
.setup = dw_spi_mid_init,
|
||||
.num_cs = 4,
|
||||
.bus_num = 1,
|
||||
};
|
||||
|
||||
static int spi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
|
||||
@@ -65,18 +75,23 @@ static int spi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
|
||||
|
||||
dws->regs = pcim_iomap_table(pdev)[pci_bar];
|
||||
|
||||
dws->bus_num = 0;
|
||||
dws->num_cs = 4;
|
||||
dws->irq = pdev->irq;
|
||||
|
||||
/*
|
||||
* Specific handling for paltforms, like dma setup,
|
||||
* clock rate, FIFO depth.
|
||||
*/
|
||||
if (desc && desc->setup) {
|
||||
ret = desc->setup(dws);
|
||||
if (ret)
|
||||
return ret;
|
||||
if (desc) {
|
||||
dws->num_cs = desc->num_cs;
|
||||
dws->bus_num = desc->bus_num;
|
||||
|
||||
if (desc->setup) {
|
||||
ret = desc->setup(dws);
|
||||
if (ret)
|
||||
return ret;
|
||||
}
|
||||
} else {
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
ret = dw_spi_add_host(&pdev->dev, dws);
|
||||
@@ -121,7 +136,14 @@ static SIMPLE_DEV_PM_OPS(dw_spi_pm_ops, spi_suspend, spi_resume);
|
||||
|
||||
static const struct pci_device_id pci_ids[] = {
|
||||
/* Intel MID platform SPI controller 0 */
|
||||
{ PCI_VDEVICE(INTEL, 0x0800), (kernel_ulong_t)&spi_pci_mid_desc},
|
||||
/*
|
||||
* The access to the device 8086:0801 is disabled by HW, since it's
|
||||
* exclusively used by SCU to communicate with MSIC.
|
||||
*/
|
||||
/* Intel MID platform SPI controller 1 */
|
||||
{ PCI_VDEVICE(INTEL, 0x0800), (kernel_ulong_t)&spi_pci_mid_desc_1},
|
||||
/* Intel MID platform SPI controller 2 */
|
||||
{ PCI_VDEVICE(INTEL, 0x0812), (kernel_ulong_t)&spi_pci_mid_desc_2},
|
||||
{},
|
||||
};
|
||||
|
||||
|
||||
@@ -608,7 +608,7 @@ static void dw_spi_cleanup(struct spi_device *spi)
|
||||
}
|
||||
|
||||
/* Restart the controller, disable all interrupts, clean rx fifo */
|
||||
static void spi_hw_init(struct dw_spi *dws)
|
||||
static void spi_hw_init(struct device *dev, struct dw_spi *dws)
|
||||
{
|
||||
spi_enable_chip(dws, 0);
|
||||
spi_mask_intr(dws, 0xff);
|
||||
@@ -626,9 +626,10 @@ static void spi_hw_init(struct dw_spi *dws)
|
||||
if (fifo != dw_readw(dws, DW_SPI_TXFLTR))
|
||||
break;
|
||||
}
|
||||
dw_writew(dws, DW_SPI_TXFLTR, 0);
|
||||
|
||||
dws->fifo_len = (fifo == 2) ? 0 : fifo - 1;
|
||||
dw_writew(dws, DW_SPI_TXFLTR, 0);
|
||||
dev_dbg(dev, "Detected FIFO size: %u bytes\n", dws->fifo_len);
|
||||
}
|
||||
}
|
||||
|
||||
@@ -668,7 +669,7 @@ int dw_spi_add_host(struct device *dev, struct dw_spi *dws)
|
||||
master->dev.of_node = dev->of_node;
|
||||
|
||||
/* Basic HW init */
|
||||
spi_hw_init(dws);
|
||||
spi_hw_init(dev, dws);
|
||||
|
||||
if (dws->dma_ops && dws->dma_ops->dma_init) {
|
||||
ret = dws->dma_ops->dma_init(dws);
|
||||
@@ -731,7 +732,7 @@ int dw_spi_resume_host(struct dw_spi *dws)
|
||||
{
|
||||
int ret;
|
||||
|
||||
spi_hw_init(dws);
|
||||
spi_hw_init(&dws->master->dev, dws);
|
||||
ret = spi_master_resume(dws->master);
|
||||
if (ret)
|
||||
dev_err(&dws->master->dev, "fail to start queue (%d)\n", ret);
|
||||
|
||||
@@ -353,16 +353,6 @@ static int falcon_sflash_setup(struct spi_device *spi)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int falcon_sflash_prepare_xfer(struct spi_master *master)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int falcon_sflash_unprepare_xfer(struct spi_master *master)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int falcon_sflash_xfer_one(struct spi_master *master,
|
||||
struct spi_message *m)
|
||||
{
|
||||
@@ -420,9 +410,7 @@ static int falcon_sflash_probe(struct platform_device *pdev)
|
||||
master->mode_bits = SPI_MODE_3;
|
||||
master->flags = SPI_MASTER_HALF_DUPLEX;
|
||||
master->setup = falcon_sflash_setup;
|
||||
master->prepare_transfer_hardware = falcon_sflash_prepare_xfer;
|
||||
master->transfer_one_message = falcon_sflash_xfer_one;
|
||||
master->unprepare_transfer_hardware = falcon_sflash_unprepare_xfer;
|
||||
master->dev.of_node = pdev->dev.of_node;
|
||||
|
||||
ret = devm_spi_register_master(&pdev->dev, master);
|
||||
|
||||
@@ -20,6 +20,7 @@
|
||||
#include <linux/dma-mapping.h>
|
||||
#include <linux/fsl_devices.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/of_address.h>
|
||||
#include <linux/spi/spi.h>
|
||||
#include <linux/types.h>
|
||||
@@ -68,6 +69,7 @@ void fsl_spi_cpm_reinit_txrx(struct mpc8xxx_spi *mspi)
|
||||
}
|
||||
}
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(fsl_spi_cpm_reinit_txrx);
|
||||
|
||||
static void fsl_spi_cpm_bufs_start(struct mpc8xxx_spi *mspi)
|
||||
{
|
||||
@@ -162,6 +164,7 @@ err_rx_dma:
|
||||
dma_unmap_single(dev, mspi->tx_dma, t->len, DMA_TO_DEVICE);
|
||||
return -ENOMEM;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(fsl_spi_cpm_bufs);
|
||||
|
||||
void fsl_spi_cpm_bufs_complete(struct mpc8xxx_spi *mspi)
|
||||
{
|
||||
@@ -174,6 +177,7 @@ void fsl_spi_cpm_bufs_complete(struct mpc8xxx_spi *mspi)
|
||||
dma_unmap_single(dev, mspi->rx_dma, t->len, DMA_FROM_DEVICE);
|
||||
mspi->xfer_in_progress = NULL;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(fsl_spi_cpm_bufs_complete);
|
||||
|
||||
void fsl_spi_cpm_irq(struct mpc8xxx_spi *mspi, u32 events)
|
||||
{
|
||||
@@ -198,6 +202,7 @@ void fsl_spi_cpm_irq(struct mpc8xxx_spi *mspi, u32 events)
|
||||
else
|
||||
complete(&mspi->done);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(fsl_spi_cpm_irq);
|
||||
|
||||
static void *fsl_spi_alloc_dummy_rx(void)
|
||||
{
|
||||
@@ -375,6 +380,7 @@ err_pram:
|
||||
fsl_spi_free_dummy_rx();
|
||||
return -ENOMEM;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(fsl_spi_cpm_init);
|
||||
|
||||
void fsl_spi_cpm_free(struct mpc8xxx_spi *mspi)
|
||||
{
|
||||
@@ -389,3 +395,6 @@ void fsl_spi_cpm_free(struct mpc8xxx_spi *mspi)
|
||||
cpm_muram_free(cpm_muram_offset(mspi->pram));
|
||||
fsl_spi_free_dummy_rx();
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(fsl_spi_cpm_free);
|
||||
|
||||
MODULE_LICENSE("GPL");
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user