[PATCH] ppc32: Put cache flush routines back into .relocate_code section

In 2.6.14, we had the following definition of _GLOBAL() in
include/asm-ppc/processor.h:

#define _GLOBAL(n)\
        .stabs __stringify(n:F-1),N_FUN,0,0,n;\
        .globl n;\
n:

In 2.6.15, as part of the great powerpc merge, we moved this definition to
include/asm-powerpc/ppc_asm.h, where it appears (to 32-bit code) as:

#define _GLOBAL(n)      \
        .text;          \
        .stabs __stringify(n:F-1),N_FUN,0,0,n;\
        .globl n;       \
n:

Mostly, this is fine.  However, we also have the following, in
arch/ppc/boot/common/util.S:

        .section ".relocate_code","xa"
[...]
_GLOBAL(flush_instruction_cache)
[...]
_GLOBAL(flush_data_cache)
[...]

The addition of the .text section definition in the definition of
_GLOBAL overrides the .relocate_code section definition.  As a result,
these two functions don't end up in .relocate_code, so they don't get
relocated correctly, and the boot fails.

There's another suspicious-looking usage at kernel/swsusp.S:37 that
someone should look into.  I did not exhaustively search the source
tree, though.

The following is the minimal patch that fixes the immediate problem.
I could easily be convinced that the _GLOBAL definition should be
modified to remove the ".text;" line either instead of, or in addition
to, this fix.

Signed-off-by: Paul Janzen <pcj@linux.sez.to>
Signed-off-by: Paul Mackerras <paulus@samba.org>

arch/ppc/boot/common/util.S

@@ -234,7 +234,8 @@ udelay:
  * First, flush the data cache in case it was enabled and may be
  * holding instructions for copy back.
  */
-_GLOBAL(flush_instruction_cache)
+        .globl flush_instruction_cache
+flush_instruction_cache:        
 	mflr	r6
 	bl	flush_data_cache
 
@@ -279,7 +280,8 @@ _GLOBAL(flush_instruction_cache)
  * Flush data cache
  * Do this by just reading lots of stuff into the cache.
  */
-_GLOBAL(flush_data_cache)
+        .globl flush_data_cache
+flush_data_cache:       
 	lis	r3,cache_flush_buffer@h
 	ori	r3,r3,cache_flush_buffer@l
 	li	r4,NUM_CACHE_LINES