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staging: remove ath6kl
ath6kl is now in drivers/net/wireless/ath so the staging driver is not supported anymore and should be removed. Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
committed by
Greg Kroah-Hartman
parent
746a54ac1d
commit
9ac4025d80
@@ -128,8 +128,6 @@ source "drivers/staging/quickstart/Kconfig"
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source "drivers/staging/sbe-2t3e3/Kconfig"
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source "drivers/staging/ath6kl/Kconfig"
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source "drivers/staging/keucr/Kconfig"
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source "drivers/staging/bcm/Kconfig"
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@@ -55,7 +55,6 @@ obj-$(CONFIG_SOLO6X10) += solo6x10/
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obj-$(CONFIG_TIDSPBRIDGE) += tidspbridge/
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obj-$(CONFIG_ACPI_QUICKSTART) += quickstart/
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obj-$(CONFIG_SBE_2T3E3) += sbe-2t3e3/
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obj-$(CONFIG_ATH6K_LEGACY) += ath6kl/
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obj-$(CONFIG_USB_ENESTORAGE) += keucr/
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obj-$(CONFIG_BCM_WIMAX) += bcm/
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obj-$(CONFIG_FT1000) += ft1000/
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@@ -1,158 +0,0 @@
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config ATH6K_LEGACY
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tristate "Atheros AR6003 support (non mac80211)"
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depends on MMC && WLAN
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depends on CFG80211
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select WIRELESS_EXT
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select WEXT_PRIV
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help
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This module adds support for wireless adapters based on Atheros AR6003 chipset running over SDIO. If you choose to build it as a module, it will be called ath6kl. Pls note that AR6002 and AR6001 are not supported by this driver.
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choice
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prompt "AR6003 Board Data Configuration"
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depends on ATH6K_LEGACY
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default AR600x_SD31_XXX
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help
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Select the appropriate board data template from the list below that matches your AR6003 based reference design.
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config AR600x_SD31_XXX
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bool "SD31-xxx"
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help
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Board Data file for a standard SD31 reference design (File: bdata.SD31.bin)
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config AR600x_WB31_XXX
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bool "WB31-xxx"
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help
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Board Data file for a standard WB31 (BT/WiFi) reference design (File: bdata.WB31.bin)
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config AR600x_SD32_XXX
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bool "SD32-xxx"
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help
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Board Data file for a standard SD32 (5GHz) reference design (File: bdata.SD32.bin)
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config AR600x_CUSTOM_XXX
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bool "CUSTOM-xxx"
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help
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Board Data file for a custom reference design (File: should be named as bdata.CUSTOM.bin)
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endchoice
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config ATH6KL_ENABLE_COEXISTENCE
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bool "BT Coexistence support"
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depends on ATH6K_LEGACY
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help
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Enables WLAN/BT coexistence support. Select the apprpriate configuration from below.
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choice
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prompt "Front-End Antenna Configuration"
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depends on ATH6KL_ENABLE_COEXISTENCE
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default AR600x_DUAL_ANTENNA
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help
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Indicates the number of antennas being used by BT and WLAN. Select the appropriate configuration from the list below that matches your AR6003 based reference design.
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config AR600x_DUAL_ANTENNA
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bool "Dual Antenna"
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help
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Dual Antenna Design
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config AR600x_SINGLE_ANTENNA
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bool "Single Antenna"
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help
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Single Antenna Design
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endchoice
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choice
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prompt "Collocated Bluetooth Type"
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depends on ATH6KL_ENABLE_COEXISTENCE
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default AR600x_BT_AR3001
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help
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Select the appropriate configuration from the list below that matches your AR6003 based reference design.
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config AR600x_BT_QCOM
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bool "Qualcomm BTS4020X"
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help
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Qualcomm BT (3 Wire PTA)
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config AR600x_BT_CSR
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bool "CSR BC06"
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help
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CSR BT (3 Wire PTA)
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config AR600x_BT_AR3001
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bool "Atheros AR3001"
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help
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Atheros BT (3 Wire PTA)
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endchoice
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config ATH6KL_HCI_BRIDGE
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bool "HCI over SDIO support"
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depends on ATH6K_LEGACY
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help
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Enables BT over SDIO. Applicable only for combo designs (eg: WB31)
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config ATH6KL_CONFIG_GPIO_BT_RESET
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bool "Configure BT Reset GPIO"
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depends on ATH6KL_HCI_BRIDGE
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help
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Configure a WLAN GPIO for use with BT.
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config AR600x_BT_RESET_PIN
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int "GPIO"
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depends on ATH6KL_CONFIG_GPIO_BT_RESET
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default 22
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help
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WLAN GPIO to be used for resetting BT
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config ATH6KL_HTC_RAW_INTERFACE
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bool "RAW HTC support"
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depends on ATH6K_LEGACY
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help
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Enables raw HTC interface. Allows application to directly talk to the HTC interface via the ioctl interface
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config ATH6KL_VIRTUAL_SCATTER_GATHER
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bool "Virtual Scatter-Gather support"
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depends on ATH6K_LEGACY
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help
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Enables virtual scatter gather support for the hardware that does not support it natively.
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config ATH6KL_SKIP_ABI_VERSION_CHECK
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bool "Skip ABI version check support"
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depends on ATH6K_LEGACY
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help
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Forces the driver to disable ABI version check. Caution: Incompatilbity between the host driver and target firmware may lead to unknown side effects.
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config ATH6KL_BT_UART_FC_POLARITY
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int "UART Flow Control Polarity"
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depends on ATH6KL_LEGACY
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default 0
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help
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Configures the polarity of UART Flow Control. A value of 0 implies active low and is the default setting. Set it to 1 for active high.
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config ATH6KL_DEBUG
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bool "Debug support"
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depends on ATH6K_LEGACY
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help
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Enables debug support
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config ATH6KL_ENABLE_HOST_DEBUG
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bool "Host Debug support"
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depends on ATH6KL_DEBUG
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help
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Enables debug support in the driver
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config ATH6KL_ENABLE_TARGET_DEBUG_PRINTS
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bool "Target Debug support - Enable UART prints"
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depends on ATH6KL_DEBUG
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help
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Enables uart prints
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config AR600x_DEBUG_UART_TX_PIN
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int "GPIO"
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depends on ATH6KL_ENABLE_TARGET_DEBUG_PRINTS
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default 8
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help
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WLAN GPIO to be used for Debug UART (Tx)
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config ATH6KL_DISABLE_TARGET_DBGLOGS
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bool "Target Debug support - Disable Debug logs"
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depends on ATH6KL_DEBUG
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help
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Enables debug logs
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@@ -1,122 +0,0 @@
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#------------------------------------------------------------------------------
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# Copyright (c) 2004-2010 Atheros Communications Inc.
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# All rights reserved.
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#
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#
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#
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# Permission to use, copy, modify, and/or distribute this software for any
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# purpose with or without fee is hereby granted, provided that the above
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# copyright notice and this permission notice appear in all copies.
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#
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# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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# OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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#
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#
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#
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# Author(s): ="Atheros"
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#------------------------------------------------------------------------------
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ccflags-y += -I$(obj)/include
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ccflags-y += -I$(obj)/include/common
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ccflags-y += -I$(obj)/wlan/include
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ccflags-y += -I$(obj)/os/linux/include
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ccflags-y += -I$(obj)/os
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ccflags-y += -I$(obj)/bmi/include
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ccflags-y += -I$(obj)/include/common/AR6002/hw4.0
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ifeq ($(CONFIG_AR600x_DUAL_ANTENNA),y)
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ccflags-y += -DAR600x_DUAL_ANTENNA
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endif
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ifeq ($(CONFIG_AR600x_SINGLE_ANTENNA),y)
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ccflags-y += -DAR600x_SINGLE_ANTENNA
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endif
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ifeq ($(CONFIG_AR600x_BT_QCOM),y)
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ccflags-y += -DAR600x_BT_QCOM
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endif
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ifeq ($(CONFIG_AR600x_BT_CSR),y)
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ccflags-y += -DAR600x_BT_CSR
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endif
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ifeq ($(CONFIG_AR600x_BT_AR3001),y)
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ccflags-y += -DAR600x_BT_AR3001
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endif
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ifeq ($(CONFIG_ATH6KL_HCI_BRIDGE),y)
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ccflags-y += -DATH_AR6K_ENABLE_GMBOX
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ccflags-y += -DHCI_TRANSPORT_SDIO
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ccflags-y += -DSETUPHCI_ENABLED
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ccflags-y += -DSETUPBTDEV_ENABLED
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ath6kl-y += htc2/AR6000/ar6k_gmbox.o
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ath6kl-y += htc2/AR6000/ar6k_gmbox_hciuart.o
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ath6kl-y += miscdrv/ar3kconfig.o
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ath6kl-y += miscdrv/ar3kps/ar3kpsconfig.o
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ath6kl-y += miscdrv/ar3kps/ar3kpsparser.o
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endif
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ifeq ($(CONFIG_ATH6KL_CONFIG_GPIO_BT_RESET),y)
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ccflags-y += -DATH6KL_CONFIG_GPIO_BT_RESET
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endif
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ifeq ($(CONFIG_ATH6KL_HTC_RAW_INTERFACE),y)
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ccflags-y += -DHTC_RAW_INTERFACE
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endif
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ifeq ($(CONFIG_ATH6KL_ENABLE_HOST_DEBUG),y)
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ccflags-y += -DDEBUG
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ccflags-y += -DATH_DEBUG_MODULE
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endif
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ifeq ($(CONFIG_ATH6KL_ENABLE_TARGET_DEBUG_PRINTS),y)
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ccflags-y += -DENABLEUARTPRINT_SET
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endif
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ifeq ($(CONFIG_ATH6KL_DISABLE_TARGET_DBGLOGS),y)
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ccflags-y += -DATH6KL_DISABLE_TARGET_DBGLOGS
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endif
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ifeq ($(CONFIG_ATH6KL_VIRTUAL_SCATTER_GATHER),y)
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ccflags-y += -DATH6KL_CONFIG_HIF_VIRTUAL_SCATTER
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endif
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ifeq ($(CONFIG_ATH6KL_SKIP_ABI_VERSION_CHECK),y)
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ccflags-y += -DATH6KL_SKIP_ABI_VERSION_CHECK
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endif
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ccflags-y += -DWAPI_ENABLE
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ccflags-y += -DCHECKSUM_OFFLOAD
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obj-$(CONFIG_ATH6K_LEGACY) := ath6kl.o
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ath6kl-y += htc2/AR6000/ar6k.o
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ath6kl-y += htc2/AR6000/ar6k_events.o
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ath6kl-y += htc2/htc_send.o
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ath6kl-y += htc2/htc_recv.o
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ath6kl-y += htc2/htc_services.o
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ath6kl-y += htc2/htc.o
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ath6kl-y += bmi/src/bmi.o
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ath6kl-y += os/linux/cfg80211.o
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ath6kl-y += os/linux/ar6000_drv.o
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ath6kl-y += os/linux/ar6000_raw_if.o
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ath6kl-y += os/linux/ar6000_pm.o
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ath6kl-y += os/linux/netbuf.o
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ath6kl-y += os/linux/hci_bridge.o
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ath6kl-y += miscdrv/common_drv.o
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ath6kl-y += miscdrv/credit_dist.o
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ath6kl-y += wmi/wmi.o
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ath6kl-y += reorder/rcv_aggr.o
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ath6kl-y += wlan/src/wlan_node.o
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ath6kl-y += wlan/src/wlan_recv_beacon.o
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ath6kl-y += wlan/src/wlan_utils.o
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# ATH_HIF_TYPE := sdio
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ccflags-y += -I$(obj)/hif/sdio/linux_sdio/include
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ccflags-y += -DSDIO
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ath6kl-y += hif/sdio/linux_sdio/src/hif.o
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ath6kl-y += hif/sdio/linux_sdio/src/hif_scatter.o
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@@ -1,25 +0,0 @@
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TODO:
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We are working hard on cleaning up the driver. There's sooooooooo much todo
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so instead of editing this file please use the wiki:
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http://wireless.kernel.org/en/users/Drivers/ath6kl
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There's a respective TODO page there. Please also subscribe to the wiki page
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to get e-mail updates on changes.
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IRC:
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We *really* need to coordinate development for ath6kl as the cleanup
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patches will break pretty much any other patches. Please use IRC to
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help coordinate better:
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irc.freenode.net
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#ath6kl
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Send patches to:
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- Greg Kroah-Hartman <greg@kroah.com>
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- Luis R. Rodriguez <mcgrof@gmail.com>
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- Joe Perches <joe@perches.com>
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- Naveen Singh <nsingh@atheros.com>
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@@ -1,54 +0,0 @@
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//------------------------------------------------------------------------------
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// Copyright (c) 2004-2010 Atheros Communications Inc.
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// All rights reserved.
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//
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//
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// Permission to use, copy, modify, and/or distribute this software for any
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// purpose with or without fee is hereby granted, provided that the above
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// copyright notice and this permission notice appear in all copies.
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//
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// THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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// WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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// MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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// ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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// WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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// ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
|
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// OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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//
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//
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//------------------------------------------------------------------------------
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//==============================================================================
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//
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// Author(s): ="Atheros"
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//==============================================================================
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#ifndef BMI_INTERNAL_H
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#define BMI_INTERNAL_H
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#include "a_config.h"
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#include "athdefs.h"
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#include "a_osapi.h"
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#define ATH_MODULE_NAME bmi
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#include "a_debug.h"
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#include "hw/mbox_host_reg.h"
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#include "bmi_msg.h"
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#define ATH_DEBUG_BMI ATH_DEBUG_MAKE_MODULE_MASK(0)
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#define BMI_COMMUNICATION_TIMEOUT 100000
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/* ------ Global Variable Declarations ------- */
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static bool bmiDone;
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int
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bmiBufferSend(struct hif_device *device,
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u8 *buffer,
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u32 length);
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int
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bmiBufferReceive(struct hif_device *device,
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u8 *buffer,
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u32 length,
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bool want_timeout);
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#endif
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File diff suppressed because it is too large
Load Diff
@@ -1,87 +0,0 @@
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//------------------------------------------------------------------------------
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// Copyright (c) 2009-2010 Atheros Corporation. All rights reserved.
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//
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//
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// Permission to use, copy, modify, and/or distribute this software for any
|
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// purpose with or without fee is hereby granted, provided that the above
|
||||
// copyright notice and this permission notice appear in all copies.
|
||||
//
|
||||
// THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
|
||||
// WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
|
||||
// MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
|
||||
// ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
|
||||
// WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
|
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// ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
|
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// OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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//
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//
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//------------------------------------------------------------------------------
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//==============================================================================
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// common header file for HIF modules designed for SDIO
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//
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// Author(s): ="Atheros"
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//==============================================================================
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#ifndef HIF_SDIO_COMMON_H_
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#define HIF_SDIO_COMMON_H_
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/* SDIO manufacturer ID and Codes */
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#define MANUFACTURER_ID_AR6002_BASE 0x200
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#define MANUFACTURER_ID_AR6003_BASE 0x300
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#define MANUFACTURER_ID_AR6K_BASE_MASK 0xFF00
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#define FUNCTION_CLASS 0x0
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#define MANUFACTURER_CODE 0x271 /* Atheros */
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/* Mailbox address in SDIO address space */
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#define HIF_MBOX_BASE_ADDR 0x800
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#define HIF_MBOX_WIDTH 0x800
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#define HIF_MBOX_START_ADDR(mbox) \
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( HIF_MBOX_BASE_ADDR + mbox * HIF_MBOX_WIDTH)
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#define HIF_MBOX_END_ADDR(mbox) \
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(HIF_MBOX_START_ADDR(mbox) + HIF_MBOX_WIDTH - 1)
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/* extended MBOX address for larger MBOX writes to MBOX 0*/
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#define HIF_MBOX0_EXTENDED_BASE_ADDR 0x2800
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#define HIF_MBOX0_EXTENDED_WIDTH_AR6002 (6*1024)
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#define HIF_MBOX0_EXTENDED_WIDTH_AR6003 (18*1024)
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/* version 1 of the chip has only a 12K extended mbox range */
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#define HIF_MBOX0_EXTENDED_BASE_ADDR_AR6003_V1 0x4000
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#define HIF_MBOX0_EXTENDED_WIDTH_AR6003_V1 (12*1024)
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/* GMBOX addresses */
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#define HIF_GMBOX_BASE_ADDR 0x7000
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#define HIF_GMBOX_WIDTH 0x4000
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/* for SDIO we recommend a 128-byte block size */
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#define HIF_DEFAULT_IO_BLOCK_SIZE 128
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/* set extended MBOX window information for SDIO interconnects */
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static INLINE void SetExtendedMboxWindowInfo(u16 Manfid, struct hif_device_mbox_info *pInfo)
|
||||
{
|
||||
switch (Manfid & MANUFACTURER_ID_AR6K_BASE_MASK) {
|
||||
case MANUFACTURER_ID_AR6002_BASE :
|
||||
/* MBOX 0 has an extended range */
|
||||
pInfo->MboxProp[0].ExtendedAddress = HIF_MBOX0_EXTENDED_BASE_ADDR;
|
||||
pInfo->MboxProp[0].ExtendedSize = HIF_MBOX0_EXTENDED_WIDTH_AR6002;
|
||||
break;
|
||||
case MANUFACTURER_ID_AR6003_BASE :
|
||||
/* MBOX 0 has an extended range */
|
||||
pInfo->MboxProp[0].ExtendedAddress = HIF_MBOX0_EXTENDED_BASE_ADDR_AR6003_V1;
|
||||
pInfo->MboxProp[0].ExtendedSize = HIF_MBOX0_EXTENDED_WIDTH_AR6003_V1;
|
||||
pInfo->GMboxAddress = HIF_GMBOX_BASE_ADDR;
|
||||
pInfo->GMboxSize = HIF_GMBOX_WIDTH;
|
||||
break;
|
||||
default:
|
||||
A_ASSERT(false);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/* special CCCR (func 0) registers */
|
||||
|
||||
#define CCCR_SDIO_IRQ_MODE_REG 0xF0 /* interrupt mode register */
|
||||
#define SDIO_IRQ_MODE_ASYNC_4BIT_IRQ (1 << 0) /* mode to enable special 4-bit interrupt assertion without clock*/
|
||||
|
||||
#endif /*HIF_SDIO_COMMON_H_*/
|
||||
@@ -1,131 +0,0 @@
|
||||
//------------------------------------------------------------------------------
|
||||
// <copyright file="hif_internal.h" company="Atheros">
|
||||
// Copyright (c) 2004-2010 Atheros Corporation. All rights reserved.
|
||||
//
|
||||
//
|
||||
// Permission to use, copy, modify, and/or distribute this software for any
|
||||
// purpose with or without fee is hereby granted, provided that the above
|
||||
// copyright notice and this permission notice appear in all copies.
|
||||
//
|
||||
// THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
|
||||
// WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
|
||||
// MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
|
||||
// ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
|
||||
// WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
|
||||
// ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
|
||||
// OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
//
|
||||
//
|
||||
//------------------------------------------------------------------------------
|
||||
//==============================================================================
|
||||
// internal header file for hif layer
|
||||
//
|
||||
// Author(s): ="Atheros"
|
||||
//==============================================================================
|
||||
#ifndef _HIF_INTERNAL_H_
|
||||
#define _HIF_INTERNAL_H_
|
||||
|
||||
#include "a_config.h"
|
||||
#include "athdefs.h"
|
||||
#include "a_osapi.h"
|
||||
#include "hif.h"
|
||||
#include "../../../common/hif_sdio_common.h"
|
||||
#include <linux/scatterlist.h>
|
||||
#define HIF_LINUX_MMC_SCATTER_SUPPORT
|
||||
|
||||
#define BUS_REQUEST_MAX_NUM 64
|
||||
|
||||
#define SDIO_CLOCK_FREQUENCY_DEFAULT 25000000
|
||||
#define SDWLAN_ENABLE_DISABLE_TIMEOUT 20
|
||||
#define FLAGS_CARD_ENAB 0x02
|
||||
#define FLAGS_CARD_IRQ_UNMSK 0x04
|
||||
|
||||
#define HIF_MBOX_BLOCK_SIZE HIF_DEFAULT_IO_BLOCK_SIZE
|
||||
#define HIF_MBOX0_BLOCK_SIZE 1
|
||||
#define HIF_MBOX1_BLOCK_SIZE HIF_MBOX_BLOCK_SIZE
|
||||
#define HIF_MBOX2_BLOCK_SIZE HIF_MBOX_BLOCK_SIZE
|
||||
#define HIF_MBOX3_BLOCK_SIZE HIF_MBOX_BLOCK_SIZE
|
||||
|
||||
typedef struct bus_request {
|
||||
struct bus_request *next; /* link list of available requests */
|
||||
struct bus_request *inusenext; /* link list of in use requests */
|
||||
struct semaphore sem_req;
|
||||
u32 address; /* request data */
|
||||
u8 *buffer;
|
||||
u32 length;
|
||||
u32 request;
|
||||
void *context;
|
||||
int status;
|
||||
struct hif_scatter_req_priv *pScatterReq; /* this request is a scatter request */
|
||||
} BUS_REQUEST;
|
||||
|
||||
struct hif_device {
|
||||
struct sdio_func *func;
|
||||
spinlock_t asynclock;
|
||||
struct task_struct* async_task; /* task to handle async commands */
|
||||
struct semaphore sem_async; /* wake up for async task */
|
||||
int async_shutdown; /* stop the async task */
|
||||
struct completion async_completion; /* thread completion */
|
||||
BUS_REQUEST *asyncreq; /* request for async tasklet */
|
||||
BUS_REQUEST *taskreq; /* async tasklet data */
|
||||
spinlock_t lock;
|
||||
BUS_REQUEST *s_busRequestFreeQueue; /* free list */
|
||||
BUS_REQUEST busRequest[BUS_REQUEST_MAX_NUM]; /* available bus requests */
|
||||
void *claimedContext;
|
||||
HTC_CALLBACKS htcCallbacks;
|
||||
u8 *dma_buffer;
|
||||
struct dl_list ScatterReqHead; /* scatter request list head */
|
||||
bool scatter_enabled; /* scatter enabled flag */
|
||||
bool is_suspend;
|
||||
bool is_disabled;
|
||||
atomic_t irqHandling;
|
||||
HIF_DEVICE_POWER_CHANGE_TYPE powerConfig;
|
||||
const struct sdio_device_id *id;
|
||||
};
|
||||
|
||||
#define HIF_DMA_BUFFER_SIZE (32 * 1024)
|
||||
#define CMD53_FIXED_ADDRESS 1
|
||||
#define CMD53_INCR_ADDRESS 2
|
||||
|
||||
BUS_REQUEST *hifAllocateBusRequest(struct hif_device *device);
|
||||
void hifFreeBusRequest(struct hif_device *device, BUS_REQUEST *busrequest);
|
||||
void AddToAsyncList(struct hif_device *device, BUS_REQUEST *busrequest);
|
||||
|
||||
#ifdef HIF_LINUX_MMC_SCATTER_SUPPORT
|
||||
|
||||
#define MAX_SCATTER_REQUESTS 4
|
||||
#define MAX_SCATTER_ENTRIES_PER_REQ 16
|
||||
#define MAX_SCATTER_REQ_TRANSFER_SIZE 32*1024
|
||||
|
||||
struct hif_scatter_req_priv {
|
||||
struct hif_scatter_req *pHifScatterReq; /* HIF scatter request with allocated entries */
|
||||
struct hif_device *device; /* this device */
|
||||
BUS_REQUEST *busrequest; /* request associated with request */
|
||||
/* scatter list for linux */
|
||||
struct scatterlist sgentries[MAX_SCATTER_ENTRIES_PER_REQ];
|
||||
};
|
||||
|
||||
#define ATH_DEBUG_SCATTER ATH_DEBUG_MAKE_MODULE_MASK(0)
|
||||
|
||||
int SetupHIFScatterSupport(struct hif_device *device, struct hif_device_scatter_support_info *pInfo);
|
||||
void CleanupHIFScatterResources(struct hif_device *device);
|
||||
int DoHifReadWriteScatter(struct hif_device *device, BUS_REQUEST *busrequest);
|
||||
|
||||
#else // HIF_LINUX_MMC_SCATTER_SUPPORT
|
||||
|
||||
static inline int SetupHIFScatterSupport(struct hif_device *device, struct hif_device_scatter_support_info *pInfo)
|
||||
{
|
||||
return A_ENOTSUP;
|
||||
}
|
||||
|
||||
static inline int DoHifReadWriteScatter(struct hif_device *device, BUS_REQUEST *busrequest)
|
||||
{
|
||||
return A_ENOTSUP;
|
||||
}
|
||||
|
||||
#define CleanupHIFScatterResources(d) { }
|
||||
|
||||
#endif // HIF_LINUX_MMC_SCATTER_SUPPORT
|
||||
|
||||
#endif // _HIF_INTERNAL_H_
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -1,393 +0,0 @@
|
||||
//------------------------------------------------------------------------------
|
||||
// Copyright (c) 2009-2010 Atheros Corporation. All rights reserved.
|
||||
//
|
||||
//
|
||||
// Permission to use, copy, modify, and/or distribute this software for any
|
||||
// purpose with or without fee is hereby granted, provided that the above
|
||||
// copyright notice and this permission notice appear in all copies.
|
||||
//
|
||||
// THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
|
||||
// WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
|
||||
// MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
|
||||
// ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
|
||||
// WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
|
||||
// ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
|
||||
// OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
//
|
||||
//
|
||||
//------------------------------------------------------------------------------
|
||||
//==============================================================================
|
||||
// HIF scatter implementation
|
||||
//
|
||||
// Author(s): ="Atheros"
|
||||
//==============================================================================
|
||||
|
||||
#include <linux/mmc/card.h>
|
||||
#include <linux/mmc/host.h>
|
||||
#include <linux/mmc/sdio_func.h>
|
||||
#include <linux/mmc/sdio_ids.h>
|
||||
#include <linux/mmc/sdio.h>
|
||||
#include <linux/kthread.h>
|
||||
#include "hif_internal.h"
|
||||
#define ATH_MODULE_NAME hif
|
||||
#include "a_debug.h"
|
||||
|
||||
#ifdef HIF_LINUX_MMC_SCATTER_SUPPORT
|
||||
|
||||
#define _CMD53_ARG_READ 0
|
||||
#define _CMD53_ARG_WRITE 1
|
||||
#define _CMD53_ARG_BLOCK_BASIS 1
|
||||
#define _CMD53_ARG_FIXED_ADDRESS 0
|
||||
#define _CMD53_ARG_INCR_ADDRESS 1
|
||||
|
||||
#define SDIO_SET_CMD53_ARG(arg,rw,func,mode,opcode,address,bytes_blocks) \
|
||||
(arg) = (((rw) & 1) << 31) | \
|
||||
(((func) & 0x7) << 28) | \
|
||||
(((mode) & 1) << 27) | \
|
||||
(((opcode) & 1) << 26) | \
|
||||
(((address) & 0x1FFFF) << 9) | \
|
||||
((bytes_blocks) & 0x1FF)
|
||||
|
||||
static void FreeScatterReq(struct hif_device *device, struct hif_scatter_req *pReq)
|
||||
{
|
||||
unsigned long flag;
|
||||
|
||||
spin_lock_irqsave(&device->lock, flag);
|
||||
|
||||
DL_ListInsertTail(&device->ScatterReqHead, &pReq->ListLink);
|
||||
|
||||
spin_unlock_irqrestore(&device->lock, flag);
|
||||
|
||||
}
|
||||
|
||||
static struct hif_scatter_req *AllocScatterReq(struct hif_device *device)
|
||||
{
|
||||
struct dl_list *pItem;
|
||||
unsigned long flag;
|
||||
|
||||
spin_lock_irqsave(&device->lock, flag);
|
||||
|
||||
pItem = DL_ListRemoveItemFromHead(&device->ScatterReqHead);
|
||||
|
||||
spin_unlock_irqrestore(&device->lock, flag);
|
||||
|
||||
if (pItem != NULL) {
|
||||
return A_CONTAINING_STRUCT(pItem, struct hif_scatter_req, ListLink);
|
||||
}
|
||||
|
||||
return NULL;
|
||||
}
|
||||
|
||||
/* called by async task to perform the operation synchronously using direct MMC APIs */
|
||||
int DoHifReadWriteScatter(struct hif_device *device, BUS_REQUEST *busrequest)
|
||||
{
|
||||
int i;
|
||||
u8 rw;
|
||||
u8 opcode;
|
||||
struct mmc_request mmcreq;
|
||||
struct mmc_command cmd;
|
||||
struct mmc_data data;
|
||||
struct hif_scatter_req_priv *pReqPriv;
|
||||
struct hif_scatter_req *pReq;
|
||||
int status = 0;
|
||||
struct scatterlist *pSg;
|
||||
|
||||
pReqPriv = busrequest->pScatterReq;
|
||||
|
||||
A_ASSERT(pReqPriv != NULL);
|
||||
|
||||
pReq = pReqPriv->pHifScatterReq;
|
||||
|
||||
memset(&mmcreq, 0, sizeof(struct mmc_request));
|
||||
memset(&cmd, 0, sizeof(struct mmc_command));
|
||||
memset(&data, 0, sizeof(struct mmc_data));
|
||||
|
||||
data.blksz = HIF_MBOX_BLOCK_SIZE;
|
||||
data.blocks = pReq->TotalLength / HIF_MBOX_BLOCK_SIZE;
|
||||
|
||||
AR_DEBUG_PRINTF(ATH_DEBUG_SCATTER, ("HIF-SCATTER: (%s) Address: 0x%X, (BlockLen: %d, BlockCount: %d) , (tot:%d,sg:%d)\n",
|
||||
(pReq->Request & HIF_WRITE) ? "WRITE":"READ", pReq->Address, data.blksz, data.blocks,
|
||||
pReq->TotalLength,pReq->ValidScatterEntries));
|
||||
|
||||
if (pReq->Request & HIF_WRITE) {
|
||||
rw = _CMD53_ARG_WRITE;
|
||||
data.flags = MMC_DATA_WRITE;
|
||||
} else {
|
||||
rw = _CMD53_ARG_READ;
|
||||
data.flags = MMC_DATA_READ;
|
||||
}
|
||||
|
||||
if (pReq->Request & HIF_FIXED_ADDRESS) {
|
||||
opcode = _CMD53_ARG_FIXED_ADDRESS;
|
||||
} else {
|
||||
opcode = _CMD53_ARG_INCR_ADDRESS;
|
||||
}
|
||||
|
||||
/* fill SG entries */
|
||||
pSg = pReqPriv->sgentries;
|
||||
sg_init_table(pSg, pReq->ValidScatterEntries);
|
||||
|
||||
/* assemble SG list */
|
||||
for (i = 0 ; i < pReq->ValidScatterEntries ; i++, pSg++) {
|
||||
/* setup each sg entry */
|
||||
if ((unsigned long)pReq->ScatterList[i].pBuffer & 0x3) {
|
||||
/* note some scatter engines can handle unaligned buffers, print this
|
||||
* as informational only */
|
||||
AR_DEBUG_PRINTF(ATH_DEBUG_SCATTER,
|
||||
("HIF: (%s) Scatter Buffer is unaligned 0x%lx\n",
|
||||
pReq->Request & HIF_WRITE ? "WRITE":"READ",
|
||||
(unsigned long)pReq->ScatterList[i].pBuffer));
|
||||
}
|
||||
|
||||
AR_DEBUG_PRINTF(ATH_DEBUG_SCATTER, (" %d: Addr:0x%lX, Len:%d \n",
|
||||
i,(unsigned long)pReq->ScatterList[i].pBuffer,pReq->ScatterList[i].Length));
|
||||
|
||||
sg_set_buf(pSg, pReq->ScatterList[i].pBuffer, pReq->ScatterList[i].Length);
|
||||
}
|
||||
/* set scatter-gather table for request */
|
||||
data.sg = pReqPriv->sgentries;
|
||||
data.sg_len = pReq->ValidScatterEntries;
|
||||
/* set command argument */
|
||||
SDIO_SET_CMD53_ARG(cmd.arg,
|
||||
rw,
|
||||
device->func->num,
|
||||
_CMD53_ARG_BLOCK_BASIS,
|
||||
opcode,
|
||||
pReq->Address,
|
||||
data.blocks);
|
||||
|
||||
cmd.opcode = SD_IO_RW_EXTENDED;
|
||||
cmd.flags = MMC_RSP_SPI_R5 | MMC_RSP_R5 | MMC_CMD_ADTC;
|
||||
|
||||
mmcreq.cmd = &cmd;
|
||||
mmcreq.data = &data;
|
||||
|
||||
mmc_set_data_timeout(&data, device->func->card);
|
||||
/* synchronous call to process request */
|
||||
mmc_wait_for_req(device->func->card->host, &mmcreq);
|
||||
|
||||
if (cmd.error) {
|
||||
status = A_ERROR;
|
||||
AR_DEBUG_PRINTF(ATH_DEBUG_ERROR, ("HIF-SCATTER: cmd error: %d \n",cmd.error));
|
||||
}
|
||||
|
||||
if (data.error) {
|
||||
status = A_ERROR;
|
||||
AR_DEBUG_PRINTF(ATH_DEBUG_ERROR, ("HIF-SCATTER: data error: %d \n",data.error));
|
||||
}
|
||||
|
||||
if (status) {
|
||||
AR_DEBUG_PRINTF(ATH_DEBUG_ERROR, ("HIF-SCATTER: FAILED!!! (%s) Address: 0x%X, Block mode (BlockLen: %d, BlockCount: %d)\n",
|
||||
(pReq->Request & HIF_WRITE) ? "WRITE":"READ",pReq->Address, data.blksz, data.blocks));
|
||||
}
|
||||
|
||||
/* set completion status, fail or success */
|
||||
pReq->CompletionStatus = status;
|
||||
|
||||
if (pReq->Request & HIF_ASYNCHRONOUS) {
|
||||
AR_DEBUG_PRINTF(ATH_DEBUG_SCATTER, ("HIF-SCATTER: async_task completion routine req: 0x%lX (%d)\n",(unsigned long)busrequest, status));
|
||||
/* complete the request */
|
||||
A_ASSERT(pReq->CompletionRoutine != NULL);
|
||||
pReq->CompletionRoutine(pReq);
|
||||
} else {
|
||||
AR_DEBUG_PRINTF(ATH_DEBUG_SCATTER, ("HIF-SCATTER async_task upping busrequest : 0x%lX (%d)\n", (unsigned long)busrequest,status));
|
||||
/* signal wait */
|
||||
up(&busrequest->sem_req);
|
||||
}
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
/* callback to issue a read-write scatter request */
|
||||
static int HifReadWriteScatter(struct hif_device *device, struct hif_scatter_req *pReq)
|
||||
{
|
||||
int status = A_EINVAL;
|
||||
u32 request = pReq->Request;
|
||||
struct hif_scatter_req_priv *pReqPriv = (struct hif_scatter_req_priv *)pReq->HIFPrivate[0];
|
||||
|
||||
do {
|
||||
|
||||
A_ASSERT(pReqPriv != NULL);
|
||||
|
||||
AR_DEBUG_PRINTF(ATH_DEBUG_SCATTER, ("HIF-SCATTER: total len: %d Scatter Entries: %d\n",
|
||||
pReq->TotalLength, pReq->ValidScatterEntries));
|
||||
|
||||
if (!(request & HIF_EXTENDED_IO)) {
|
||||
AR_DEBUG_PRINTF(ATH_DEBUG_ERROR,
|
||||
("HIF-SCATTER: Invalid command type: 0x%08x\n", request));
|
||||
break;
|
||||
}
|
||||
|
||||
if (!(request & (HIF_SYNCHRONOUS | HIF_ASYNCHRONOUS))) {
|
||||
AR_DEBUG_PRINTF(ATH_DEBUG_ERROR,
|
||||
("HIF-SCATTER: Invalid execution mode: 0x%08x\n", request));
|
||||
break;
|
||||
}
|
||||
|
||||
if (!(request & HIF_BLOCK_BASIS)) {
|
||||
AR_DEBUG_PRINTF(ATH_DEBUG_ERROR,
|
||||
("HIF-SCATTER: Invalid data mode: 0x%08x\n", request));
|
||||
break;
|
||||
}
|
||||
|
||||
if (pReq->TotalLength > MAX_SCATTER_REQ_TRANSFER_SIZE) {
|
||||
AR_DEBUG_PRINTF(ATH_DEBUG_ERROR,
|
||||
("HIF-SCATTER: Invalid length: %d \n", pReq->TotalLength));
|
||||
break;
|
||||
}
|
||||
|
||||
if (pReq->TotalLength == 0) {
|
||||
A_ASSERT(false);
|
||||
break;
|
||||
}
|
||||
|
||||
/* add bus request to the async list for the async I/O thread to process */
|
||||
AddToAsyncList(device, pReqPriv->busrequest);
|
||||
|
||||
if (request & HIF_SYNCHRONOUS) {
|
||||
AR_DEBUG_PRINTF(ATH_DEBUG_SCATTER, ("HIF-SCATTER: queued sync req: 0x%lX\n", (unsigned long)pReqPriv->busrequest));
|
||||
/* signal thread and wait */
|
||||
up(&device->sem_async);
|
||||
if (down_interruptible(&pReqPriv->busrequest->sem_req) != 0) {
|
||||
AR_DEBUG_PRINTF(ATH_DEBUG_ERROR,("HIF-SCATTER: interrupted! \n"));
|
||||
/* interrupted, exit */
|
||||
status = A_ERROR;
|
||||
break;
|
||||
} else {
|
||||
status = pReq->CompletionStatus;
|
||||
}
|
||||
} else {
|
||||
AR_DEBUG_PRINTF(ATH_DEBUG_SCATTER, ("HIF-SCATTER: queued async req: 0x%lX\n", (unsigned long)pReqPriv->busrequest));
|
||||
/* wake thread, it will process and then take care of the async callback */
|
||||
up(&device->sem_async);
|
||||
status = 0;
|
||||
}
|
||||
|
||||
} while (false);
|
||||
|
||||
if (status && (request & HIF_ASYNCHRONOUS)) {
|
||||
pReq->CompletionStatus = status;
|
||||
pReq->CompletionRoutine(pReq);
|
||||
status = 0;
|
||||
}
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
/* setup of HIF scatter resources */
|
||||
int SetupHIFScatterSupport(struct hif_device *device, struct hif_device_scatter_support_info *pInfo)
|
||||
{
|
||||
int status = A_ERROR;
|
||||
int i;
|
||||
struct hif_scatter_req_priv *pReqPriv;
|
||||
BUS_REQUEST *busrequest;
|
||||
|
||||
do {
|
||||
|
||||
/* check if host supports scatter requests and it meets our requirements */
|
||||
if (device->func->card->host->max_segs < MAX_SCATTER_ENTRIES_PER_REQ) {
|
||||
AR_DEBUG_PRINTF(ATH_DEBUG_ERR,("HIF-SCATTER : host only supports scatter of : %d entries, need: %d \n",
|
||||
device->func->card->host->max_segs, MAX_SCATTER_ENTRIES_PER_REQ));
|
||||
status = A_ENOTSUP;
|
||||
break;
|
||||
}
|
||||
|
||||
AR_DEBUG_PRINTF(ATH_DEBUG_ANY,("HIF-SCATTER Enabled: max scatter req : %d entries: %d \n",
|
||||
MAX_SCATTER_REQUESTS, MAX_SCATTER_ENTRIES_PER_REQ));
|
||||
|
||||
for (i = 0; i < MAX_SCATTER_REQUESTS; i++) {
|
||||
/* allocate the private request blob */
|
||||
pReqPriv = (struct hif_scatter_req_priv *)A_MALLOC(sizeof(struct hif_scatter_req_priv));
|
||||
if (NULL == pReqPriv) {
|
||||
break;
|
||||
}
|
||||
A_MEMZERO(pReqPriv, sizeof(struct hif_scatter_req_priv));
|
||||
/* save the device instance*/
|
||||
pReqPriv->device = device;
|
||||
/* allocate the scatter request */
|
||||
pReqPriv->pHifScatterReq = (struct hif_scatter_req *)A_MALLOC(sizeof(struct hif_scatter_req) +
|
||||
(MAX_SCATTER_ENTRIES_PER_REQ - 1) * (sizeof(struct hif_scatter_item)));
|
||||
|
||||
if (NULL == pReqPriv->pHifScatterReq) {
|
||||
kfree(pReqPriv);
|
||||
break;
|
||||
}
|
||||
/* just zero the main part of the scatter request */
|
||||
A_MEMZERO(pReqPriv->pHifScatterReq, sizeof(struct hif_scatter_req));
|
||||
/* back pointer to the private struct */
|
||||
pReqPriv->pHifScatterReq->HIFPrivate[0] = pReqPriv;
|
||||
/* allocate a bus request for this scatter request */
|
||||
busrequest = hifAllocateBusRequest(device);
|
||||
if (NULL == busrequest) {
|
||||
kfree(pReqPriv->pHifScatterReq);
|
||||
kfree(pReqPriv);
|
||||
break;
|
||||
}
|
||||
/* assign the scatter request to this bus request */
|
||||
busrequest->pScatterReq = pReqPriv;
|
||||
/* point back to the request */
|
||||
pReqPriv->busrequest = busrequest;
|
||||
/* add it to the scatter pool */
|
||||
FreeScatterReq(device,pReqPriv->pHifScatterReq);
|
||||
}
|
||||
|
||||
if (i != MAX_SCATTER_REQUESTS) {
|
||||
status = A_NO_MEMORY;
|
||||
AR_DEBUG_PRINTF(ATH_DEBUG_ERR,("HIF-SCATTER : failed to alloc scatter resources !\n"));
|
||||
break;
|
||||
}
|
||||
|
||||
/* set scatter function pointers */
|
||||
pInfo->pAllocateReqFunc = AllocScatterReq;
|
||||
pInfo->pFreeReqFunc = FreeScatterReq;
|
||||
pInfo->pReadWriteScatterFunc = HifReadWriteScatter;
|
||||
pInfo->MaxScatterEntries = MAX_SCATTER_ENTRIES_PER_REQ;
|
||||
pInfo->MaxTransferSizePerScatterReq = MAX_SCATTER_REQ_TRANSFER_SIZE;
|
||||
|
||||
status = 0;
|
||||
|
||||
} while (false);
|
||||
|
||||
if (status) {
|
||||
CleanupHIFScatterResources(device);
|
||||
}
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
/* clean up scatter support */
|
||||
void CleanupHIFScatterResources(struct hif_device *device)
|
||||
{
|
||||
struct hif_scatter_req_priv *pReqPriv;
|
||||
struct hif_scatter_req *pReq;
|
||||
|
||||
/* empty the free list */
|
||||
|
||||
while (1) {
|
||||
|
||||
pReq = AllocScatterReq(device);
|
||||
|
||||
if (NULL == pReq) {
|
||||
break;
|
||||
}
|
||||
|
||||
pReqPriv = (struct hif_scatter_req_priv *)pReq->HIFPrivate[0];
|
||||
A_ASSERT(pReqPriv != NULL);
|
||||
|
||||
if (pReqPriv->busrequest != NULL) {
|
||||
pReqPriv->busrequest->pScatterReq = NULL;
|
||||
/* free bus request */
|
||||
hifFreeBusRequest(device, pReqPriv->busrequest);
|
||||
pReqPriv->busrequest = NULL;
|
||||
}
|
||||
|
||||
if (pReqPriv->pHifScatterReq != NULL) {
|
||||
kfree(pReqPriv->pHifScatterReq);
|
||||
pReqPriv->pHifScatterReq = NULL;
|
||||
}
|
||||
|
||||
kfree(pReqPriv);
|
||||
}
|
||||
}
|
||||
|
||||
#endif // HIF_LINUX_MMC_SCATTER_SUPPORT
|
||||
File diff suppressed because it is too large
Load Diff
@@ -1,401 +0,0 @@
|
||||
//------------------------------------------------------------------------------
|
||||
// <copyright file="ar6k.h" company="Atheros">
|
||||
// Copyright (c) 2007-2010 Atheros Corporation. All rights reserved.
|
||||
//
|
||||
//
|
||||
// Permission to use, copy, modify, and/or distribute this software for any
|
||||
// purpose with or without fee is hereby granted, provided that the above
|
||||
// copyright notice and this permission notice appear in all copies.
|
||||
//
|
||||
// THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
|
||||
// WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
|
||||
// MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
|
||||
// ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
|
||||
// WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
|
||||
// ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
|
||||
// OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
//
|
||||
//
|
||||
//------------------------------------------------------------------------------
|
||||
//==============================================================================
|
||||
// AR6K device layer that handles register level I/O
|
||||
//
|
||||
// Author(s): ="Atheros"
|
||||
//==============================================================================
|
||||
#ifndef AR6K_H_
|
||||
#define AR6K_H_
|
||||
|
||||
#include "hci_transport_api.h"
|
||||
#include "../htc_debug.h"
|
||||
|
||||
#define AR6K_MAILBOXES 4
|
||||
|
||||
/* HTC runs over mailbox 0 */
|
||||
#define HTC_MAILBOX 0
|
||||
|
||||
#define AR6K_TARGET_DEBUG_INTR_MASK 0x01
|
||||
|
||||
#define OTHER_INTS_ENABLED (INT_STATUS_ENABLE_ERROR_MASK | \
|
||||
INT_STATUS_ENABLE_CPU_MASK | \
|
||||
INT_STATUS_ENABLE_COUNTER_MASK)
|
||||
|
||||
|
||||
//#define MBOXHW_UNIT_TEST 1
|
||||
|
||||
PREPACK struct ar6k_irq_proc_registers {
|
||||
u8 host_int_status;
|
||||
u8 cpu_int_status;
|
||||
u8 error_int_status;
|
||||
u8 counter_int_status;
|
||||
u8 mbox_frame;
|
||||
u8 rx_lookahead_valid;
|
||||
u8 host_int_status2;
|
||||
u8 gmbox_rx_avail;
|
||||
u32 rx_lookahead[2];
|
||||
u32 rx_gmbox_lookahead_alias[2];
|
||||
} POSTPACK;
|
||||
|
||||
#define AR6K_IRQ_PROC_REGS_SIZE sizeof(struct ar6k_irq_proc_registers)
|
||||
|
||||
PREPACK struct ar6k_irq_enable_registers {
|
||||
u8 int_status_enable;
|
||||
u8 cpu_int_status_enable;
|
||||
u8 error_status_enable;
|
||||
u8 counter_int_status_enable;
|
||||
} POSTPACK;
|
||||
|
||||
PREPACK struct ar6k_gmbox_ctrl_registers {
|
||||
u8 int_status_enable;
|
||||
} POSTPACK;
|
||||
|
||||
#define AR6K_IRQ_ENABLE_REGS_SIZE sizeof(struct ar6k_irq_enable_registers)
|
||||
|
||||
#define AR6K_REG_IO_BUFFER_SIZE 32
|
||||
#define AR6K_MAX_REG_IO_BUFFERS 8
|
||||
#define FROM_DMA_BUFFER true
|
||||
#define TO_DMA_BUFFER false
|
||||
#define AR6K_SCATTER_ENTRIES_PER_REQ 16
|
||||
#define AR6K_MAX_TRANSFER_SIZE_PER_SCATTER 16*1024
|
||||
#define AR6K_SCATTER_REQS 4
|
||||
#define AR6K_LEGACY_MAX_WRITE_LENGTH 2048
|
||||
|
||||
#ifndef A_CACHE_LINE_PAD
|
||||
#define A_CACHE_LINE_PAD 128
|
||||
#endif
|
||||
#define AR6K_MIN_SCATTER_ENTRIES_PER_REQ 2
|
||||
#define AR6K_MIN_TRANSFER_SIZE_PER_SCATTER 4*1024
|
||||
|
||||
/* buffers for ASYNC I/O */
|
||||
struct ar6k_async_reg_io_buffer {
|
||||
struct htc_packet HtcPacket; /* we use an HTC packet as a wrapper for our async register-based I/O */
|
||||
u8 _Pad1[A_CACHE_LINE_PAD];
|
||||
u8 Buffer[AR6K_REG_IO_BUFFER_SIZE]; /* cache-line safe with pads around */
|
||||
u8 _Pad2[A_CACHE_LINE_PAD];
|
||||
};
|
||||
|
||||
struct ar6k_gmbox_info {
|
||||
void *pProtocolContext;
|
||||
int (*pMessagePendingCallBack)(void *pContext, u8 LookAheadBytes[], int ValidBytes);
|
||||
int (*pCreditsPendingCallback)(void *pContext, int NumCredits, bool CreditIRQEnabled);
|
||||
void (*pTargetFailureCallback)(void *pContext, int Status);
|
||||
void (*pStateDumpCallback)(void *pContext);
|
||||
bool CreditCountIRQEnabled;
|
||||
};
|
||||
|
||||
struct ar6k_device {
|
||||
A_MUTEX_T Lock;
|
||||
u8 _Pad1[A_CACHE_LINE_PAD];
|
||||
struct ar6k_irq_proc_registers IrqProcRegisters; /* cache-line safe with pads around */
|
||||
u8 _Pad2[A_CACHE_LINE_PAD];
|
||||
struct ar6k_irq_enable_registers IrqEnableRegisters; /* cache-line safe with pads around */
|
||||
u8 _Pad3[A_CACHE_LINE_PAD];
|
||||
void *HIFDevice;
|
||||
u32 BlockSize;
|
||||
u32 BlockMask;
|
||||
struct hif_device_mbox_info MailBoxInfo;
|
||||
HIF_PENDING_EVENTS_FUNC GetPendingEventsFunc;
|
||||
void *HTCContext;
|
||||
struct htc_packet_queue RegisterIOList;
|
||||
struct ar6k_async_reg_io_buffer RegIOBuffers[AR6K_MAX_REG_IO_BUFFERS];
|
||||
void (*TargetFailureCallback)(void *Context);
|
||||
int (*MessagePendingCallback)(void *Context,
|
||||
u32 LookAheads[],
|
||||
int NumLookAheads,
|
||||
bool *pAsyncProc,
|
||||
int *pNumPktsFetched);
|
||||
HIF_DEVICE_IRQ_PROCESSING_MODE HifIRQProcessingMode;
|
||||
HIF_MASK_UNMASK_RECV_EVENT HifMaskUmaskRecvEvent;
|
||||
bool HifAttached;
|
||||
struct hif_device_irq_yield_params HifIRQYieldParams;
|
||||
bool DSRCanYield;
|
||||
int CurrentDSRRecvCount;
|
||||
struct hif_device_scatter_support_info HifScatterInfo;
|
||||
struct dl_list ScatterReqHead;
|
||||
bool ScatterIsVirtual;
|
||||
int MaxRecvBundleSize;
|
||||
int MaxSendBundleSize;
|
||||
struct ar6k_gmbox_info GMboxInfo;
|
||||
bool GMboxEnabled;
|
||||
struct ar6k_gmbox_ctrl_registers GMboxControlRegisters;
|
||||
int RecheckIRQStatusCnt;
|
||||
};
|
||||
|
||||
#define LOCK_AR6K(p) A_MUTEX_LOCK(&(p)->Lock);
|
||||
#define UNLOCK_AR6K(p) A_MUTEX_UNLOCK(&(p)->Lock);
|
||||
#define REF_IRQ_STATUS_RECHECK(p) (p)->RecheckIRQStatusCnt = 1 /* note: no need to lock this, it only gets set */
|
||||
|
||||
int DevSetup(struct ar6k_device *pDev);
|
||||
void DevCleanup(struct ar6k_device *pDev);
|
||||
int DevUnmaskInterrupts(struct ar6k_device *pDev);
|
||||
int DevMaskInterrupts(struct ar6k_device *pDev);
|
||||
int DevPollMboxMsgRecv(struct ar6k_device *pDev,
|
||||
u32 *pLookAhead,
|
||||
int TimeoutMS);
|
||||
int DevRWCompletionHandler(void *context, int status);
|
||||
int DevDsrHandler(void *context);
|
||||
int DevCheckPendingRecvMsgsAsync(void *context);
|
||||
void DevAsyncIrqProcessComplete(struct ar6k_device *pDev);
|
||||
void DevDumpRegisters(struct ar6k_device *pDev,
|
||||
struct ar6k_irq_proc_registers *pIrqProcRegs,
|
||||
struct ar6k_irq_enable_registers *pIrqEnableRegs);
|
||||
|
||||
#define DEV_STOP_RECV_ASYNC true
|
||||
#define DEV_STOP_RECV_SYNC false
|
||||
#define DEV_ENABLE_RECV_ASYNC true
|
||||
#define DEV_ENABLE_RECV_SYNC false
|
||||
int DevStopRecv(struct ar6k_device *pDev, bool ASyncMode);
|
||||
int DevEnableRecv(struct ar6k_device *pDev, bool ASyncMode);
|
||||
int DevEnableInterrupts(struct ar6k_device *pDev);
|
||||
int DevDisableInterrupts(struct ar6k_device *pDev);
|
||||
int DevWaitForPendingRecv(struct ar6k_device *pDev,u32 TimeoutInMs,bool *pbIsRecvPending);
|
||||
|
||||
#define DEV_CALC_RECV_PADDED_LEN(pDev, length) (((length) + (pDev)->BlockMask) & (~((pDev)->BlockMask)))
|
||||
#define DEV_CALC_SEND_PADDED_LEN(pDev, length) DEV_CALC_RECV_PADDED_LEN(pDev,length)
|
||||
#define DEV_IS_LEN_BLOCK_ALIGNED(pDev, length) (((length) % (pDev)->BlockSize) == 0)
|
||||
|
||||
static INLINE int DevSendPacket(struct ar6k_device *pDev, struct htc_packet *pPacket, u32 SendLength) {
|
||||
u32 paddedLength;
|
||||
bool sync = (pPacket->Completion == NULL) ? true : false;
|
||||
int status;
|
||||
|
||||
/* adjust the length to be a multiple of block size if appropriate */
|
||||
paddedLength = DEV_CALC_SEND_PADDED_LEN(pDev, SendLength);
|
||||
|
||||
#if 0
|
||||
if (paddedLength > pPacket->BufferLength) {
|
||||
A_ASSERT(false);
|
||||
if (pPacket->Completion != NULL) {
|
||||
COMPLETE_HTC_PACKET(pPacket,A_EINVAL);
|
||||
return 0;
|
||||
}
|
||||
return A_EINVAL;
|
||||
}
|
||||
#endif
|
||||
|
||||
AR_DEBUG_PRINTF(ATH_DEBUG_SEND,
|
||||
("DevSendPacket, Padded Length: %d Mbox:0x%X (mode:%s)\n",
|
||||
paddedLength,
|
||||
pDev->MailBoxInfo.MboxAddresses[HTC_MAILBOX],
|
||||
sync ? "SYNC" : "ASYNC"));
|
||||
|
||||
status = HIFReadWrite(pDev->HIFDevice,
|
||||
pDev->MailBoxInfo.MboxAddresses[HTC_MAILBOX],
|
||||
pPacket->pBuffer,
|
||||
paddedLength, /* the padded length */
|
||||
sync ? HIF_WR_SYNC_BLOCK_INC : HIF_WR_ASYNC_BLOCK_INC,
|
||||
sync ? NULL : pPacket); /* pass the packet as the context to the HIF request */
|
||||
|
||||
if (sync) {
|
||||
pPacket->Status = status;
|
||||
} else {
|
||||
if (status == A_PENDING) {
|
||||
status = 0;
|
||||
}
|
||||
}
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
static INLINE int DevRecvPacket(struct ar6k_device *pDev, struct htc_packet *pPacket, u32 RecvLength) {
|
||||
u32 paddedLength;
|
||||
int status;
|
||||
bool sync = (pPacket->Completion == NULL) ? true : false;
|
||||
|
||||
/* adjust the length to be a multiple of block size if appropriate */
|
||||
paddedLength = DEV_CALC_RECV_PADDED_LEN(pDev, RecvLength);
|
||||
|
||||
if (paddedLength > pPacket->BufferLength) {
|
||||
A_ASSERT(false);
|
||||
AR_DEBUG_PRINTF(ATH_DEBUG_ERR,
|
||||
("DevRecvPacket, Not enough space for padlen:%d recvlen:%d bufferlen:%d \n",
|
||||
paddedLength,RecvLength,pPacket->BufferLength));
|
||||
if (pPacket->Completion != NULL) {
|
||||
COMPLETE_HTC_PACKET(pPacket,A_EINVAL);
|
||||
return 0;
|
||||
}
|
||||
return A_EINVAL;
|
||||
}
|
||||
|
||||
AR_DEBUG_PRINTF(ATH_DEBUG_RECV,
|
||||
("DevRecvPacket (0x%lX : hdr:0x%X) Padded Length: %d Mbox:0x%X (mode:%s)\n",
|
||||
(unsigned long)pPacket, pPacket->PktInfo.AsRx.ExpectedHdr,
|
||||
paddedLength,
|
||||
pDev->MailBoxInfo.MboxAddresses[HTC_MAILBOX],
|
||||
sync ? "SYNC" : "ASYNC"));
|
||||
|
||||
status = HIFReadWrite(pDev->HIFDevice,
|
||||
pDev->MailBoxInfo.MboxAddresses[HTC_MAILBOX],
|
||||
pPacket->pBuffer,
|
||||
paddedLength,
|
||||
sync ? HIF_RD_SYNC_BLOCK_FIX : HIF_RD_ASYNC_BLOCK_FIX,
|
||||
sync ? NULL : pPacket); /* pass the packet as the context to the HIF request */
|
||||
|
||||
if (sync) {
|
||||
pPacket->Status = status;
|
||||
}
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
#define DEV_CHECK_RECV_YIELD(pDev) \
|
||||
((pDev)->CurrentDSRRecvCount >= (pDev)->HifIRQYieldParams.RecvPacketYieldCount)
|
||||
|
||||
#define IS_DEV_IRQ_PROC_SYNC_MODE(pDev) (HIF_DEVICE_IRQ_SYNC_ONLY == (pDev)->HifIRQProcessingMode)
|
||||
#define IS_DEV_IRQ_PROCESSING_ASYNC_ALLOWED(pDev) ((pDev)->HifIRQProcessingMode != HIF_DEVICE_IRQ_SYNC_ONLY)
|
||||
|
||||
/**************************************************/
|
||||
/****** Scatter Function and Definitions
|
||||
*
|
||||
*
|
||||
*/
|
||||
|
||||
int DevCopyScatterListToFromDMABuffer(struct hif_scatter_req *pReq, bool FromDMA);
|
||||
|
||||
/* copy any READ data back into scatter list */
|
||||
#define DEV_FINISH_SCATTER_OPERATION(pR) \
|
||||
do { \
|
||||
if (!((pR)->CompletionStatus) && \
|
||||
!((pR)->Request & HIF_WRITE) && \
|
||||
((pR)->ScatterMethod == HIF_SCATTER_DMA_BOUNCE)) { \
|
||||
(pR)->CompletionStatus = \
|
||||
DevCopyScatterListToFromDMABuffer((pR), \
|
||||
FROM_DMA_BUFFER); \
|
||||
} \
|
||||
} while (0)
|
||||
|
||||
/* copy any WRITE data to bounce buffer */
|
||||
static INLINE int DEV_PREPARE_SCATTER_OPERATION(struct hif_scatter_req *pReq) {
|
||||
if ((pReq->Request & HIF_WRITE) && (pReq->ScatterMethod == HIF_SCATTER_DMA_BOUNCE)) {
|
||||
return DevCopyScatterListToFromDMABuffer(pReq,TO_DMA_BUFFER);
|
||||
} else {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
int DevSetupMsgBundling(struct ar6k_device *pDev, int MaxMsgsPerTransfer);
|
||||
|
||||
int DevCleanupMsgBundling(struct ar6k_device *pDev);
|
||||
|
||||
#define DEV_GET_MAX_MSG_PER_BUNDLE(pDev) (pDev)->HifScatterInfo.MaxScatterEntries
|
||||
#define DEV_GET_MAX_BUNDLE_LENGTH(pDev) (pDev)->HifScatterInfo.MaxTransferSizePerScatterReq
|
||||
#define DEV_ALLOC_SCATTER_REQ(pDev) \
|
||||
(pDev)->HifScatterInfo.pAllocateReqFunc((pDev)->ScatterIsVirtual ? (pDev) : (pDev)->HIFDevice)
|
||||
|
||||
#define DEV_FREE_SCATTER_REQ(pDev,pR) \
|
||||
(pDev)->HifScatterInfo.pFreeReqFunc((pDev)->ScatterIsVirtual ? (pDev) : (pDev)->HIFDevice,(pR))
|
||||
|
||||
#define DEV_GET_MAX_BUNDLE_RECV_LENGTH(pDev) (pDev)->MaxRecvBundleSize
|
||||
#define DEV_GET_MAX_BUNDLE_SEND_LENGTH(pDev) (pDev)->MaxSendBundleSize
|
||||
|
||||
#define DEV_SCATTER_READ true
|
||||
#define DEV_SCATTER_WRITE false
|
||||
#define DEV_SCATTER_ASYNC true
|
||||
#define DEV_SCATTER_SYNC false
|
||||
int DevSubmitScatterRequest(struct ar6k_device *pDev, struct hif_scatter_req *pScatterReq, bool Read, bool Async);
|
||||
|
||||
#ifdef MBOXHW_UNIT_TEST
|
||||
int DoMboxHWTest(struct ar6k_device *pDev);
|
||||
#endif
|
||||
|
||||
/* completely virtual */
|
||||
struct dev_scatter_dma_virtual_info {
|
||||
u8 *pVirtDmaBuffer; /* dma-able buffer - CPU accessible address */
|
||||
u8 DataArea[1]; /* start of data area */
|
||||
};
|
||||
|
||||
|
||||
|
||||
void DumpAR6KDevState(struct ar6k_device *pDev);
|
||||
|
||||
/**************************************************/
|
||||
/****** GMBOX functions and definitions
|
||||
*
|
||||
*
|
||||
*/
|
||||
|
||||
#ifdef ATH_AR6K_ENABLE_GMBOX
|
||||
|
||||
void DevCleanupGMbox(struct ar6k_device *pDev);
|
||||
int DevSetupGMbox(struct ar6k_device *pDev);
|
||||
int DevCheckGMboxInterrupts(struct ar6k_device *pDev);
|
||||
void DevNotifyGMboxTargetFailure(struct ar6k_device *pDev);
|
||||
|
||||
#else
|
||||
|
||||
/* compiled out */
|
||||
#define DevCleanupGMbox(p)
|
||||
#define DevCheckGMboxInterrupts(p) 0
|
||||
#define DevNotifyGMboxTargetFailure(p)
|
||||
|
||||
static INLINE int DevSetupGMbox(struct ar6k_device *pDev) {
|
||||
pDev->GMboxEnabled = false;
|
||||
return 0;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef ATH_AR6K_ENABLE_GMBOX
|
||||
|
||||
/* GMBOX protocol modules must expose each of these internal APIs */
|
||||
HCI_TRANSPORT_HANDLE GMboxAttachProtocol(struct ar6k_device *pDev, struct hci_transport_config_info *pInfo);
|
||||
int GMboxProtocolInstall(struct ar6k_device *pDev);
|
||||
void GMboxProtocolUninstall(struct ar6k_device *pDev);
|
||||
|
||||
/* API used by GMBOX protocol modules */
|
||||
struct ar6k_device *HTCGetAR6KDevice(void *HTCHandle);
|
||||
#define DEV_GMBOX_SET_PROTOCOL(pDev,recv_callback,credits_pending,failure,statedump,context) \
|
||||
{ \
|
||||
(pDev)->GMboxInfo.pProtocolContext = (context); \
|
||||
(pDev)->GMboxInfo.pMessagePendingCallBack = (recv_callback); \
|
||||
(pDev)->GMboxInfo.pCreditsPendingCallback = (credits_pending); \
|
||||
(pDev)->GMboxInfo.pTargetFailureCallback = (failure); \
|
||||
(pDev)->GMboxInfo.pStateDumpCallback = (statedump); \
|
||||
}
|
||||
|
||||
#define DEV_GMBOX_GET_PROTOCOL(pDev) (pDev)->GMboxInfo.pProtocolContext
|
||||
|
||||
int DevGMboxWrite(struct ar6k_device *pDev, struct htc_packet *pPacket, u32 WriteLength);
|
||||
int DevGMboxRead(struct ar6k_device *pDev, struct htc_packet *pPacket, u32 ReadLength);
|
||||
|
||||
#define PROC_IO_ASYNC true
|
||||
#define PROC_IO_SYNC false
|
||||
typedef enum GMBOX_IRQ_ACTION_TYPE {
|
||||
GMBOX_ACTION_NONE = 0,
|
||||
GMBOX_DISABLE_ALL,
|
||||
GMBOX_ERRORS_IRQ_ENABLE,
|
||||
GMBOX_RECV_IRQ_ENABLE,
|
||||
GMBOX_RECV_IRQ_DISABLE,
|
||||
GMBOX_CREDIT_IRQ_ENABLE,
|
||||
GMBOX_CREDIT_IRQ_DISABLE,
|
||||
} GMBOX_IRQ_ACTION_TYPE;
|
||||
|
||||
int DevGMboxIRQAction(struct ar6k_device *pDev, GMBOX_IRQ_ACTION_TYPE, bool AsyncMode);
|
||||
int DevGMboxReadCreditCounter(struct ar6k_device *pDev, bool AsyncMode, int *pCredits);
|
||||
int DevGMboxReadCreditSize(struct ar6k_device *pDev, int *pCreditSize);
|
||||
int DevGMboxRecvLookAheadPeek(struct ar6k_device *pDev, u8 *pLookAheadBuffer, int *pLookAheadBytes);
|
||||
int DevGMboxSetTargetInterrupt(struct ar6k_device *pDev, int SignalNumber, int AckTimeoutMS);
|
||||
|
||||
#endif
|
||||
|
||||
#endif /*AR6K_H_*/
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -1,38 +0,0 @@
|
||||
//------------------------------------------------------------------------------
|
||||
// <copyright file="htc_debug.h" company="Atheros">
|
||||
// Copyright (c) 2007-2010 Atheros Corporation. All rights reserved.
|
||||
//
|
||||
//
|
||||
// Permission to use, copy, modify, and/or distribute this software for any
|
||||
// purpose with or without fee is hereby granted, provided that the above
|
||||
// copyright notice and this permission notice appear in all copies.
|
||||
//
|
||||
// THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
|
||||
// WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
|
||||
// MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
|
||||
// ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
|
||||
// WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
|
||||
// ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
|
||||
// OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
//
|
||||
//
|
||||
//------------------------------------------------------------------------------
|
||||
//==============================================================================
|
||||
// Author(s): ="Atheros"
|
||||
//==============================================================================
|
||||
#ifndef HTC_DEBUG_H_
|
||||
#define HTC_DEBUG_H_
|
||||
|
||||
#define ATH_MODULE_NAME htc
|
||||
#include "a_debug.h"
|
||||
|
||||
/* ------- Debug related stuff ------- */
|
||||
|
||||
#define ATH_DEBUG_SEND ATH_DEBUG_MAKE_MODULE_MASK(0)
|
||||
#define ATH_DEBUG_RECV ATH_DEBUG_MAKE_MODULE_MASK(1)
|
||||
#define ATH_DEBUG_SYNC ATH_DEBUG_MAKE_MODULE_MASK(2)
|
||||
#define ATH_DEBUG_DUMP ATH_DEBUG_MAKE_MODULE_MASK(3)
|
||||
#define ATH_DEBUG_IRQ ATH_DEBUG_MAKE_MODULE_MASK(4)
|
||||
|
||||
|
||||
#endif /*HTC_DEBUG_H_*/
|
||||
@@ -1,211 +0,0 @@
|
||||
//------------------------------------------------------------------------------
|
||||
// <copyright file="htc_internal.h" company="Atheros">
|
||||
// Copyright (c) 2007-2010 Atheros Corporation. All rights reserved.
|
||||
//
|
||||
//
|
||||
// Permission to use, copy, modify, and/or distribute this software for any
|
||||
// purpose with or without fee is hereby granted, provided that the above
|
||||
// copyright notice and this permission notice appear in all copies.
|
||||
//
|
||||
// THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
|
||||
// WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
|
||||
// MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
|
||||
// ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
|
||||
// WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
|
||||
// ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
|
||||
// OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
//
|
||||
//
|
||||
//------------------------------------------------------------------------------
|
||||
//==============================================================================
|
||||
// Author(s): ="Atheros"
|
||||
//==============================================================================
|
||||
#ifndef _HTC_INTERNAL_H_
|
||||
#define _HTC_INTERNAL_H_
|
||||
|
||||
/* for debugging, uncomment this to capture the last frame header, on frame header
|
||||
* processing errors, the last frame header is dump for comparison */
|
||||
//#define HTC_CAPTURE_LAST_FRAME
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif /* __cplusplus */
|
||||
|
||||
/* Header files */
|
||||
|
||||
#include "a_config.h"
|
||||
#include "athdefs.h"
|
||||
#include "a_osapi.h"
|
||||
#include "htc_debug.h"
|
||||
#include "htc.h"
|
||||
#include "htc_api.h"
|
||||
#include "bmi_msg.h"
|
||||
#include "hif.h"
|
||||
#include "AR6000/ar6k.h"
|
||||
|
||||
/* HTC operational parameters */
|
||||
#define HTC_TARGET_RESPONSE_TIMEOUT 2000 /* in ms */
|
||||
#define HTC_TARGET_DEBUG_INTR_MASK 0x01
|
||||
#define HTC_TARGET_CREDIT_INTR_MASK 0xF0
|
||||
|
||||
#define HTC_HOST_MAX_MSG_PER_BUNDLE 8
|
||||
#define HTC_MIN_HTC_MSGS_TO_BUNDLE 2
|
||||
|
||||
/* packet flags */
|
||||
|
||||
#define HTC_RX_PKT_IGNORE_LOOKAHEAD (1 << 0)
|
||||
#define HTC_RX_PKT_REFRESH_HDR (1 << 1)
|
||||
#define HTC_RX_PKT_PART_OF_BUNDLE (1 << 2)
|
||||
#define HTC_RX_PKT_NO_RECYCLE (1 << 3)
|
||||
|
||||
/* scatter request flags */
|
||||
|
||||
#define HTC_SCATTER_REQ_FLAGS_PARTIAL_BUNDLE (1 << 0)
|
||||
|
||||
struct htc_endpoint {
|
||||
HTC_ENDPOINT_ID Id;
|
||||
HTC_SERVICE_ID ServiceID; /* service ID this endpoint is bound to
|
||||
non-zero value means this endpoint is in use */
|
||||
struct htc_packet_queue TxQueue; /* HTC frame buffer TX queue */
|
||||
struct htc_packet_queue RxBuffers; /* HTC frame buffer RX list */
|
||||
struct htc_endpoint_credit_dist CreditDist; /* credit distribution structure (exposed to driver layer) */
|
||||
struct htc_ep_callbacks EpCallBacks; /* callbacks associated with this endpoint */
|
||||
int MaxTxQueueDepth; /* max depth of the TX queue before we need to
|
||||
call driver's full handler */
|
||||
int MaxMsgLength; /* max length of endpoint message */
|
||||
int TxProcessCount; /* reference count to continue tx processing */
|
||||
struct htc_packet_queue RecvIndicationQueue; /* recv packets ready to be indicated */
|
||||
int RxProcessCount; /* reference count to allow single processing context */
|
||||
struct htc_target *target; /* back pointer to target */
|
||||
u8 SeqNo; /* TX seq no (helpful) for debugging */
|
||||
u32 LocalConnectionFlags; /* local connection flags */
|
||||
struct htc_endpoint_stats EndPointStats; /* endpoint statistics */
|
||||
};
|
||||
|
||||
#define INC_HTC_EP_STAT(p,stat,count) (p)->EndPointStats.stat += (count);
|
||||
#define HTC_SERVICE_TX_PACKET_TAG HTC_TX_PACKET_TAG_INTERNAL
|
||||
|
||||
#define NUM_CONTROL_BUFFERS 8
|
||||
#define NUM_CONTROL_TX_BUFFERS 2
|
||||
#define NUM_CONTROL_RX_BUFFERS (NUM_CONTROL_BUFFERS - NUM_CONTROL_TX_BUFFERS)
|
||||
|
||||
struct htc_control_buffer {
|
||||
struct htc_packet HtcPacket;
|
||||
u8 *Buffer;
|
||||
};
|
||||
|
||||
#define HTC_RECV_WAIT_BUFFERS (1 << 0)
|
||||
#define HTC_OP_STATE_STOPPING (1 << 0)
|
||||
|
||||
/* our HTC target state */
|
||||
struct htc_target {
|
||||
struct htc_endpoint EndPoint[ENDPOINT_MAX];
|
||||
struct htc_control_buffer HTCControlBuffers[NUM_CONTROL_BUFFERS];
|
||||
struct htc_endpoint_credit_dist *EpCreditDistributionListHead;
|
||||
struct htc_packet_queue ControlBufferTXFreeList;
|
||||
struct htc_packet_queue ControlBufferRXFreeList;
|
||||
HTC_CREDIT_DIST_CALLBACK DistributeCredits;
|
||||
HTC_CREDIT_INIT_CALLBACK InitCredits;
|
||||
void *pCredDistContext;
|
||||
int TargetCredits;
|
||||
unsigned int TargetCreditSize;
|
||||
A_MUTEX_T HTCLock;
|
||||
A_MUTEX_T HTCRxLock;
|
||||
A_MUTEX_T HTCTxLock;
|
||||
struct ar6k_device Device; /* AR6K - specific state */
|
||||
u32 OpStateFlags;
|
||||
u32 RecvStateFlags;
|
||||
HTC_ENDPOINT_ID EpWaitingForBuffers;
|
||||
bool TargetFailure;
|
||||
#ifdef HTC_CAPTURE_LAST_FRAME
|
||||
struct htc_frame_hdr LastFrameHdr; /* useful for debugging */
|
||||
u8 LastTrailer[256];
|
||||
u8 LastTrailerLength;
|
||||
#endif
|
||||
struct htc_init_info HTCInitInfo;
|
||||
u8 HTCTargetVersion;
|
||||
int MaxMsgPerBundle; /* max messages per bundle for HTC */
|
||||
bool SendBundlingEnabled; /* run time enable for send bundling (dynamic) */
|
||||
int RecvBundlingEnabled; /* run time enable for recv bundling (dynamic) */
|
||||
};
|
||||
|
||||
#define HTC_STOPPING(t) ((t)->OpStateFlags & HTC_OP_STATE_STOPPING)
|
||||
#define LOCK_HTC(t) A_MUTEX_LOCK(&(t)->HTCLock);
|
||||
#define UNLOCK_HTC(t) A_MUTEX_UNLOCK(&(t)->HTCLock);
|
||||
#define LOCK_HTC_RX(t) A_MUTEX_LOCK(&(t)->HTCRxLock);
|
||||
#define UNLOCK_HTC_RX(t) A_MUTEX_UNLOCK(&(t)->HTCRxLock);
|
||||
#define LOCK_HTC_TX(t) A_MUTEX_LOCK(&(t)->HTCTxLock);
|
||||
#define UNLOCK_HTC_TX(t) A_MUTEX_UNLOCK(&(t)->HTCTxLock);
|
||||
|
||||
#define GET_HTC_TARGET_FROM_HANDLE(hnd) ((struct htc_target *)(hnd))
|
||||
#define HTC_RECYCLE_RX_PKT(target,p,e) \
|
||||
{ \
|
||||
if ((p)->PktInfo.AsRx.HTCRxFlags & HTC_RX_PKT_NO_RECYCLE) { \
|
||||
HTC_PACKET_RESET_RX(pPacket); \
|
||||
pPacket->Status = A_ECANCELED; \
|
||||
(e)->EpCallBacks.EpRecv((e)->EpCallBacks.pContext, \
|
||||
(p)); \
|
||||
} else { \
|
||||
HTC_PACKET_RESET_RX(pPacket); \
|
||||
HTCAddReceivePkt((HTC_HANDLE)(target),(p)); \
|
||||
} \
|
||||
}
|
||||
|
||||
/* internal HTC functions */
|
||||
void HTCControlTxComplete(void *Context, struct htc_packet *pPacket);
|
||||
void HTCControlRecv(void *Context, struct htc_packet *pPacket);
|
||||
int HTCWaitforControlMessage(struct htc_target *target, struct htc_packet **ppControlPacket);
|
||||
struct htc_packet *HTCAllocControlBuffer(struct htc_target *target, struct htc_packet_queue *pList);
|
||||
void HTCFreeControlBuffer(struct htc_target *target, struct htc_packet *pPacket, struct htc_packet_queue *pList);
|
||||
int HTCIssueSend(struct htc_target *target, struct htc_packet *pPacket);
|
||||
void HTCRecvCompleteHandler(void *Context, struct htc_packet *pPacket);
|
||||
int HTCRecvMessagePendingHandler(void *Context, u32 MsgLookAheads[], int NumLookAheads, bool *pAsyncProc, int *pNumPktsFetched);
|
||||
void HTCProcessCreditRpt(struct htc_target *target, HTC_CREDIT_REPORT *pRpt, int NumEntries, HTC_ENDPOINT_ID FromEndpoint);
|
||||
int HTCSendSetupComplete(struct htc_target *target);
|
||||
void HTCFlushRecvBuffers(struct htc_target *target);
|
||||
void HTCFlushSendPkts(struct htc_target *target);
|
||||
|
||||
#ifdef ATH_DEBUG_MODULE
|
||||
void DumpCreditDist(struct htc_endpoint_credit_dist *pEPDist);
|
||||
void DumpCreditDistStates(struct htc_target *target);
|
||||
void DebugDumpBytes(u8 *buffer, u16 length, char *pDescription);
|
||||
#endif
|
||||
|
||||
static INLINE struct htc_packet *HTC_ALLOC_CONTROL_TX(struct htc_target *target) {
|
||||
struct htc_packet *pPacket = HTCAllocControlBuffer(target,&target->ControlBufferTXFreeList);
|
||||
if (pPacket != NULL) {
|
||||
/* set payload pointer area with some headroom */
|
||||
pPacket->pBuffer = pPacket->pBufferStart + HTC_HDR_LENGTH;
|
||||
}
|
||||
return pPacket;
|
||||
}
|
||||
|
||||
#define HTC_FREE_CONTROL_TX(t,p) HTCFreeControlBuffer((t),(p),&(t)->ControlBufferTXFreeList)
|
||||
#define HTC_ALLOC_CONTROL_RX(t) HTCAllocControlBuffer((t),&(t)->ControlBufferRXFreeList)
|
||||
#define HTC_FREE_CONTROL_RX(t,p) \
|
||||
{ \
|
||||
HTC_PACKET_RESET_RX(p); \
|
||||
HTCFreeControlBuffer((t),(p),&(t)->ControlBufferRXFreeList); \
|
||||
}
|
||||
|
||||
#define HTC_PREPARE_SEND_PKT(pP,sendflags,ctrl0,ctrl1) \
|
||||
{ \
|
||||
u8 *pHdrBuf; \
|
||||
(pP)->pBuffer -= HTC_HDR_LENGTH; \
|
||||
pHdrBuf = (pP)->pBuffer; \
|
||||
A_SET_UINT16_FIELD(pHdrBuf,struct htc_frame_hdr,PayloadLen,(u16)(pP)->ActualLength); \
|
||||
A_SET_UINT8_FIELD(pHdrBuf,struct htc_frame_hdr,Flags,(sendflags)); \
|
||||
A_SET_UINT8_FIELD(pHdrBuf,struct htc_frame_hdr,EndpointID, (u8)(pP)->Endpoint); \
|
||||
A_SET_UINT8_FIELD(pHdrBuf,struct htc_frame_hdr,ControlBytes[0], (u8)(ctrl0)); \
|
||||
A_SET_UINT8_FIELD(pHdrBuf,struct htc_frame_hdr,ControlBytes[1], (u8)(ctrl1)); \
|
||||
}
|
||||
|
||||
#define HTC_UNPREPARE_SEND_PKT(pP) \
|
||||
(pP)->pBuffer += HTC_HDR_LENGTH; \
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* _HTC_INTERNAL_H_ */
|
||||
File diff suppressed because it is too large
Load Diff
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user