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Merge 3.12-rc4 into tty-next
We want the tty fixes in this branch as well. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Greg Kroah-Hartman
@@ -6,6 +6,8 @@ capability.txt
|
||||
- Generic Block Device Capability (/sys/block/<device>/capability)
|
||||
cfq-iosched.txt
|
||||
- CFQ IO scheduler tunables
|
||||
cmdline-partition.txt
|
||||
- how to specify block device partitions on kernel command line
|
||||
data-integrity.txt
|
||||
- Block data integrity
|
||||
deadline-iosched.txt
|
||||
|
||||
@@ -1,9 +1,9 @@
|
||||
Embedded device command line partition
|
||||
Embedded device command line partition parsing
|
||||
=====================================================================
|
||||
|
||||
Read block device partition table from command line.
|
||||
The partition used for fixed block device (eMMC) embedded device.
|
||||
It is no MBR, save storage space. Bootloader can be easily accessed
|
||||
Support for reading the block device partition table from the command line.
|
||||
It is typically used for fixed block (eMMC) embedded devices.
|
||||
It has no MBR, so saves storage space. Bootloader can be easily accessed
|
||||
by absolute address of data on the block device.
|
||||
Users can easily change the partition.
|
||||
|
||||
|
||||
@@ -9,12 +9,15 @@ compulsory and any optional properties, common to all SD/MMC drivers, as
|
||||
described in mmc.txt, can be used. Additionally the following tmio_mmc-specific
|
||||
optional bindings can be used.
|
||||
|
||||
Required properties:
|
||||
- compatible: "renesas,sdhi-shmobile" - a generic sh-mobile SDHI unit
|
||||
"renesas,sdhi-sh7372" - SDHI IP on SH7372 SoC
|
||||
"renesas,sdhi-sh73a0" - SDHI IP on SH73A0 SoC
|
||||
"renesas,sdhi-r8a73a4" - SDHI IP on R8A73A4 SoC
|
||||
"renesas,sdhi-r8a7740" - SDHI IP on R8A7740 SoC
|
||||
"renesas,sdhi-r8a7778" - SDHI IP on R8A7778 SoC
|
||||
"renesas,sdhi-r8a7779" - SDHI IP on R8A7779 SoC
|
||||
"renesas,sdhi-r8a7790" - SDHI IP on R8A7790 SoC
|
||||
|
||||
Optional properties:
|
||||
- toshiba,mmc-wrprotect-disable: write-protect detection is unavailable
|
||||
|
||||
When used with Renesas SDHI hardware, the following compatibility strings
|
||||
configure various model-specific properties:
|
||||
|
||||
"renesas,sh7372-sdhi": (default) compatible with SH7372
|
||||
"renesas,r8a7740-sdhi": compatible with R8A7740: certain MMC/SD commands have to
|
||||
wait for the interface to become idle.
|
||||
|
||||
@@ -86,6 +86,7 @@ General Properties:
|
||||
|
||||
Clock Properties:
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||||
|
||||
- fsl,cksel Timer reference clock source.
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||||
- fsl,tclk-period Timer reference clock period in nanoseconds.
|
||||
- fsl,tmr-prsc Prescaler, divides the output clock.
|
||||
- fsl,tmr-add Frequency compensation value.
|
||||
@@ -97,7 +98,7 @@ Clock Properties:
|
||||
clock. You must choose these carefully for the clock to work right.
|
||||
Here is how to figure good values:
|
||||
|
||||
TimerOsc = system clock MHz
|
||||
TimerOsc = selected reference clock MHz
|
||||
tclk_period = desired clock period nanoseconds
|
||||
NominalFreq = 1000 / tclk_period MHz
|
||||
FreqDivRatio = TimerOsc / NominalFreq (must be greater that 1.0)
|
||||
@@ -114,6 +115,20 @@ Clock Properties:
|
||||
Pulse Per Second (PPS) signal, since this will be offered to the PPS
|
||||
subsystem to synchronize the Linux clock.
|
||||
|
||||
Reference clock source is determined by the value, which is holded
|
||||
in CKSEL bits in TMR_CTRL register. "fsl,cksel" property keeps the
|
||||
value, which will be directly written in those bits, that is why,
|
||||
according to reference manual, the next clock sources can be used:
|
||||
|
||||
<0> - external high precision timer reference clock (TSEC_TMR_CLK
|
||||
input is used for this purpose);
|
||||
<1> - eTSEC system clock;
|
||||
<2> - eTSEC1 transmit clock;
|
||||
<3> - RTC clock input.
|
||||
|
||||
When this attribute is not used, eTSEC system clock will serve as
|
||||
IEEE 1588 timer reference clock.
|
||||
|
||||
Example:
|
||||
|
||||
ptp_clock@24E00 {
|
||||
@@ -121,6 +136,7 @@ Example:
|
||||
reg = <0x24E00 0xB0>;
|
||||
interrupts = <12 0x8 13 0x8>;
|
||||
interrupt-parent = < &ipic >;
|
||||
fsl,cksel = <1>;
|
||||
fsl,tclk-period = <10>;
|
||||
fsl,tmr-prsc = <100>;
|
||||
fsl,tmr-add = <0x999999A4>;
|
||||
|
||||
@@ -480,6 +480,10 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
|
||||
Format: <io>,<irq>,<mode>
|
||||
See header of drivers/net/hamradio/baycom_ser_hdx.c.
|
||||
|
||||
blkdevparts= Manual partition parsing of block device(s) for
|
||||
embedded devices based on command line input.
|
||||
See Documentation/block/cmdline-partition.txt
|
||||
|
||||
boot_delay= Milliseconds to delay each printk during boot.
|
||||
Values larger than 10 seconds (10000) are changed to
|
||||
no delay (0).
|
||||
@@ -1357,7 +1361,7 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
|
||||
pages. In the event, a node is too small to have both
|
||||
kernelcore and Movable pages, kernelcore pages will
|
||||
take priority and other nodes will have a larger number
|
||||
of kernelcore pages. The Movable zone is used for the
|
||||
of Movable pages. The Movable zone is used for the
|
||||
allocation of pages that may be reclaimed or moved
|
||||
by the page migration subsystem. This means that
|
||||
HugeTLB pages may not be allocated from this zone.
|
||||
|
||||
+17
-3
@@ -824,15 +824,21 @@ S: Maintained
|
||||
F: arch/arm/mach-gemini/
|
||||
|
||||
ARM/CSR SIRFPRIMA2 MACHINE SUPPORT
|
||||
M: Barry Song <baohua.song@csr.com>
|
||||
M: Barry Song <baohua@kernel.org>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/baohua/linux.git
|
||||
S: Maintained
|
||||
F: arch/arm/mach-prima2/
|
||||
F: drivers/clk/clk-prima2.c
|
||||
F: drivers/clocksource/timer-prima2.c
|
||||
F: drivers/clocksource/timer-marco.c
|
||||
F: drivers/dma/sirf-dma.c
|
||||
F: drivers/i2c/busses/i2c-sirf.c
|
||||
F: drivers/input/misc/sirfsoc-onkey.c
|
||||
F: drivers/irqchip/irq-sirfsoc.c
|
||||
F: drivers/mmc/host/sdhci-sirf.c
|
||||
F: drivers/pinctrl/sirf/
|
||||
F: drivers/rtc/rtc-sirfsoc.c
|
||||
F: drivers/spi/spi-sirf.c
|
||||
|
||||
ARM/EBSA110 MACHINE SUPPORT
|
||||
@@ -4470,6 +4476,13 @@ L: linux-serial@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/tty/serial/ioc3_serial.c
|
||||
|
||||
IOMMU DRIVERS
|
||||
M: Joerg Roedel <joro@8bytes.org>
|
||||
L: iommu@lists.linux-foundation.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu.git
|
||||
S: Maintained
|
||||
F: drivers/iommu/
|
||||
|
||||
IP MASQUERADING
|
||||
M: Juanjo Ciarlante <jjciarla@raiz.uncu.edu.ar>
|
||||
S: Maintained
|
||||
@@ -7271,9 +7284,9 @@ F: include/linux/sched.h
|
||||
F: include/uapi/linux/sched.h
|
||||
|
||||
SCORE ARCHITECTURE
|
||||
M: Chen Liqin <liqin.chen@sunplusct.com>
|
||||
M: Chen Liqin <liqin.linux@gmail.com>
|
||||
M: Lennox Wu <lennox.wu@gmail.com>
|
||||
W: http://www.sunplusct.com
|
||||
W: http://www.sunplus.com
|
||||
S: Supported
|
||||
F: arch/score/
|
||||
|
||||
@@ -9378,6 +9391,7 @@ F: arch/arm64/include/asm/xen/
|
||||
|
||||
XEN NETWORK BACKEND DRIVER
|
||||
M: Ian Campbell <ian.campbell@citrix.com>
|
||||
M: Wei Liu <wei.liu2@citrix.com>
|
||||
L: xen-devel@lists.xenproject.org (moderated for non-subscribers)
|
||||
L: netdev@vger.kernel.org
|
||||
S: Supported
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
VERSION = 3
|
||||
PATCHLEVEL = 12
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc3
|
||||
EXTRAVERSION = -rc4
|
||||
NAME = One Giant Leap for Frogkind
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
||||
@@ -45,7 +45,14 @@ static inline int arch_spin_trylock(arch_spinlock_t *lock)
|
||||
|
||||
static inline void arch_spin_unlock(arch_spinlock_t *lock)
|
||||
{
|
||||
lock->slock = __ARCH_SPIN_LOCK_UNLOCKED__;
|
||||
unsigned int tmp = __ARCH_SPIN_LOCK_UNLOCKED__;
|
||||
|
||||
__asm__ __volatile__(
|
||||
" ex %0, [%1] \n"
|
||||
: "+r" (tmp)
|
||||
: "r"(&(lock->slock))
|
||||
: "memory");
|
||||
|
||||
smp_mb();
|
||||
}
|
||||
|
||||
|
||||
@@ -43,7 +43,7 @@
|
||||
* Because it essentially checks if buffer end is within limit and @len is
|
||||
* non-ngeative, which implies that buffer start will be within limit too.
|
||||
*
|
||||
* The reason for rewriting being, for majorit yof cases, @len is generally
|
||||
* The reason for rewriting being, for majority of cases, @len is generally
|
||||
* compile time constant, causing first sub-expression to be compile time
|
||||
* subsumed.
|
||||
*
|
||||
@@ -53,7 +53,7 @@
|
||||
*
|
||||
*/
|
||||
#define __user_ok(addr, sz) (((sz) <= TASK_SIZE) && \
|
||||
(((addr)+(sz)) <= get_fs()))
|
||||
((addr) <= (get_fs() - (sz))))
|
||||
#define __access_ok(addr, sz) (unlikely(__kernel_ok) || \
|
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likely(__user_ok((addr), (sz))))
|
||||
|
||||
|
||||
+13
-12
@@ -101,7 +101,6 @@ SYSCALL_DEFINE0(rt_sigreturn)
|
||||
{
|
||||
struct rt_sigframe __user *sf;
|
||||
unsigned int magic;
|
||||
int err;
|
||||
struct pt_regs *regs = current_pt_regs();
|
||||
|
||||
/* Always make any pending restarted system calls return -EINTR */
|
||||
@@ -119,15 +118,16 @@ SYSCALL_DEFINE0(rt_sigreturn)
|
||||
if (!access_ok(VERIFY_READ, sf, sizeof(*sf)))
|
||||
goto badframe;
|
||||
|
||||
err = restore_usr_regs(regs, sf);
|
||||
err |= __get_user(magic, &sf->sigret_magic);
|
||||
if (err)
|
||||
if (__get_user(magic, &sf->sigret_magic))
|
||||
goto badframe;
|
||||
|
||||
if (unlikely(is_do_ss_needed(magic)))
|
||||
if (restore_altstack(&sf->uc.uc_stack))
|
||||
goto badframe;
|
||||
|
||||
if (restore_usr_regs(regs, sf))
|
||||
goto badframe;
|
||||
|
||||
/* Don't restart from sigreturn */
|
||||
syscall_wont_restart(regs);
|
||||
|
||||
@@ -190,6 +190,15 @@ setup_rt_frame(int signo, struct k_sigaction *ka, siginfo_t *info,
|
||||
if (!sf)
|
||||
return 1;
|
||||
|
||||
/*
|
||||
* w/o SA_SIGINFO, struct ucontext is partially populated (only
|
||||
* uc_mcontext/uc_sigmask) for kernel's normal user state preservation
|
||||
* during signal handler execution. This works for SA_SIGINFO as well
|
||||
* although the semantics are now overloaded (the same reg state can be
|
||||
* inspected by userland: but are they allowed to fiddle with it ?
|
||||
*/
|
||||
err |= stash_usr_regs(sf, regs, set);
|
||||
|
||||
/*
|
||||
* SA_SIGINFO requires 3 args to signal handler:
|
||||
* #1: sig-no (common to any handler)
|
||||
@@ -213,14 +222,6 @@ setup_rt_frame(int signo, struct k_sigaction *ka, siginfo_t *info,
|
||||
magic = MAGIC_SIGALTSTK;
|
||||
}
|
||||
|
||||
/*
|
||||
* w/o SA_SIGINFO, struct ucontext is partially populated (only
|
||||
* uc_mcontext/uc_sigmask) for kernel's normal user state preservation
|
||||
* during signal handler execution. This works for SA_SIGINFO as well
|
||||
* although the semantics are now overloaded (the same reg state can be
|
||||
* inspected by userland: but are they allowed to fiddle with it ?
|
||||
*/
|
||||
err |= stash_usr_regs(sf, regs, set);
|
||||
err |= __put_user(magic, &sf->sigret_magic);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
@@ -227,12 +227,9 @@ void __attribute__((weak)) arc_local_timer_setup(unsigned int cpu)
|
||||
{
|
||||
struct clock_event_device *clk = &per_cpu(arc_clockevent_device, cpu);
|
||||
|
||||
clockevents_calc_mult_shift(clk, arc_get_core_freq(), 5);
|
||||
|
||||
clk->max_delta_ns = clockevent_delta2ns(ARC_TIMER_MAX, clk);
|
||||
clk->cpumask = cpumask_of(cpu);
|
||||
|
||||
clockevents_register_device(clk);
|
||||
clockevents_config_and_register(clk, arc_get_core_freq(),
|
||||
0, ARC_TIMER_MAX);
|
||||
|
||||
/*
|
||||
* setup the per-cpu timer IRQ handler - for all cpus
|
||||
|
||||
@@ -245,6 +245,12 @@ int misaligned_fixup(unsigned long address, struct pt_regs *regs,
|
||||
regs->status32 &= ~STATUS_DE_MASK;
|
||||
} else {
|
||||
regs->ret += state.instr_len;
|
||||
|
||||
/* handle zero-overhead-loop */
|
||||
if ((regs->ret == regs->lp_end) && (regs->lp_count)) {
|
||||
regs->ret = regs->lp_start;
|
||||
regs->lp_count--;
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
@@ -41,6 +41,8 @@ dtb-$(CONFIG_ARCH_AT91) += sama5d33ek.dtb
|
||||
dtb-$(CONFIG_ARCH_AT91) += sama5d34ek.dtb
|
||||
dtb-$(CONFIG_ARCH_AT91) += sama5d35ek.dtb
|
||||
|
||||
dtb-$(CONFIG_ARCH_ATLAS6) += atlas6-evb.dtb
|
||||
|
||||
dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb
|
||||
dtb-$(CONFIG_ARCH_BCM) += bcm11351-brt.dtb \
|
||||
bcm28155-ap.dtb
|
||||
|
||||
@@ -27,6 +27,25 @@
|
||||
};
|
||||
|
||||
soc {
|
||||
ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
|
||||
MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>;
|
||||
|
||||
pcie-controller {
|
||||
status = "okay";
|
||||
|
||||
/* Connected to Marvell SATA controller */
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Connected to FL1009 USB 3.0 controller */
|
||||
pcie@2,0 {
|
||||
/* Port 1, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
internal-regs {
|
||||
serial@12000 {
|
||||
clock-frequency = <200000000>;
|
||||
@@ -57,6 +76,11 @@
|
||||
marvell,pins = "mpp56";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
poweroff: poweroff {
|
||||
marvell,pins = "mpp8";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
};
|
||||
|
||||
mdio {
|
||||
@@ -89,22 +113,6 @@
|
||||
pwm_polarity = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
pcie-controller {
|
||||
status = "okay";
|
||||
|
||||
/* Connected to Marvell SATA controller */
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Connected to FL1009 USB 3.0 controller */
|
||||
pcie@2,0 {
|
||||
/* Port 1, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@@ -160,7 +168,7 @@
|
||||
button@1 {
|
||||
label = "Power Button";
|
||||
linux,code = <116>; /* KEY_POWER */
|
||||
gpios = <&gpio1 30 1>;
|
||||
gpios = <&gpio1 30 0>;
|
||||
};
|
||||
|
||||
button@2 {
|
||||
@@ -176,4 +184,11 @@
|
||||
};
|
||||
};
|
||||
|
||||
gpio_poweroff {
|
||||
compatible = "gpio-poweroff";
|
||||
pinctrl-0 = <&poweroff>;
|
||||
pinctrl-names = "default";
|
||||
gpios = <&gpio0 8 1>;
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
@@ -70,6 +70,8 @@
|
||||
|
||||
timer@20300 {
|
||||
compatible = "marvell,armada-xp-timer";
|
||||
clocks = <&coreclk 2>, <&refclk>;
|
||||
clock-names = "nbclk", "fixed";
|
||||
};
|
||||
|
||||
coreclk: mvebu-sar@18230 {
|
||||
@@ -169,4 +171,13 @@
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
clocks {
|
||||
/* 25 MHz reference crystal */
|
||||
refclk: oscillator {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <25000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@@ -190,12 +190,12 @@
|
||||
AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA8 periph A */
|
||||
};
|
||||
|
||||
pinctrl_uart2_rts: uart2_rts-0 {
|
||||
pinctrl_usart2_rts: usart2_rts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */
|
||||
};
|
||||
|
||||
pinctrl_uart2_cts: uart2_cts-0 {
|
||||
pinctrl_usart2_cts: usart2_cts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */
|
||||
};
|
||||
@@ -556,6 +556,7 @@
|
||||
interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(0)>;
|
||||
dma-names = "rxtx";
|
||||
pinctrl-names = "default";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
@@ -567,6 +568,7 @@
|
||||
interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(0)>;
|
||||
dma-names = "rxtx";
|
||||
pinctrl-names = "default";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
|
||||
@@ -181,6 +181,8 @@
|
||||
interrupts = <17>;
|
||||
fifosize = <128>;
|
||||
clocks = <&clks 13>;
|
||||
sirf,uart-dma-rx-channel = <21>;
|
||||
sirf,uart-dma-tx-channel = <2>;
|
||||
};
|
||||
|
||||
uart1: uart@b0060000 {
|
||||
@@ -199,6 +201,8 @@
|
||||
interrupts = <19>;
|
||||
fifosize = <128>;
|
||||
clocks = <&clks 15>;
|
||||
sirf,uart-dma-rx-channel = <6>;
|
||||
sirf,uart-dma-tx-channel = <7>;
|
||||
};
|
||||
|
||||
usp0: usp@b0080000 {
|
||||
@@ -206,7 +210,10 @@
|
||||
compatible = "sirf,prima2-usp";
|
||||
reg = <0xb0080000 0x10000>;
|
||||
interrupts = <20>;
|
||||
fifosize = <128>;
|
||||
clocks = <&clks 28>;
|
||||
sirf,usp-dma-rx-channel = <17>;
|
||||
sirf,usp-dma-tx-channel = <18>;
|
||||
};
|
||||
|
||||
usp1: usp@b0090000 {
|
||||
@@ -214,7 +221,10 @@
|
||||
compatible = "sirf,prima2-usp";
|
||||
reg = <0xb0090000 0x10000>;
|
||||
interrupts = <21>;
|
||||
fifosize = <128>;
|
||||
clocks = <&clks 29>;
|
||||
sirf,usp-dma-rx-channel = <14>;
|
||||
sirf,usp-dma-tx-channel = <15>;
|
||||
};
|
||||
|
||||
dmac0: dma-controller@b00b0000 {
|
||||
@@ -237,6 +247,8 @@
|
||||
compatible = "sirf,prima2-vip";
|
||||
reg = <0xb00C0000 0x10000>;
|
||||
clocks = <&clks 31>;
|
||||
interrupts = <14>;
|
||||
sirf,vip-dma-rx-channel = <16>;
|
||||
};
|
||||
|
||||
spi0: spi@b00d0000 {
|
||||
|
||||
@@ -13,6 +13,7 @@
|
||||
cpu@0 {
|
||||
device_type = "cpu";
|
||||
compatible = "marvell,feroceon";
|
||||
reg = <0>;
|
||||
clocks = <&core_clk 1>, <&core_clk 3>, <&gate_clk 11>;
|
||||
clock-names = "cpu_clk", "ddrclk", "powersave";
|
||||
};
|
||||
@@ -167,7 +168,7 @@
|
||||
xor@60900 {
|
||||
compatible = "marvell,orion-xor";
|
||||
reg = <0x60900 0x100
|
||||
0xd0B00 0x100>;
|
||||
0x60B00 0x100>;
|
||||
status = "okay";
|
||||
clocks = <&gate_clk 16>;
|
||||
|
||||
|
||||
@@ -171,7 +171,8 @@
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0xb0000000 0xb0000000 0x180000>;
|
||||
ranges = <0xb0000000 0xb0000000 0x180000>,
|
||||
<0x56000000 0x56000000 0x1b00000>;
|
||||
|
||||
timer@b0020000 {
|
||||
compatible = "sirf,prima2-tick";
|
||||
@@ -196,25 +197,32 @@
|
||||
uart0: uart@b0050000 {
|
||||
cell-index = <0>;
|
||||
compatible = "sirf,prima2-uart";
|
||||
reg = <0xb0050000 0x10000>;
|
||||
reg = <0xb0050000 0x1000>;
|
||||
interrupts = <17>;
|
||||
fifosize = <128>;
|
||||
clocks = <&clks 13>;
|
||||
sirf,uart-dma-rx-channel = <21>;
|
||||
sirf,uart-dma-tx-channel = <2>;
|
||||
};
|
||||
|
||||
uart1: uart@b0060000 {
|
||||
cell-index = <1>;
|
||||
compatible = "sirf,prima2-uart";
|
||||
reg = <0xb0060000 0x10000>;
|
||||
reg = <0xb0060000 0x1000>;
|
||||
interrupts = <18>;
|
||||
fifosize = <32>;
|
||||
clocks = <&clks 14>;
|
||||
};
|
||||
|
||||
uart2: uart@b0070000 {
|
||||
cell-index = <2>;
|
||||
compatible = "sirf,prima2-uart";
|
||||
reg = <0xb0070000 0x10000>;
|
||||
reg = <0xb0070000 0x1000>;
|
||||
interrupts = <19>;
|
||||
fifosize = <128>;
|
||||
clocks = <&clks 15>;
|
||||
sirf,uart-dma-rx-channel = <6>;
|
||||
sirf,uart-dma-tx-channel = <7>;
|
||||
};
|
||||
|
||||
usp0: usp@b0080000 {
|
||||
@@ -222,7 +230,10 @@
|
||||
compatible = "sirf,prima2-usp";
|
||||
reg = <0xb0080000 0x10000>;
|
||||
interrupts = <20>;
|
||||
fifosize = <128>;
|
||||
clocks = <&clks 28>;
|
||||
sirf,usp-dma-rx-channel = <17>;
|
||||
sirf,usp-dma-tx-channel = <18>;
|
||||
};
|
||||
|
||||
usp1: usp@b0090000 {
|
||||
@@ -230,7 +241,10 @@
|
||||
compatible = "sirf,prima2-usp";
|
||||
reg = <0xb0090000 0x10000>;
|
||||
interrupts = <21>;
|
||||
fifosize = <128>;
|
||||
clocks = <&clks 29>;
|
||||
sirf,usp-dma-rx-channel = <14>;
|
||||
sirf,usp-dma-tx-channel = <15>;
|
||||
};
|
||||
|
||||
usp2: usp@b00a0000 {
|
||||
@@ -238,7 +252,10 @@
|
||||
compatible = "sirf,prima2-usp";
|
||||
reg = <0xb00a0000 0x10000>;
|
||||
interrupts = <22>;
|
||||
fifosize = <128>;
|
||||
clocks = <&clks 30>;
|
||||
sirf,usp-dma-rx-channel = <10>;
|
||||
sirf,usp-dma-tx-channel = <11>;
|
||||
};
|
||||
|
||||
dmac0: dma-controller@b00b0000 {
|
||||
@@ -261,6 +278,8 @@
|
||||
compatible = "sirf,prima2-vip";
|
||||
reg = <0xb00C0000 0x10000>;
|
||||
clocks = <&clks 31>;
|
||||
interrupts = <14>;
|
||||
sirf,vip-dma-rx-channel = <16>;
|
||||
};
|
||||
|
||||
spi0: spi@b00d0000 {
|
||||
|
||||
@@ -193,7 +193,7 @@
|
||||
};
|
||||
|
||||
sdhi0: sdhi@ee100000 {
|
||||
compatible = "renesas,r8a73a4-sdhi";
|
||||
compatible = "renesas,sdhi-r8a73a4";
|
||||
reg = <0 0xee100000 0 0x100>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 165 4>;
|
||||
@@ -202,7 +202,7 @@
|
||||
};
|
||||
|
||||
sdhi1: sdhi@ee120000 {
|
||||
compatible = "renesas,r8a73a4-sdhi";
|
||||
compatible = "renesas,sdhi-r8a73a4";
|
||||
reg = <0 0xee120000 0 0x100>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 166 4>;
|
||||
@@ -211,7 +211,7 @@
|
||||
};
|
||||
|
||||
sdhi2: sdhi@ee140000 {
|
||||
compatible = "renesas,r8a73a4-sdhi";
|
||||
compatible = "renesas,sdhi-r8a73a4";
|
||||
reg = <0 0xee140000 0 0x100>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 167 4>;
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user