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https://github.com/linux-apfs/linux-apfs.git
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Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp: (38 commits) amd64_edac: Fix decode_syndrome types amd64_edac: Fix DCT argument type amd64_edac: Fix ranges signedness amd64_edac: Drop local variable amd64_edac: Fix PCI config addressing types amd64_edac: Fix DRAM base macros amd64_edac: Fix node id signedness amd64_edac: Drop redundant declarations amd64_edac: Enable driver on F15h amd64_edac: Adjust ECC symbol size to F15h amd64_edac: Simplify scrubrate setting PCI: Rename CPU PCI id define amd64_edac: Improve DRAM address mapping amd64_edac: Sanitize ->read_dram_ctl_register amd64_edac: Adjust sys_addr to chip select conversion routine to F15h amd64_edac: Beef up early exit reporting amd64_edac: Revamp online spare handling amd64_edac: Fix channel interleave removal amd64_edac: Correct node interleaving removal amd64_edac: Add support for interleaved region swapping ... Fix up trivial conflict in include/linux/pci_ids.h due to AMD_15H_NB_MISC being renamed as AMD_15H_NB_F3 next to the new AMD_15H_NB_LINK entry.
This commit is contained in:
@@ -15,7 +15,7 @@ static u32 *flush_words;
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const struct pci_device_id amd_nb_misc_ids[] = {
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_K8_NB_MISC) },
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_10H_NB_MISC) },
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_15H_NB_MISC) },
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_15H_NB_F3) },
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{}
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};
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EXPORT_SYMBOL(amd_nb_misc_ids);
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+678
-764
File diff suppressed because it is too large
Load Diff
+139
-234
File diff suppressed because it is too large
Load Diff
@@ -117,13 +117,13 @@ static ssize_t amd64_inject_read_store(struct mem_ctl_info *mci,
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/* Form value to choose 16-byte section of cacheline */
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section = F10_NB_ARRAY_DRAM_ECC |
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SET_NB_ARRAY_ADDRESS(pvt->injection.section);
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pci_write_config_dword(pvt->F3, F10_NB_ARRAY_ADDR, section);
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amd64_write_pci_cfg(pvt->F3, F10_NB_ARRAY_ADDR, section);
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word_bits = SET_NB_DRAM_INJECTION_READ(pvt->injection.word,
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pvt->injection.bit_map);
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/* Issue 'word' and 'bit' along with the READ request */
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pci_write_config_dword(pvt->F3, F10_NB_ARRAY_DATA, word_bits);
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amd64_write_pci_cfg(pvt->F3, F10_NB_ARRAY_DATA, word_bits);
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debugf0("section=0x%x word_bits=0x%x\n", section, word_bits);
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@@ -150,13 +150,13 @@ static ssize_t amd64_inject_write_store(struct mem_ctl_info *mci,
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/* Form value to choose 16-byte section of cacheline */
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section = F10_NB_ARRAY_DRAM_ECC |
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SET_NB_ARRAY_ADDRESS(pvt->injection.section);
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pci_write_config_dword(pvt->F3, F10_NB_ARRAY_ADDR, section);
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amd64_write_pci_cfg(pvt->F3, F10_NB_ARRAY_ADDR, section);
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word_bits = SET_NB_DRAM_INJECTION_WRITE(pvt->injection.word,
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pvt->injection.bit_map);
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/* Issue 'word' and 'bit' along with the READ request */
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pci_write_config_dword(pvt->F3, F10_NB_ARRAY_DATA, word_bits);
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amd64_write_pci_cfg(pvt->F3, F10_NB_ARRAY_DATA, word_bits);
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debugf0("section=0x%x word_bits=0x%x\n", section, word_bits);
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@@ -785,10 +785,10 @@ static int edac_create_mci_instance_attributes(struct mem_ctl_info *mci,
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{
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int err;
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debugf1("%s()\n", __func__);
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debugf4("%s()\n", __func__);
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while (sysfs_attrib) {
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debugf1("%s() sysfs_attrib = %p\n",__func__, sysfs_attrib);
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debugf4("%s() sysfs_attrib = %p\n",__func__, sysfs_attrib);
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if (sysfs_attrib->grp) {
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struct mcidev_sysfs_group_kobj *grp_kobj;
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@@ -818,7 +818,7 @@ static int edac_create_mci_instance_attributes(struct mem_ctl_info *mci,
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if (err < 0)
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return err;
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} else if (sysfs_attrib->attr.name) {
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debugf0("%s() file %s\n", __func__,
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debugf4("%s() file %s\n", __func__,
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sysfs_attrib->attr.name);
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err = sysfs_create_file(kobj, &sysfs_attrib->attr);
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@@ -853,26 +853,26 @@ static void edac_remove_mci_instance_attributes(struct mem_ctl_info *mci,
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* Remove first all the atributes
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*/
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while (sysfs_attrib) {
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debugf1("%s() sysfs_attrib = %p\n",__func__, sysfs_attrib);
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debugf4("%s() sysfs_attrib = %p\n",__func__, sysfs_attrib);
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if (sysfs_attrib->grp) {
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debugf1("%s() seeking for group %s\n",
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debugf4("%s() seeking for group %s\n",
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__func__, sysfs_attrib->grp->name);
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list_for_each_entry(grp_kobj,
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&mci->grp_kobj_list, list) {
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debugf1("%s() grp_kobj->grp = %p\n",__func__, grp_kobj->grp);
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debugf4("%s() grp_kobj->grp = %p\n",__func__, grp_kobj->grp);
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if (grp_kobj->grp == sysfs_attrib->grp) {
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edac_remove_mci_instance_attributes(mci,
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grp_kobj->grp->mcidev_attr,
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&grp_kobj->kobj, count + 1);
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debugf0("%s() group %s\n", __func__,
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debugf4("%s() group %s\n", __func__,
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sysfs_attrib->grp->name);
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kobject_put(&grp_kobj->kobj);
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}
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}
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debugf1("%s() end of seeking for group %s\n",
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debugf4("%s() end of seeking for group %s\n",
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__func__, sysfs_attrib->grp->name);
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} else if (sysfs_attrib->attr.name) {
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debugf0("%s() file %s\n", __func__,
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debugf4("%s() file %s\n", __func__,
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sysfs_attrib->attr.name);
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sysfs_remove_file(kobj, &sysfs_attrib->attr);
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} else
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@@ -979,7 +979,7 @@ void edac_remove_sysfs_mci_device(struct mem_ctl_info *mci)
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debugf0("%s()\n", __func__);
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/* remove all csrow kobjects */
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debugf0("%s() unregister this mci kobj\n", __func__);
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debugf4("%s() unregister this mci kobj\n", __func__);
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for (i = 0; i < mci->nr_csrows; i++) {
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if (mci->csrows[i].nr_pages > 0) {
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debugf0("%s() unreg csrow-%d\n", __func__, i);
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@@ -989,18 +989,18 @@ void edac_remove_sysfs_mci_device(struct mem_ctl_info *mci)
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/* remove this mci instance's attribtes */
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if (mci->mc_driver_sysfs_attributes) {
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debugf0("%s() unregister mci private attributes\n", __func__);
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debugf4("%s() unregister mci private attributes\n", __func__);
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edac_remove_mci_instance_attributes(mci,
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mci->mc_driver_sysfs_attributes,
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&mci->edac_mci_kobj, 0);
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}
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/* remove the symlink */
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debugf0("%s() remove_link\n", __func__);
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debugf4("%s() remove_link\n", __func__);
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sysfs_remove_link(&mci->edac_mci_kobj, EDAC_DEVICE_SYMLINK);
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/* unregister this instance's kobject */
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debugf0("%s() remove_mci_instance\n", __func__);
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debugf4("%s() remove_mci_instance\n", __func__);
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kobject_put(&mci->edac_mci_kobj);
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}
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@@ -594,6 +594,7 @@ static bool nb_noop_mce(u16 ec, u8 xec)
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void amd_decode_nb_mce(int node_id, struct mce *m, u32 nbcfg)
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{
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struct cpuinfo_x86 *c = &boot_cpu_data;
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u16 ec = EC(m->status);
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u8 xec = XEC(m->status, 0x1f);
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u32 nbsh = (u32)(m->status >> 32);
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@@ -602,9 +603,8 @@ void amd_decode_nb_mce(int node_id, struct mce *m, u32 nbcfg)
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pr_emerg(HW_ERR "Northbridge Error (node %d", node_id);
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/* F10h, revD can disable ErrCpu[3:0] through ErrCpuVal */
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if ((boot_cpu_data.x86 == 0x10) &&
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(boot_cpu_data.x86_model > 7)) {
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if (nbsh & K8_NBSH_ERR_CPU_VAL)
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if (c->x86 == 0x10 && c->x86_model > 7) {
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if (nbsh & NBSH_ERR_CPU_VAL)
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core = nbsh & nb_err_cpumask;
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} else {
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u8 assoc_cpus = nbsh & nb_err_cpumask;
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@@ -646,7 +646,7 @@ void amd_decode_nb_mce(int node_id, struct mce *m, u32 nbcfg)
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if (!fam_ops->nb_mce(ec, xec))
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goto wrong_nb_mce;
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if (boot_cpu_data.x86 == 0xf || boot_cpu_data.x86 == 0x10)
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if (c->x86 == 0xf || c->x86 == 0x10 || c->x86 == 0x15)
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if ((xec == 0x8 || xec == 0x0) && nb_bus_decoder)
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nb_bus_decoder(node_id, m, nbcfg);
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+4
-24
@@ -31,19 +31,10 @@
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#define R4(x) (((x) >> 4) & 0xf)
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#define R4_MSG(x) ((R4(x) < 9) ? rrrr_msgs[R4(x)] : "Wrong R4!")
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#define K8_NBSH 0x4C
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#define K8_NBSH_VALID_BIT BIT(31)
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#define K8_NBSH_OVERFLOW BIT(30)
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#define K8_NBSH_UC_ERR BIT(29)
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#define K8_NBSH_ERR_EN BIT(28)
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#define K8_NBSH_MISCV BIT(27)
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#define K8_NBSH_VALID_ERROR_ADDR BIT(26)
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#define K8_NBSH_PCC BIT(25)
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#define K8_NBSH_ERR_CPU_VAL BIT(24)
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#define K8_NBSH_CECC BIT(14)
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#define K8_NBSH_UECC BIT(13)
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#define K8_NBSH_ERR_SCRUBER BIT(8)
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/*
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* F3x4C bits (MCi_STATUS' high half)
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*/
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#define NBSH_ERR_CPU_VAL BIT(24)
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enum tt_ids {
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TT_INSTR = 0,
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@@ -85,17 +76,6 @@ extern const char *pp_msgs[];
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extern const char *to_msgs[];
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extern const char *ii_msgs[];
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/*
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* relevant NB regs
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*/
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struct err_regs {
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u32 nbcfg;
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u32 nbsh;
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u32 nbsl;
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u32 nbeah;
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u32 nbeal;
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};
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/*
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* per-family decoder ops
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*/
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@@ -517,7 +517,7 @@
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#define PCI_DEVICE_ID_AMD_11H_NB_DRAM 0x1302
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#define PCI_DEVICE_ID_AMD_11H_NB_MISC 0x1303
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#define PCI_DEVICE_ID_AMD_11H_NB_LINK 0x1304
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#define PCI_DEVICE_ID_AMD_15H_NB_MISC 0x1603
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#define PCI_DEVICE_ID_AMD_15H_NB_F3 0x1603
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#define PCI_DEVICE_ID_AMD_15H_NB_LINK 0x1604
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#define PCI_DEVICE_ID_AMD_CNB17H_F3 0x1703
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#define PCI_DEVICE_ID_AMD_LANCE 0x2000
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