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Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform updates from Olof Johansson:
"SoC platform changes (arch/arm/mach-*). This merge window, the bulk is
for a few platforms:
Gemini:
- Legacy platform that Linus Walleij has converted to multiplatform
and DT, so a handful of various tweaks there, removal of some old
stale support, etc.
Atmel AT91:
- Fixup of various power management related pieces
- Move of SoC detection to a drivers/soc driver instead
ST Micro STM32:
- New SoC support: STM32H743
TI platforms:
- More driver support for Davinci (SATA in particular)
- Removal of some old stale hwmod files (linkspace platform)
Misc:
- A couple of smaller patches for i.MX, sunxi, hisi"
* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (57 commits)
ARM: davinci: Add clock for CPPI 4.1 DMA engine
ARM: mxs: add support for I2SE Duckbill 2 boards
MAINTAINERS: Update the Allwinner sunXi entry
ARM: i.MX25: globally disable supervisor protect
ARM: at91: move SoC detection to its own driver
ARM: at91: pm: correct typo
ARM: at91: pm: Remove at91_pm_set_standby
ARM: at91: pm: Merge all at91sam9*_pm_init
ARM: at91: pm: Tie the USB clock mask to the pmc
ARM: at91: pm: Tie the memory controller type to the ramc id
ARM: at91: pm: Workaround DDRSDRC self-refresh bug with LPDDR1 memories.
ARM: at91: pm: Simplify at91rm9200_standby
ARM: at91: pm: Use struct at91_pm_data in pm_suspend.S
ARM: at91: pm: Move global variables into at91_pm_data
ARM: at91: pm: Move at91_ramc_read/write to pm.c
ARM: at91: pm: Cleanup headers
MAINTAINERS: Add memory drivers to AT91 entry
MAINTAINERS: Update AT91 entry
ARM: davinci: add pata_bk3710 libata driver support
ARM: OMAP2+: mark omap_init_rng as __init
...
This commit is contained in:
Linus Torvalds
@@ -0,0 +1,30 @@
|
||||
STM32H743 Overview
|
||||
==================
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||||
|
||||
Introduction
|
||||
------------
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||||
The STM32H743 is a Cortex-M7 MCU aimed at various applications.
|
||||
It features:
|
||||
- Cortex-M7 core running up to @400MHz
|
||||
- 2MB internal flash, 1MBytes internal RAM
|
||||
- FMC controller to connect SDRAM, NOR and NAND memories
|
||||
- Dual mode QSPI
|
||||
- SD/MMC/SDIO support
|
||||
- Ethernet controller
|
||||
- USB OTFG FS & HS controllers
|
||||
- I2C, SPI, CAN busses support
|
||||
- Several 16 & 32 bits general purpose timers
|
||||
- Serial Audio interface
|
||||
- LCD controller
|
||||
- HDMI-CEC
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- SPDIFRX
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- DFSDM
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Resources
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---------
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Datasheet and reference manual are publicly available on ST website:
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- http://www.st.com/en/microcontrollers/stm32h7x3.html?querycriteria=productId=LN2033
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Document Author
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---------------
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Alexandre Torgue <alexandre.torgue@st.com>
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+7
-2
@@ -1056,8 +1056,13 @@ M: Chen-Yu Tsai <wens@csie.org>
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L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
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S: Maintained
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N: sun[x456789]i
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F: arch/arm/boot/dts/ntc-gr8*
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N: sun50i
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F: arch/arm/mach-sunxi/
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F: arch/arm64/boot/dts/allwinner/
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F: drivers/clk/sunxi-ng/
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F: drivers/pinctrl/sunxi/
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F: drivers/soc/sunxi/
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T: git git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux.git
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ARM/Allwinner SoC Clock Support
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M: Emilio López <emilio@elopez.com.ar>
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@@ -1110,7 +1115,6 @@ F: drivers/*/*aspeed*
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ARM/ATMEL AT91RM9200, AT91SAM9 AND SAMA5 SOC SUPPORT
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M: Nicolas Ferre <nicolas.ferre@microchip.com>
|
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M: Alexandre Belloni <alexandre.belloni@free-electrons.com>
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M: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com>
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||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
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W: http://www.linux4sam.org
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T: git git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91.git
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@@ -1122,6 +1126,7 @@ F: arch/arm/boot/dts/at91*.dtsi
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F: arch/arm/boot/dts/sama*.dts
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F: arch/arm/boot/dts/sama*.dtsi
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F: arch/arm/include/debug/at91.S
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F: drivers/memory/atmel*
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ARM/ATMEL AT91 Clock Support
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M: Boris Brezillon <boris.brezillon@free-electrons.com>
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+2
-31
@@ -359,15 +359,6 @@ config ARM_SINGLE_ARMV7M
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select SPARSE_IRQ
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select USE_OF
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config ARCH_GEMINI
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bool "Cortina Systems Gemini"
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select CLKSRC_MMIO
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select CPU_FA526
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select GENERIC_CLOCKEVENTS
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select GPIOLIB
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help
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Support for the Cortina Systems Gemini family SoCs
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config ARCH_EBSA110
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bool "EBSA-110"
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select ARCH_USES_GETTIMEOFFSET
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@@ -819,6 +810,8 @@ source "arch/arm/mach-spear/Kconfig"
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source "arch/arm/mach-sti/Kconfig"
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source "arch/arm/mach-stm32/Kconfig"
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source "arch/arm/mach-s3c24xx/Kconfig"
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source "arch/arm/mach-s3c64xx/Kconfig"
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@@ -877,28 +870,6 @@ config ARCH_LPC18XX
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Support for NXP's LPC18xx Cortex-M3 and LPC43xx Cortex-M4
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high performance microcontrollers.
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config ARCH_STM32
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bool "STMicrolectronics STM32"
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depends on ARM_SINGLE_ARMV7M
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select ARCH_HAS_RESET_CONTROLLER
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select ARMV7M_SYSTICK
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select CLKSRC_STM32
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select PINCTRL
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select RESET_CONTROLLER
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select STM32_EXTI
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help
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Support for STMicroelectronics STM32 processors.
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config MACH_STM32F429
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bool "STMicrolectronics STM32F429"
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depends on ARCH_STM32
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default y
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config MACH_STM32F746
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bool "STMicrolectronics STM32F746"
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depends on ARCH_STM32
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default y
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|
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config ARCH_MPS2
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bool "ARM MPS2 platform"
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depends on ARM_SINGLE_ARMV7M
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@@ -22,7 +22,8 @@
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#define UARTA_3390 REG_PHYS_ADDR(0x40a900)
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#define UARTA_7250 REG_PHYS_ADDR(0x40b400)
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#define UARTA_7268 REG_PHYS_ADDR(0x40c000)
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#define UARTA_7260 REG_PHYS_ADDR(0x40c000)
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#define UARTA_7268 UARTA_7260
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#define UARTA_7271 UARTA_7268
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#define UARTA_7364 REG_PHYS_ADDR(0x40b000)
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#define UARTA_7366 UARTA_7364
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@@ -62,13 +63,14 @@
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/* Chip specific detection starts here */
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20: checkuart(\rp, \rv, 0x33900000, 3390)
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21: checkuart(\rp, \rv, 0x72500000, 7250)
|
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22: checkuart(\rp, \rv, 0x72680000, 7268)
|
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23: checkuart(\rp, \rv, 0x72710000, 7271)
|
||||
24: checkuart(\rp, \rv, 0x73640000, 7364)
|
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25: checkuart(\rp, \rv, 0x73660000, 7366)
|
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26: checkuart(\rp, \rv, 0x07437100, 74371)
|
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27: checkuart(\rp, \rv, 0x74390000, 7439)
|
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28: checkuart(\rp, \rv, 0x74450000, 7445)
|
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22: checkuart(\rp, \rv, 0x72600000, 7260)
|
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23: checkuart(\rp, \rv, 0x72680000, 7268)
|
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24: checkuart(\rp, \rv, 0x72710000, 7271)
|
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25: checkuart(\rp, \rv, 0x73640000, 7364)
|
||||
26: checkuart(\rp, \rv, 0x73660000, 7366)
|
||||
27: checkuart(\rp, \rv, 0x07437100, 74371)
|
||||
28: checkuart(\rp, \rv, 0x74390000, 7439)
|
||||
29: checkuart(\rp, \rv, 0x74450000, 7445)
|
||||
|
||||
/* No valid UART found */
|
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90: mov \rp, #0
|
||||
|
||||
@@ -1,7 +1,6 @@
|
||||
#
|
||||
# Makefile for the linux kernel.
|
||||
#
|
||||
obj-y := soc.o
|
||||
|
||||
# CPU-specific support
|
||||
obj-$(CONFIG_SOC_AT91RM9200) += at91rm9200.o
|
||||
@@ -18,3 +17,36 @@ endif
|
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ifeq ($(CONFIG_PM_DEBUG),y)
|
||||
CFLAGS_pm.o += -DDEBUG
|
||||
endif
|
||||
|
||||
# Default sed regexp - multiline due to syntax constraints
|
||||
define sed-y
|
||||
"/^->/{s:->#\(.*\):/* \1 */:; \
|
||||
s:^->\([^ ]*\) [\$$#]*\([-0-9]*\) \(.*\):#define \1 \2 /* \3 */:; \
|
||||
s:^->\([^ ]*\) [\$$#]*\([^ ]*\) \(.*\):#define \1 \2 /* \3 */:; \
|
||||
s:->::; p;}"
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||||
endef
|
||||
|
||||
# Use filechk to avoid rebuilds when a header changes, but the resulting file
|
||||
# does not
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||||
define filechk_offsets
|
||||
(set -e; \
|
||||
echo "#ifndef $2"; \
|
||||
echo "#define $2"; \
|
||||
echo "/*"; \
|
||||
echo " * DO NOT MODIFY."; \
|
||||
echo " *"; \
|
||||
echo " * This file was generated by Kbuild"; \
|
||||
echo " */"; \
|
||||
echo ""; \
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||||
sed -ne $(sed-y); \
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||||
echo ""; \
|
||||
echo "#endif" )
|
||||
endef
|
||||
|
||||
arch/arm/mach-at91/pm_data-offsets.s: arch/arm/mach-at91/pm_data-offsets.c
|
||||
$(call if_changed_dep,cc_s_c)
|
||||
|
||||
include/generated/at91_pm_data-offsets.h: arch/arm/mach-at91/pm_data-offsets.s FORCE
|
||||
$(call filechk,offsets,__PM_DATA_OFFSETS_H__)
|
||||
|
||||
arch/arm/mach-at91/pm_suspend.o: include/generated/at91_pm_data-offsets.h
|
||||
|
||||
@@ -14,23 +14,10 @@
|
||||
#include <asm/mach/arch.h>
|
||||
|
||||
#include "generic.h"
|
||||
#include "soc.h"
|
||||
|
||||
static const struct at91_soc rm9200_socs[] = {
|
||||
AT91_SOC(AT91RM9200_CIDR_MATCH, 0, "at91rm9200 BGA", "at91rm9200"),
|
||||
{ /* sentinel */ },
|
||||
};
|
||||
|
||||
static void __init at91rm9200_dt_device_init(void)
|
||||
{
|
||||
struct soc_device *soc;
|
||||
struct device *soc_dev = NULL;
|
||||
|
||||
soc = at91_soc_init(rm9200_socs);
|
||||
if (soc != NULL)
|
||||
soc_dev = soc_device_to_device(soc);
|
||||
|
||||
of_platform_default_populate(NULL, NULL, soc_dev);
|
||||
of_platform_default_populate(NULL, NULL, NULL);
|
||||
|
||||
at91rm9200_pm_init();
|
||||
}
|
||||
|
||||
@@ -14,60 +14,12 @@
|
||||
#include <asm/system_misc.h>
|
||||
|
||||
#include "generic.h"
|
||||
#include "soc.h"
|
||||
|
||||
static const struct at91_soc at91sam9_socs[] = {
|
||||
AT91_SOC(AT91SAM9260_CIDR_MATCH, 0, "at91sam9260", NULL),
|
||||
AT91_SOC(AT91SAM9261_CIDR_MATCH, 0, "at91sam9261", NULL),
|
||||
AT91_SOC(AT91SAM9263_CIDR_MATCH, 0, "at91sam9263", NULL),
|
||||
AT91_SOC(AT91SAM9G20_CIDR_MATCH, 0, "at91sam9g20", NULL),
|
||||
AT91_SOC(AT91SAM9RL64_CIDR_MATCH, 0, "at91sam9rl64", NULL),
|
||||
AT91_SOC(AT91SAM9G45_CIDR_MATCH, AT91SAM9M11_EXID_MATCH,
|
||||
"at91sam9m11", "at91sam9g45"),
|
||||
AT91_SOC(AT91SAM9G45_CIDR_MATCH, AT91SAM9M10_EXID_MATCH,
|
||||
"at91sam9m10", "at91sam9g45"),
|
||||
AT91_SOC(AT91SAM9G45_CIDR_MATCH, AT91SAM9G46_EXID_MATCH,
|
||||
"at91sam9g46", "at91sam9g45"),
|
||||
AT91_SOC(AT91SAM9G45_CIDR_MATCH, AT91SAM9G45_EXID_MATCH,
|
||||
"at91sam9g45", "at91sam9g45"),
|
||||
AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9G15_EXID_MATCH,
|
||||
"at91sam9g15", "at91sam9x5"),
|
||||
AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9G35_EXID_MATCH,
|
||||
"at91sam9g35", "at91sam9x5"),
|
||||
AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9X35_EXID_MATCH,
|
||||
"at91sam9x35", "at91sam9x5"),
|
||||
AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9G25_EXID_MATCH,
|
||||
"at91sam9g25", "at91sam9x5"),
|
||||
AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9X25_EXID_MATCH,
|
||||
"at91sam9x25", "at91sam9x5"),
|
||||
AT91_SOC(AT91SAM9N12_CIDR_MATCH, AT91SAM9CN12_EXID_MATCH,
|
||||
"at91sam9cn12", "at91sam9n12"),
|
||||
AT91_SOC(AT91SAM9N12_CIDR_MATCH, AT91SAM9N12_EXID_MATCH,
|
||||
"at91sam9n12", "at91sam9n12"),
|
||||
AT91_SOC(AT91SAM9N12_CIDR_MATCH, AT91SAM9CN11_EXID_MATCH,
|
||||
"at91sam9cn11", "at91sam9n12"),
|
||||
AT91_SOC(AT91SAM9XE128_CIDR_MATCH, 0, "at91sam9xe128", "at91sam9xe128"),
|
||||
AT91_SOC(AT91SAM9XE256_CIDR_MATCH, 0, "at91sam9xe256", "at91sam9xe256"),
|
||||
AT91_SOC(AT91SAM9XE512_CIDR_MATCH, 0, "at91sam9xe512", "at91sam9xe512"),
|
||||
{ /* sentinel */ },
|
||||
};
|
||||
|
||||
static void __init at91sam9_common_init(void)
|
||||
static void __init at91sam9_init(void)
|
||||
{
|
||||
struct soc_device *soc;
|
||||
struct device *soc_dev = NULL;
|
||||
of_platform_default_populate(NULL, NULL, NULL);
|
||||
|
||||
soc = at91_soc_init(at91sam9_socs);
|
||||
if (soc != NULL)
|
||||
soc_dev = soc_device_to_device(soc);
|
||||
|
||||
of_platform_default_populate(NULL, NULL, soc_dev);
|
||||
}
|
||||
|
||||
static void __init at91sam9_dt_device_init(void)
|
||||
{
|
||||
at91sam9_common_init();
|
||||
at91sam9260_pm_init();
|
||||
at91sam9_pm_init();
|
||||
}
|
||||
|
||||
static const char *const at91_dt_board_compat[] __initconst = {
|
||||
@@ -77,41 +29,6 @@ static const char *const at91_dt_board_compat[] __initconst = {
|
||||
|
||||
DT_MACHINE_START(at91sam_dt, "Atmel AT91SAM9")
|
||||
/* Maintainer: Atmel */
|
||||
.init_machine = at91sam9_dt_device_init,
|
||||
.init_machine = at91sam9_init,
|
||||
.dt_compat = at91_dt_board_compat,
|
||||
MACHINE_END
|
||||
|
||||
static void __init at91sam9g45_dt_device_init(void)
|
||||
{
|
||||
at91sam9_common_init();
|
||||
at91sam9g45_pm_init();
|
||||
}
|
||||
|
||||
static const char *const at91sam9g45_board_compat[] __initconst = {
|
||||
"atmel,at91sam9g45",
|
||||
NULL
|
||||
};
|
||||
|
||||
DT_MACHINE_START(at91sam9g45_dt, "Atmel AT91SAM9G45")
|
||||
/* Maintainer: Atmel */
|
||||
.init_machine = at91sam9g45_dt_device_init,
|
||||
.dt_compat = at91sam9g45_board_compat,
|
||||
MACHINE_END
|
||||
|
||||
static void __init at91sam9x5_dt_device_init(void)
|
||||
{
|
||||
at91sam9_common_init();
|
||||
at91sam9x5_pm_init();
|
||||
}
|
||||
|
||||
static const char *const at91sam9x5_board_compat[] __initconst = {
|
||||
"atmel,at91sam9x5",
|
||||
"atmel,at91sam9n12",
|
||||
NULL
|
||||
};
|
||||
|
||||
DT_MACHINE_START(at91sam9x5_dt, "Atmel AT91SAM9")
|
||||
/* Maintainer: Atmel */
|
||||
.init_machine = at91sam9x5_dt_device_init,
|
||||
.dt_compat = at91sam9x5_board_compat,
|
||||
MACHINE_END
|
||||
|
||||
@@ -13,15 +13,11 @@
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
extern void __init at91rm9200_pm_init(void);
|
||||
extern void __init at91sam9260_pm_init(void);
|
||||
extern void __init at91sam9g45_pm_init(void);
|
||||
extern void __init at91sam9x5_pm_init(void);
|
||||
extern void __init at91sam9_pm_init(void);
|
||||
extern void __init sama5_pm_init(void);
|
||||
#else
|
||||
static inline void __init at91rm9200_pm_init(void) { }
|
||||
static inline void __init at91sam9260_pm_init(void) { }
|
||||
static inline void __init at91sam9g45_pm_init(void) { }
|
||||
static inline void __init at91sam9x5_pm_init(void) { }
|
||||
static inline void __init at91sam9_pm_init(void) { }
|
||||
static inline void __init sama5_pm_init(void) { }
|
||||
#endif
|
||||
|
||||
|
||||
+97
-102
@@ -10,35 +10,22 @@
|
||||
* (at your option) any later version.
|
||||
*/
|
||||
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/suspend.h>
|
||||
#include <linux/sched.h>
|
||||
#include <linux/proc_fs.h>
|
||||
#include <linux/genalloc.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/sysfs.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/of_address.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/of_platform.h>
|
||||
#include <linux/of_address.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/platform_data/atmel.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/suspend.h>
|
||||
|
||||
#include <linux/clk/at91_pmc.h>
|
||||
|
||||
#include <asm/irq.h>
|
||||
#include <linux/atomic.h>
|
||||
#include <asm/mach/time.h>
|
||||
#include <asm/mach/irq.h>
|
||||
#include <asm/fncpy.h>
|
||||
#include <asm/cacheflush.h>
|
||||
#include <asm/fncpy.h>
|
||||
#include <asm/system_misc.h>
|
||||
|
||||
#include "generic.h"
|
||||
#include "pm.h"
|
||||
|
||||
static void __iomem *pmc;
|
||||
|
||||
/*
|
||||
* FIXME: this is needed to communicate between the pinctrl driver and
|
||||
* the PM implementation in the machine. Possibly part of the PM
|
||||
@@ -50,12 +37,13 @@ extern void at91_pinctrl_gpio_suspend(void);
|
||||
extern void at91_pinctrl_gpio_resume(void);
|
||||
#endif
|
||||
|
||||
static struct {
|
||||
unsigned long uhp_udp_mask;
|
||||
int memctrl;
|
||||
} at91_pm_data;
|
||||
static struct at91_pm_data pm_data;
|
||||
|
||||
static void __iomem *at91_ramc_base[2];
|
||||
#define at91_ramc_read(id, field) \
|
||||
__raw_readl(pm_data.ramc[id] + field)
|
||||
|
||||
#define at91_ramc_write(id, field, value) \
|
||||
__raw_writel(value, pm_data.ramc[id] + field)
|
||||
|
||||
static int at91_pm_valid_state(suspend_state_t state)
|
||||
{
|
||||
@@ -91,10 +79,10 @@ static int at91_pm_verify_clocks(void)
|
||||
unsigned long scsr;
|
||||
int i;
|
||||
|
||||
scsr = readl(pmc + AT91_PMC_SCSR);
|
||||
scsr = readl(pm_data.pmc + AT91_PMC_SCSR);
|
||||
|
||||
/* USB must not be using PLLB */
|
||||
if ((scsr & at91_pm_data.uhp_udp_mask) != 0) {
|
||||
if ((scsr & pm_data.uhp_udp_mask) != 0) {
|
||||
pr_err("AT91: PM - Suspend-to-RAM with USB still active\n");
|
||||
return 0;
|
||||
}
|
||||
@@ -105,7 +93,7 @@ static int at91_pm_verify_clocks(void)
|
||||
|
||||
if ((scsr & (AT91_PMC_PCK0 << i)) == 0)
|
||||
continue;
|
||||
css = readl(pmc + AT91_PMC_PCKR(i)) & AT91_PMC_CSS;
|
||||
css = readl(pm_data.pmc + AT91_PMC_PCKR(i)) & AT91_PMC_CSS;
|
||||
if (css != AT91_PMC_CSS_SLOW) {
|
||||
pr_err("AT91: PM - Suspend-to-RAM with PCK%d src %d\n", i, css);
|
||||
return 0;
|
||||
@@ -131,25 +119,18 @@ int at91_suspend_entering_slow_clock(void)
|
||||
}
|
||||
EXPORT_SYMBOL(at91_suspend_entering_slow_clock);
|
||||
|
||||
static void (*at91_suspend_sram_fn)(void __iomem *pmc, void __iomem *ramc0,
|
||||
void __iomem *ramc1, int memctrl);
|
||||
|
||||
extern void at91_pm_suspend_in_sram(void __iomem *pmc, void __iomem *ramc0,
|
||||
void __iomem *ramc1, int memctrl);
|
||||
static void (*at91_suspend_sram_fn)(struct at91_pm_data *);
|
||||
extern void at91_pm_suspend_in_sram(struct at91_pm_data *pm_data);
|
||||
extern u32 at91_pm_suspend_in_sram_sz;
|
||||
|
||||
static void at91_pm_suspend(suspend_state_t state)
|
||||
{
|
||||
unsigned int pm_data = at91_pm_data.memctrl;
|
||||
|
||||
pm_data |= (state == PM_SUSPEND_MEM) ?
|
||||
AT91_PM_MODE(AT91_PM_SLOW_CLOCK) : 0;
|
||||
pm_data.mode = (state == PM_SUSPEND_MEM) ? AT91_PM_SLOW_CLOCK : 0;
|
||||
|
||||
flush_cache_all();
|
||||
outer_disable();
|
||||
|
||||
at91_suspend_sram_fn(pmc, at91_ramc_base[0],
|
||||
at91_ramc_base[1], pm_data);
|
||||
at91_suspend_sram_fn(&pm_data);
|
||||
|
||||
outer_resume();
|
||||
}
|
||||
@@ -224,12 +205,6 @@ static struct platform_device at91_cpuidle_device = {
|
||||
.name = "cpuidle-at91",
|
||||
};
|
||||
|
||||
static void at91_pm_set_standby(void (*at91_standby)(void))
|
||||
{
|
||||
if (at91_standby)
|
||||
at91_cpuidle_device.dev.platform_data = at91_standby;
|
||||
}
|
||||
|
||||
/*
|
||||
* The AT91RM9200 goes into self-refresh mode with this command, and will
|
||||
* terminate self-refresh automatically on the next SDRAM access.
|
||||
@@ -241,20 +216,15 @@ static void at91_pm_set_standby(void (*at91_standby)(void))
|
||||
*/
|
||||
static void at91rm9200_standby(void)
|
||||
{
|
||||
u32 lpr = at91_ramc_read(0, AT91_MC_SDRAMC_LPR);
|
||||
|
||||
asm volatile(
|
||||
"b 1f\n\t"
|
||||
".align 5\n\t"
|
||||
"1: mcr p15, 0, %0, c7, c10, 4\n\t"
|
||||
" str %0, [%1, %2]\n\t"
|
||||
" str %3, [%1, %4]\n\t"
|
||||
" str %2, [%1, %3]\n\t"
|
||||
" mcr p15, 0, %0, c7, c0, 4\n\t"
|
||||
" str %5, [%1, %2]"
|
||||
:
|
||||
: "r" (0), "r" (at91_ramc_base[0]), "r" (AT91_MC_SDRAMC_LPR),
|
||||
"r" (1), "r" (AT91_MC_SDRAMC_SRR),
|
||||
"r" (lpr));
|
||||
: "r" (0), "r" (pm_data.ramc[0]),
|
||||
"r" (1), "r" (AT91_MC_SDRAMC_SRR));
|
||||
}
|
||||
|
||||
/* We manage both DDRAM/SDRAM controllers, we need more than one value to
|
||||
@@ -265,12 +235,27 @@ static void at91_ddr_standby(void)
|
||||
/* Those two values allow us to delay self-refresh activation
|
||||
* to the maximum. */
|
||||
u32 lpr0, lpr1 = 0;
|
||||
u32 mdr, saved_mdr0, saved_mdr1 = 0;
|
||||
u32 saved_lpr0, saved_lpr1 = 0;
|
||||
|
||||
if (at91_ramc_base[1]) {
|
||||
/* LPDDR1 --> force DDR2 mode during self-refresh */
|
||||
saved_mdr0 = at91_ramc_read(0, AT91_DDRSDRC_MDR);
|
||||
if ((saved_mdr0 & AT91_DDRSDRC_MD) == AT91_DDRSDRC_MD_LOW_POWER_DDR) {
|
||||
mdr = saved_mdr0 & ~AT91_DDRSDRC_MD;
|
||||
mdr |= AT91_DDRSDRC_MD_DDR2;
|
||||
at91_ramc_write(0, AT91_DDRSDRC_MDR, mdr);
|
||||
}
|
||||
|
||||
if (pm_data.ramc[1]) {
|
||||
saved_lpr1 = at91_ramc_read(1, AT91_DDRSDRC_LPR);
|
||||
lpr1 = saved_lpr1 & ~AT91_DDRSDRC_LPCB;
|
||||
lpr1 |= AT91_DDRSDRC_LPCB_SELF_REFRESH;
|
||||
saved_mdr1 = at91_ramc_read(1, AT91_DDRSDRC_MDR);
|
||||
if ((saved_mdr1 & AT91_DDRSDRC_MD) == AT91_DDRSDRC_MD_LOW_POWER_DDR) {
|
||||
mdr = saved_mdr1 & ~AT91_DDRSDRC_MD;
|
||||
mdr |= AT91_DDRSDRC_MD_DDR2;
|
||||
at91_ramc_write(1, AT91_DDRSDRC_MDR, mdr);
|
||||
}
|
||||
}
|
||||
|
||||
saved_lpr0 = at91_ramc_read(0, AT91_DDRSDRC_LPR);
|
||||
@@ -279,14 +264,17 @@ static void at91_ddr_standby(void)
|
||||
|
||||
/* self-refresh mode now */
|
||||
at91_ramc_write(0, AT91_DDRSDRC_LPR, lpr0);
|
||||
if (at91_ramc_base[1])
|
||||
if (pm_data.ramc[1])
|
||||
at91_ramc_write(1, AT91_DDRSDRC_LPR, lpr1);
|
||||
|
||||
cpu_do_idle();
|
||||
|
||||
at91_ramc_write(0, AT91_DDRSDRC_MDR, saved_mdr0);
|
||||
at91_ramc_write(0, AT91_DDRSDRC_LPR, saved_lpr0);
|
||||
if (at91_ramc_base[1])
|
||||
if (pm_data.ramc[1]) {
|
||||
at91_ramc_write(0, AT91_DDRSDRC_MDR, saved_mdr1);
|
||||
at91_ramc_write(1, AT91_DDRSDRC_LPR, saved_lpr1);
|
||||
}
|
||||
}
|
||||
|
||||
static void sama5d3_ddr_standby(void)
|
||||
@@ -313,7 +301,7 @@ static void at91sam9_sdram_standby(void)
|
||||
u32 lpr0, lpr1 = 0;
|
||||
u32 saved_lpr0, saved_lpr1 = 0;
|
||||
|
||||
if (at91_ramc_base[1]) {
|
||||
if (pm_data.ramc[1]) {
|
||||
saved_lpr1 = at91_ramc_read(1, AT91_SDRAMC_LPR);
|
||||
lpr1 = saved_lpr1 & ~AT91_SDRAMC_LPCB;
|
||||
lpr1 |= AT91_SDRAMC_LPCB_SELF_REFRESH;
|
||||
@@ -325,21 +313,33 @@ static void at91sam9_sdram_standby(void)
|
||||
|
||||
/* self-refresh mode now */
|
||||
at91_ramc_write(0, AT91_SDRAMC_LPR, lpr0);
|
||||
if (at91_ramc_base[1])
|
||||
if (pm_data.ramc[1])
|
||||
at91_ramc_write(1, AT91_SDRAMC_LPR, lpr1);
|
||||
|
||||
cpu_do_idle();
|
||||
|
||||
at91_ramc_write(0, AT91_SDRAMC_LPR, saved_lpr0);
|
||||
if (at91_ramc_base[1])
|
||||
if (pm_data.ramc[1])
|
||||
at91_ramc_write(1, AT91_SDRAMC_LPR, saved_lpr1);
|
||||
}
|
||||
|
||||
struct ramc_info {
|
||||
void (*idle)(void);
|
||||
unsigned int memctrl;
|
||||
};
|
||||
|
||||
static const struct ramc_info ramc_infos[] __initconst = {
|
||||
{ .idle = at91rm9200_standby, .memctrl = AT91_MEMCTRL_MC},
|
||||
{ .idle = at91sam9_sdram_standby, .memctrl = AT91_MEMCTRL_SDRAMC},
|
||||
{ .idle = at91_ddr_standby, .memctrl = AT91_MEMCTRL_DDRSDR},
|
||||
{ .idle = sama5d3_ddr_standby, .memctrl = AT91_MEMCTRL_DDRSDR},
|
||||
};
|
||||
|
||||
static const struct of_device_id const ramc_ids[] __initconst = {
|
||||
{ .compatible = "atmel,at91rm9200-sdramc", .data = at91rm9200_standby },
|
||||
{ .compatible = "atmel,at91sam9260-sdramc", .data = at91sam9_sdram_standby },
|
||||
{ .compatible = "atmel,at91sam9g45-ddramc", .data = at91_ddr_standby },
|
||||
{ .compatible = "atmel,sama5d3-ddramc", .data = sama5d3_ddr_standby },
|
||||
{ .compatible = "atmel,at91rm9200-sdramc", .data = &ramc_infos[0] },
|
||||
{ .compatible = "atmel,at91sam9260-sdramc", .data = &ramc_infos[1] },
|
||||
{ .compatible = "atmel,at91sam9g45-ddramc", .data = &ramc_infos[2] },
|
||||
{ .compatible = "atmel,sama5d3-ddramc", .data = &ramc_infos[3] },
|
||||
{ /*sentinel*/ }
|
||||
};
|
||||
|
||||
@@ -348,15 +348,18 @@ static __init void at91_dt_ramc(void)
|
||||
struct device_node *np;
|
||||
const struct of_device_id *of_id;
|
||||
int idx = 0;
|
||||
const void *standby = NULL;
|
||||
void *standby = NULL;
|
||||
const struct ramc_info *ramc;
|
||||
|
||||
for_each_matching_node_and_match(np, ramc_ids, &of_id) {
|
||||
at91_ramc_base[idx] = of_iomap(np, 0);
|
||||
if (!at91_ramc_base[idx])
|
||||
pm_data.ramc[idx] = of_iomap(np, 0);
|
||||
if (!pm_data.ramc[idx])
|
||||
panic(pr_fmt("unable to map ramc[%d] cpu registers\n"), idx);
|
||||
|
||||
ramc = of_id->data;
|
||||
if (!standby)
|
||||
standby = of_id->data;
|
||||
standby = ramc->idle;
|
||||
pm_data.memctrl = ramc->memctrl;
|
||||
|
||||
idx++;
|
||||
}
|
||||
@@ -369,7 +372,7 @@ static __init void at91_dt_ramc(void)
|
||||
return;
|
||||
}
|
||||
|
||||
at91_pm_set_standby(standby);
|
||||
at91_cpuidle_device.dev.platform_data = standby;
|
||||
}
|
||||
|
||||
static void at91rm9200_idle(void)
|
||||
@@ -378,12 +381,12 @@ static void at91rm9200_idle(void)
|
||||
* Disable the processor clock. The processor will be automatically
|
||||
* re-enabled by an interrupt or by a reset.
|
||||
*/
|
||||
writel(AT91_PMC_PCK, pmc + AT91_PMC_SCDR);
|
||||
writel(AT91_PMC_PCK, pm_data.pmc + AT91_PMC_SCDR);
|
||||
}
|
||||
|
||||
static void at91sam9_idle(void)
|
||||
{
|
||||
writel(AT91_PMC_PCK, pmc + AT91_PMC_SCDR);
|
||||
writel(AT91_PMC_PCK, pm_data.pmc + AT91_PMC_SCDR);
|
||||
cpu_do_idle();
|
||||
}
|
||||
|
||||
@@ -433,31 +436,46 @@ static void __init at91_pm_sram_init(void)
|
||||
&at91_pm_suspend_in_sram, at91_pm_suspend_in_sram_sz);
|
||||
}
|
||||
|
||||
struct pmc_info {
|
||||
unsigned long uhp_udp_mask;
|
||||
};
|
||||
|
||||
static const struct pmc_info pmc_infos[] __initconst = {
|
||||
{ .uhp_udp_mask = AT91RM9200_PMC_UHP | AT91RM9200_PMC_UDP },
|
||||
{ .uhp_udp_mask = AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP },
|
||||
{ .uhp_udp_mask = AT91SAM926x_PMC_UHP },
|
||||
};
|
||||
|
||||
static const struct of_device_id atmel_pmc_ids[] __initconst = {
|
||||
{ .compatible = "atmel,at91rm9200-pmc" },
|
||||
{ .compatible = "atmel,at91sam9260-pmc" },
|
||||
{ .compatible = "atmel,at91sam9g45-pmc" },
|
||||
{ .compatible = "atmel,at91sam9n12-pmc" },
|
||||
{ .compatible = "atmel,at91sam9x5-pmc" },
|
||||
{ .compatible = "atmel,sama5d3-pmc" },
|
||||
{ .compatible = "atmel,sama5d2-pmc" },
|
||||
{ .compatible = "atmel,at91rm9200-pmc", .data = &pmc_infos[0] },
|
||||
{ .compatible = "atmel,at91sam9260-pmc", .data = &pmc_infos[1] },
|
||||
{ .compatible = "atmel,at91sam9g45-pmc", .data = &pmc_infos[2] },
|
||||
{ .compatible = "atmel,at91sam9n12-pmc", .data = &pmc_infos[1] },
|
||||
{ .compatible = "atmel,at91sam9x5-pmc", .data = &pmc_infos[1] },
|
||||
{ .compatible = "atmel,sama5d3-pmc", .data = &pmc_infos[1] },
|
||||
{ .compatible = "atmel,sama5d2-pmc", .data = &pmc_infos[1] },
|
||||
{ /* sentinel */ },
|
||||
};
|
||||
|
||||
static void __init at91_pm_init(void (*pm_idle)(void))
|
||||
{
|
||||
struct device_node *pmc_np;
|
||||
const struct of_device_id *of_id;
|
||||
const struct pmc_info *pmc;
|
||||
|
||||
if (at91_cpuidle_device.dev.platform_data)
|
||||
platform_device_register(&at91_cpuidle_device);
|
||||
|
||||
pmc_np = of_find_matching_node(NULL, atmel_pmc_ids);
|
||||
pmc = of_iomap(pmc_np, 0);
|
||||
if (!pmc) {
|
||||
pmc_np = of_find_matching_node_and_match(NULL, atmel_pmc_ids, &of_id);
|
||||
pm_data.pmc = of_iomap(pmc_np, 0);
|
||||
if (!pm_data.pmc) {
|
||||
pr_err("AT91: PM not supported, PMC not found\n");
|
||||
return;
|
||||
}
|
||||
|
||||
pmc = of_id->data;
|
||||
pm_data.uhp_udp_mask = pmc->uhp_udp_mask;
|
||||
|
||||
if (pm_idle)
|
||||
arm_pm_idle = pm_idle;
|
||||
|
||||
@@ -478,40 +496,17 @@ void __init at91rm9200_pm_init(void)
|
||||
*/
|
||||
at91_ramc_write(0, AT91_MC_SDRAMC_LPR, 0);
|
||||
|
||||
at91_pm_data.uhp_udp_mask = AT91RM9200_PMC_UHP | AT91RM9200_PMC_UDP;
|
||||
at91_pm_data.memctrl = AT91_MEMCTRL_MC;
|
||||
|
||||
at91_pm_init(at91rm9200_idle);
|
||||
}
|
||||
|
||||
void __init at91sam9260_pm_init(void)
|
||||
void __init at91sam9_pm_init(void)
|
||||
{
|
||||
at91_dt_ramc();
|
||||
at91_pm_data.memctrl = AT91_MEMCTRL_SDRAMC;
|
||||
at91_pm_data.uhp_udp_mask = AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP;
|
||||
at91_pm_init(at91sam9_idle);
|
||||
}
|
||||
|
||||
void __init at91sam9g45_pm_init(void)
|
||||
{
|
||||
at91_dt_ramc();
|
||||
at91_pm_data.uhp_udp_mask = AT91SAM926x_PMC_UHP;
|
||||
at91_pm_data.memctrl = AT91_MEMCTRL_DDRSDR;
|
||||
at91_pm_init(at91sam9_idle);
|
||||
}
|
||||
|
||||
void __init at91sam9x5_pm_init(void)
|
||||
{
|
||||
at91_dt_ramc();
|
||||
at91_pm_data.uhp_udp_mask = AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP;
|
||||
at91_pm_data.memctrl = AT91_MEMCTRL_DDRSDR;
|
||||
at91_pm_init(at91sam9_idle);
|
||||
}
|
||||
|
||||
void __init sama5_pm_init(void)
|
||||
{
|
||||
at91_dt_ramc();
|
||||
at91_pm_data.uhp_udp_mask = AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP;
|
||||
at91_pm_data.memctrl = AT91_MEMCTRL_DDRSDR;
|
||||
at91_pm_init(NULL);
|
||||
}
|
||||
|
||||
+10
-14
@@ -17,24 +17,20 @@
|
||||
#include <soc/at91/at91sam9_ddrsdr.h>
|
||||
#include <soc/at91/at91sam9_sdramc.h>
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
#define at91_ramc_read(id, field) \
|
||||
__raw_readl(at91_ramc_base[id] + field)
|
||||
|
||||
#define at91_ramc_write(id, field, value) \
|
||||
__raw_writel(value, at91_ramc_base[id] + field)
|
||||
#endif
|
||||
|
||||
#define AT91_MEMCTRL_MC 0
|
||||
#define AT91_MEMCTRL_SDRAMC 1
|
||||
#define AT91_MEMCTRL_DDRSDR 2
|
||||
|
||||
#define AT91_PM_MEMTYPE_MASK 0x0f
|
||||
|
||||
#define AT91_PM_MODE_OFFSET 4
|
||||
#define AT91_PM_MODE_MASK 0x01
|
||||
#define AT91_PM_MODE(x) (((x) & AT91_PM_MODE_MASK) << AT91_PM_MODE_OFFSET)
|
||||
|
||||
#define AT91_PM_SLOW_CLOCK 0x01
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
struct at91_pm_data {
|
||||
void __iomem *pmc;
|
||||
void __iomem *ramc[2];
|
||||
unsigned long uhp_udp_mask;
|
||||
unsigned int memctrl;
|
||||
unsigned int mode;
|
||||
};
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
@@ -0,0 +1,13 @@
|
||||
#include <linux/stddef.h>
|
||||
#include <linux/kbuild.h>
|
||||
#include "pm.h"
|
||||
|
||||
int main(void)
|
||||
{
|
||||
DEFINE(PM_DATA_PMC, offsetof(struct at91_pm_data, pmc));
|
||||
DEFINE(PM_DATA_RAMC0, offsetof(struct at91_pm_data, ramc[0]));
|
||||
DEFINE(PM_DATA_RAMC1, offsetof(struct at91_pm_data, ramc[1]));
|
||||
DEFINE(PM_DATA_MEMCTRL, offsetof(struct at91_pm_data, memctrl));
|
||||
DEFINE(PM_DATA_MODE, offsetof(struct at91_pm_data, mode));
|
||||
return 0;
|
||||
}
|
||||
@@ -4,7 +4,7 @@
|
||||
* Copyright (C) 2006 Savin Zlobec
|
||||
*
|
||||
* AT91SAM9 support:
|
||||
* Copyright (C) 2007 Anti Sullin <anti.sullin@artecdesign.ee
|
||||
* Copyright (C) 2007 Anti Sullin <anti.sullin@artecdesign.ee>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
@@ -14,6 +14,7 @@
|
||||
#include <linux/linkage.h>
|
||||
#include <linux/clk/at91_pmc.h>
|
||||
#include "pm.h"
|
||||
#include "generated/at91_pm_data-offsets.h"
|
||||
|
||||
#define SRAMC_SELF_FRESH_ACTIVE 0x01
|
||||
#define SRAMC_SELF_FRESH_EXIT 0x00
|
||||
@@ -72,13 +73,9 @@ tmp2 .req r5
|
||||
.arm
|
||||
|
||||
/*
|
||||
* void at91_pm_suspend_in_sram(void __iomem *pmc, void __iomem *sdramc,
|
||||
* void __iomem *ramc1, int memctrl)
|
||||
* void at91_suspend_sram_fn(struct at91_pm_data*)
|
||||
* @input param:
|
||||
* @r0: base address of AT91_PMC
|
||||
* @r1: base address of SDRAM Controller (SDRAM, DDRSDR, or AT91_SYS)
|
||||
* @r2: base address of second SDRAM Controller or 0 if not present
|
||||
* @r3: pm information
|
||||
* @r0: base address of struct at91_pm_data
|
||||
*/
|
||||
/* at91_pm_suspend_in_sram must be 8-byte aligned per the requirements of fncpy() */
|
||||
.align 3
|
||||
@@ -90,16 +87,16 @@ ENTRY(at91_pm_suspend_in_sram)
|
||||
mov tmp1, #0
|
||||
mcr p15, 0, tmp1, c7, c10, 4
|
||||
|
||||
str r0, .pmc_base
|
||||
str r1, .sramc_base
|
||||
str r2, .sramc1_base
|
||||
|
||||
and r0, r3, #AT91_PM_MEMTYPE_MASK
|
||||
str r0, .memtype
|
||||
|
||||
lsr r0, r3, #AT91_PM_MODE_OFFSET
|
||||
and r0, r0, #AT91_PM_MODE_MASK
|
||||
str r0, .pm_mode
|
||||
ldr tmp1, [r0, #PM_DATA_PMC]
|
||||
str tmp1, .pmc_base
|
||||
ldr tmp1, [r0, #PM_DATA_RAMC0]
|
||||
str tmp1, .sramc_base
|
||||
ldr tmp1, [r0, #PM_DATA_RAMC1]
|
||||
str tmp1, .sramc1_base
|
||||
ldr tmp1, [r0, #PM_DATA_MEMCTRL]
|
||||
str tmp1, .memtype
|
||||
ldr tmp1, [r0, #PM_DATA_MODE]
|
||||
str tmp1, .pm_mode
|
||||
|
||||
/* Active the self-refresh mode */
|
||||
mov r0, #SRAMC_SELF_FRESH_ACTIVE
|
||||
|
||||
@@ -15,60 +15,10 @@
|
||||
#include <asm/system_misc.h>
|
||||
|
||||
#include "generic.h"
|
||||
#include "soc.h"
|
||||
|
||||
static const struct at91_soc sama5_socs[] = {
|
||||
AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D21CU_EXID_MATCH,
|
||||
"sama5d21", "sama5d2"),
|
||||
AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D22CU_EXID_MATCH,
|
||||
"sama5d22", "sama5d2"),
|
||||
AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D23CU_EXID_MATCH,
|
||||
"sama5d23", "sama5d2"),
|
||||
AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D24CX_EXID_MATCH,
|
||||
"sama5d24", "sama5d2"),
|
||||
AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D24CU_EXID_MATCH,
|
||||
"sama5d24", "sama5d2"),
|
||||
AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D26CU_EXID_MATCH,
|
||||
"sama5d26", "sama5d2"),
|
||||
AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D27CU_EXID_MATCH,
|
||||
"sama5d27", "sama5d2"),
|
||||
AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D27CN_EXID_MATCH,
|
||||
"sama5d27", "sama5d2"),
|
||||
AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D28CU_EXID_MATCH,
|
||||
"sama5d28", "sama5d2"),
|
||||
AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D28CN_EXID_MATCH,
|
||||
"sama5d28", "sama5d2"),
|
||||
AT91_SOC(SAMA5D3_CIDR_MATCH, SAMA5D31_EXID_MATCH,
|
||||
"sama5d31", "sama5d3"),
|
||||
AT91_SOC(SAMA5D3_CIDR_MATCH, SAMA5D33_EXID_MATCH,
|
||||
"sama5d33", "sama5d3"),
|
||||
AT91_SOC(SAMA5D3_CIDR_MATCH, SAMA5D34_EXID_MATCH,
|
||||
"sama5d34", "sama5d3"),
|
||||
AT91_SOC(SAMA5D3_CIDR_MATCH, SAMA5D35_EXID_MATCH,
|
||||
"sama5d35", "sama5d3"),
|
||||
AT91_SOC(SAMA5D3_CIDR_MATCH, SAMA5D36_EXID_MATCH,
|
||||
"sama5d36", "sama5d3"),
|
||||
AT91_SOC(SAMA5D4_CIDR_MATCH, SAMA5D41_EXID_MATCH,
|
||||
"sama5d41", "sama5d4"),
|
||||
AT91_SOC(SAMA5D4_CIDR_MATCH, SAMA5D42_EXID_MATCH,
|
||||
"sama5d42", "sama5d4"),
|
||||
AT91_SOC(SAMA5D4_CIDR_MATCH, SAMA5D43_EXID_MATCH,
|
||||
"sama5d43", "sama5d4"),
|
||||
AT91_SOC(SAMA5D4_CIDR_MATCH, SAMA5D44_EXID_MATCH,
|
||||
"sama5d44", "sama5d4"),
|
||||
{ /* sentinel */ },
|
||||
};
|
||||
|
||||
static void __init sama5_dt_device_init(void)
|
||||
{
|
||||
struct soc_device *soc;
|
||||
struct device *soc_dev = NULL;
|
||||
|
||||
soc = at91_soc_init(sama5_socs);
|
||||
if (soc != NULL)
|
||||
soc_dev = soc_device_to_device(soc);
|
||||
|
||||
of_platform_default_populate(NULL, NULL, soc_dev);
|
||||
of_platform_default_populate(NULL, NULL, NULL);
|
||||
sama5_pm_init();
|
||||
}
|
||||
|
||||
|
||||
@@ -1,142 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2015 Atmel
|
||||
*
|
||||
* Alexandre Belloni <alexandre.belloni@free-electrons.com
|
||||
* Boris Brezillon <boris.brezillon@free-electrons.com
|
||||
*
|
||||
* This file is licensed under the terms of the GNU General Public
|
||||
* License version 2. This program is licensed "as is" without any
|
||||
* warranty of any kind, whether express or implied.
|
||||
*
|
||||
*/
|
||||
|
||||
#define pr_fmt(fmt) "AT91: " fmt
|
||||
|
||||
#include <linux/io.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/of_address.h>
|
||||
#include <linux/of_platform.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/sys_soc.h>
|
||||
|
||||
#include "soc.h"
|
||||
|
||||
#define AT91_DBGU_CIDR 0x40
|
||||
#define AT91_DBGU_EXID 0x44
|
||||
#define AT91_CHIPID_CIDR 0x00
|
||||
#define AT91_CHIPID_EXID 0x04
|
||||
#define AT91_CIDR_VERSION(x) ((x) & 0x1f)
|
||||
#define AT91_CIDR_EXT BIT(31)
|
||||
#define AT91_CIDR_MATCH_MASK 0x7fffffe0
|
||||
|
||||
static int __init at91_get_cidr_exid_from_dbgu(u32 *cidr, u32 *exid)
|
||||
{
|
||||
struct device_node *np;
|
||||
void __iomem *regs;
|
||||
|
||||
np = of_find_compatible_node(NULL, NULL, "atmel,at91rm9200-dbgu");
|
||||
if (!np)
|
||||
np = of_find_compatible_node(NULL, NULL,
|
||||
"atmel,at91sam9260-dbgu");
|
||||
if (!np)
|
||||
return -ENODEV;
|
||||
|
||||
regs = of_iomap(np, 0);
|
||||
of_node_put(np);
|
||||
|
||||
if (!regs) {
|
||||
pr_warn("Could not map DBGU iomem range");
|
||||
return -ENXIO;
|
||||
}
|
||||
|
||||
*cidr = readl(regs + AT91_DBGU_CIDR);
|
||||
*exid = readl(regs + AT91_DBGU_EXID);
|
||||
|
||||
iounmap(regs);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int __init at91_get_cidr_exid_from_chipid(u32 *cidr, u32 *exid)
|
||||
{
|
||||
struct device_node *np;
|
||||
void __iomem *regs;
|
||||
|
||||
np = of_find_compatible_node(NULL, NULL, "atmel,sama5d2-chipid");
|
||||
if (!np)
|
||||
return -ENODEV;
|
||||
|
||||
regs = of_iomap(np, 0);
|
||||
of_node_put(np);
|
||||
|
||||
if (!regs) {
|
||||
pr_warn("Could not map DBGU iomem range");
|
||||
return -ENXIO;
|
||||
}
|
||||
|
||||
*cidr = readl(regs + AT91_CHIPID_CIDR);
|
||||
*exid = readl(regs + AT91_CHIPID_EXID);
|
||||
|
||||
iounmap(regs);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
struct soc_device * __init at91_soc_init(const struct at91_soc *socs)
|
||||
{
|
||||
struct soc_device_attribute *soc_dev_attr;
|
||||
const struct at91_soc *soc;
|
||||
struct soc_device *soc_dev;
|
||||
u32 cidr, exid;
|
||||
int ret;
|
||||
|
||||
/*
|
||||
* With SAMA5D2 and later SoCs, CIDR and EXID registers are no more
|
||||
* in the dbgu device but in the chipid device whose purpose is only
|
||||
* to expose these two registers.
|
||||
*/
|
||||
ret = at91_get_cidr_exid_from_dbgu(&cidr, &exid);
|
||||
if (ret)
|
||||
ret = at91_get_cidr_exid_from_chipid(&cidr, &exid);
|
||||
if (ret) {
|
||||
if (ret == -ENODEV)
|
||||
pr_warn("Could not find identification node");
|
||||
return NULL;
|
||||
}
|
||||
|
||||
for (soc = socs; soc->name; soc++) {
|
||||
if (soc->cidr_match != (cidr & AT91_CIDR_MATCH_MASK))
|
||||
continue;
|
||||
|
||||
if (!(cidr & AT91_CIDR_EXT) || soc->exid_match == exid)
|
||||
break;
|
||||
}
|
||||
|
||||
if (!soc->name) {
|
||||
pr_warn("Could not find matching SoC description\n");
|
||||
return NULL;
|
||||
}
|
||||
|
||||
soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
|
||||
if (!soc_dev_attr)
|
||||
return NULL;
|
||||
|
||||
soc_dev_attr->family = soc->family;
|
||||
soc_dev_attr->soc_id = soc->name;
|
||||
soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%X",
|
||||
AT91_CIDR_VERSION(cidr));
|
||||
soc_dev = soc_device_register(soc_dev_attr);
|
||||
if (IS_ERR(soc_dev)) {
|
||||
kfree(soc_dev_attr->revision);
|
||||
kfree(soc_dev_attr);
|
||||
pr_warn("Could not register SoC device\n");
|
||||
return NULL;
|
||||
}
|
||||
|
||||
if (soc->family)
|
||||
pr_info("Detected SoC family: %s\n", soc->family);
|
||||
pr_info("Detected SoC: %s, revision %X\n", soc->name,
|
||||
AT91_CIDR_VERSION(cidr));
|
||||
|
||||
return soc_dev;
|
||||
}
|
||||
@@ -198,7 +198,9 @@ config ARCH_BRCMSTB
|
||||
select HAVE_ARM_ARCH_TIMER
|
||||
select BRCMSTB_L2_IRQ
|
||||
select BCM7120_L2_IRQ
|
||||
select ARCH_HAS_HOLES_MEMORYMODEL
|
||||
select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE
|
||||
select ZONE_DMA if ARM_LPAE
|
||||
select SOC_BRCMSTB
|
||||
select SOC_BUS
|
||||
help
|
||||
|
||||
@@ -828,6 +828,9 @@ static struct regulator_consumer_supply fixed_supplies[] = {
|
||||
|
||||
/* Baseboard 1.8V: 5V -> TPS73701DCQ -> 1.8V */
|
||||
REGULATOR_SUPPLY("DVDD", "1-0018"),
|
||||
|
||||
/* UI card 3.3V: 5V -> TPS73701DCQ -> 3.3V */
|
||||
REGULATOR_SUPPLY("vcc", "1-0020"),
|
||||
};
|
||||
|
||||
/* TPS65070 voltage regulator support */
|
||||
@@ -1213,6 +1216,7 @@ static struct vpif_subdev_info da850_vpif_capture_sdev_info[] = {
|
||||
static struct vpif_capture_config da850_vpif_capture_config = {
|
||||
.subdev_info = da850_vpif_capture_sdev_info,
|
||||
.subdev_count = ARRAY_SIZE(da850_vpif_capture_sdev_info),
|
||||
.i2c_adapter_id = 1,
|
||||
.chan_config[0] = {
|
||||
.inputs = da850_ch0_inputs,
|
||||
.input_count = ARRAY_SIZE(da850_ch0_inputs),
|
||||
|
||||
@@ -744,7 +744,8 @@ static int davinci_phy_fixup(struct phy_device *phydev)
|
||||
return 0;
|
||||
}
|
||||
|
||||
#define HAS_ATA IS_ENABLED(CONFIG_BLK_DEV_PALMCHIP_BK3710)
|
||||
#define HAS_ATA (IS_ENABLED(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
|
||||
IS_ENABLED(CONFIG_PATA_BK3710))
|
||||
|
||||
#define HAS_NOR IS_ENABLED(CONFIG_MTD_PHYSMAP)
|
||||
|
||||
|
||||
@@ -119,7 +119,8 @@ static struct platform_device davinci_nand_device = {
|
||||
},
|
||||
};
|
||||
|
||||
#define HAS_ATA IS_ENABLED(CONFIG_BLK_DEV_PALMCHIP_BK3710)
|
||||
#define HAS_ATA (IS_ENABLED(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
|
||||
IS_ENABLED(CONFIG_PATA_BK3710))
|
||||
|
||||
#ifdef CONFIG_I2C
|
||||
/* CPLD Register 0 bits to control ATA */
|
||||
|
||||
@@ -163,7 +163,8 @@ static struct davinci_mmc_config davinci_ntosd2_mmc_config = {
|
||||
.wires = 4,
|
||||
};
|
||||
|
||||
#define HAS_ATA IS_ENABLED(CONFIG_BLK_DEV_PALMCHIP_BK3710)
|
||||
#define HAS_ATA (IS_ENABLED(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
|
||||
IS_ENABLED(CONFIG_PATA_BK3710))
|
||||
|
||||
#define HAS_NAND IS_ENABLED(CONFIG_MTD_NAND_DAVINCI)
|
||||
|
||||
|
||||
@@ -304,6 +304,11 @@ static struct clk usb20_clk = {
|
||||
.gpsc = 1,
|
||||
};
|
||||
|
||||
static struct clk cppi41_clk = {
|
||||
.name = "cppi41",
|
||||
.parent = &usb20_clk,
|
||||
};
|
||||
|
||||
static struct clk aemif_clk = {
|
||||
.name = "aemif",
|
||||
.parent = &pll0_sysclk3,
|
||||
@@ -413,6 +418,7 @@ static struct clk_lookup da830_clks[] = {
|
||||
CLK("davinci-mcasp.1", NULL, &mcasp1_clk),
|
||||
CLK("davinci-mcasp.2", NULL, &mcasp2_clk),
|
||||
CLK("musb-da8xx", "usb20", &usb20_clk),
|
||||
CLK("cppi41-dmaengine", NULL, &cppi41_clk),
|
||||
CLK(NULL, "aemif", &aemif_clk),
|
||||
CLK(NULL, "aintc", &aintc_clk),
|
||||
CLK(NULL, "secu_mgr", &secu_mgr_clk),
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user