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Merge tag 'gpio-v4.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio
Pull GPIO updates from Linus Walleij:
"This is the bulk of GPIO changes for the v4.3 kernel cycle.
There is quite a lot going on in the GPIO subsystem this merge window,
so the main matter is decribed below.
The hits in other subsystems when making the GPIO flags optional are
all ACKed by their respective subsystem maintainers.
Core changes:
- Root out the wrapper devm_gpiod_get() and gpiod_get() etc versions
of the descriptor calls that did not use the flags argument on the
end. This was around for too long and eventually Uwe Kleine-König
took the time to clean it out and the last users are removed along
with the macros in this tag. In several cases the use of flags
simplifies the code. For this reason we have (ACKed) patches
hitting in DRM, IIO, media, NFC, USB+PHY up until we hammer in the
nail with removing the macros.
- Add a fat document describing how much ready-made GPIO stuff we
have i the kernel to discourage people from reinventing a square
wheel in userspace, as so often happens.
- Create a separate lockdep class for each instance of a GPIO IRQ
chip instead of using one class for all chips, as the current code
will not work with systems with several GPIO chips doing lockdep
debugging.
- Protect against driver unloading also when a GPIO line is only used
as IRQ for the GPIOLIB_IRQCHIP helpers.
- If the GPIO chip has no designated owner, assign the parent device
driver owner as owner.
- Consolidation of chained IRQ handler install/remove replacing all
call sites where irq_set_handler_data() and
irq_set_chained_handler() were done in succession with a combined
call to irq_set_chained_handler_and_data().
This series was created by Thomas Gleixner after the problem was
observed by Russell King.
- Tglx also made another series of patches switching
__irq_set_handler_locked() for irq_set_handler_locked() which is
way cleaner.
- Tglx and Jiang Liu wrote a good bunch of patches to make use of
irq_desc_get_xxx() accessors and avoid looking up irq_descs from
IRQ numbers. The goal is to get rid of the irq number from the
handlers in the IRQ flow which is nice.
- Rob Herring killed off the set_irq_flags() for all GPIO drivers.
This was an ARM specific function that is replaced with the generic
irq_modify_status() where special flags are actually needed.
- When an OF node has a pin range for its GPIOs, return -EPROBE_DEFER
if the pin controller isn't available. Pretty logical, yet needed
to be fixed.
- If a driver using GPIOLIB_IRQCHIP has its own irq_*_resources call
back, then call these instead of the defaults provided by the
GPIOLIB.
- Fix an undocumented ABI hole: named GPIOs were not properly
documented.
Driver improvements:
- Add get_direction() support to the generic GPIO driver, it's
strange that we didn't have that before.
- Make it possible to have input-only GPIO chips using the generic
GPIO driver.
- Clean out platform data support from the Emma Mobile (EM) driver
- Finegrained runtime PM support for the RCAR driver.
- Support r8a7795 (R-car H3) in the RCAR driver.
- Support interrupts on GPIOs 16 thru 31 in the DaVinci driver.
- Some consolidation and new support in the MPC8xxx driver, we now
support MPC5125.
- Preempt-RT-friendly patches: the OMAP, MPC8xxx, drivers uses raw
spinlocks making it work better with the realime patches.
- Interrupt support for the EXTRAXFS GPIO driver.
- Make the ETRAXFS GPIO driver support also ARTPEC-3.
- Interrupt and wakeup support for the BRCMSTB driver, also for
wakeup from S5 cold boot.
- Mask MXC IRQs during suspend.
- Improve OMAP2 GPIO set_debounce() to work according to spec.
- The VF610 driver handles IRQs properly.
New drivers:
- ZTE ZX GPIO driver"
* tag 'gpio-v4.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (87 commits)
Revert "gpio: extraxfs: fix returnvar.cocci warnings"
gpio: tc3589x: use static container helper
gpio: xlp: fix error return code
gpio: vf610: handle level IRQ's properly
gpio: max732x: Fix error handling in probe()
gpio: omap: fix clk_prepare/unprepare usage
gpio: omap: protect regs access in omap_gpio_irq_handler
gpio: omap: fix omap2_set_gpio_debounce
gpio: omap: switch to use platform_get_irq
gpio: omap: remove wrong irq_domain_remove usage in probe
gpiolib: add description for gpio irqchip fields in struct gpio_chip
gpio: extraxfs: fix returnvar.cocci warnings
gpiolib: irqchip: use different lockdep class for each gpio irqchip
gpio/grgpio: fix deadlock in grgpio_irq_unmap()
Documentation: gpio: consumer: describe active low property
gpio: mxc: fix section mismatch warning
gpio/mxc: mask gpio interrupts in suspend
gpio: omap: Fix missing raw locks conversion
gpio: brcmstb: support wakeup from S5 cold boot
gpio: brcmstb: Add interrupt and wakeup source support
...
This commit is contained in:
Linus Torvalds
@@ -16,7 +16,8 @@ Description:
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/sys/class/gpio
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/export ... asks the kernel to export a GPIO to userspace
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/unexport ... to return a GPIO to the kernel
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/gpioN ... for each exported GPIO #N
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/gpioN ... for each exported GPIO #N OR
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/<LINE-NAME> ... for a properly named GPIO line
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/value ... always readable, writes fail for input GPIOs
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/direction ... r/w as: in, out (default low); write: high, low
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/edge ... r/w as: none, falling, rising, both
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@@ -33,6 +33,13 @@ Optional properties:
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- interrupt-parent:
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phandle of the parent interrupt controller
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- interrupts-extended:
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Alternate form of specifying interrupts and parents that allows for
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multiple parents. This takes precedence over 'interrupts' and
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'interrupt-parent'. Wakeup-capable GPIO controllers often route their
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wakeup interrupt lines through a different interrupt controller than the
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primary interrupt line, making this property necessary.
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- #interrupt-cells:
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Should be <2>. The first cell is the GPIO number, the second should specify
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flags. The following subset of flags is supported:
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@@ -47,19 +54,33 @@ Optional properties:
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- interrupt-controller:
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Marks the device node as an interrupt controller
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- interrupt-names:
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The name of the IRQ resource used by this controller
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- wakeup-source:
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GPIOs for this controller can be used as a wakeup source
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Example:
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upg_gio: gpio@f040a700 {
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#gpio-cells = <0x2>;
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#interrupt-cells = <0x2>;
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#gpio-cells = <2>;
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#interrupt-cells = <2>;
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compatible = "brcm,bcm7445-gpio", "brcm,brcmstb-gpio";
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gpio-controller;
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interrupt-controller;
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reg = <0xf040a700 0x80>;
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interrupt-parent = <0xf>;
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interrupt-parent = <&irq0_intc>;
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interrupts = <0x6>;
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interrupt-names = "upg_gio";
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brcm,gpio-bank-widths = <0x20 0x20 0x20 0x18>;
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brcm,gpio-bank-widths = <32 32 32 24>;
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};
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upg_gio_aon: gpio@f04172c0 {
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#gpio-cells = <2>;
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#interrupt-cells = <2>;
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compatible = "brcm,bcm7445-gpio", "brcm,brcmstb-gpio";
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gpio-controller;
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interrupt-controller;
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reg = <0xf04172c0 0x40>;
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interrupt-parent = <&irq0_aon_intc>;
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interrupts = <0x6>;
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interrupts-extended = <&irq0_aon_intc 0x6>,
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<&aon_pm_l2_intc 0x5>;
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wakeup-source;
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brcm,gpio-bank-widths = <18 4>;
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};
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@@ -2,8 +2,9 @@ Axis ETRAX FS General I/O controller bindings
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Required properties:
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- compatible:
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- compatible: one of:
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- "axis,etraxfs-gio"
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- "axis,artpec3-gio"
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- reg: Physical base address and length of the controller's registers.
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- #gpio-cells: Should be 3
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- The first cell is the gpio offset number.
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@@ -0,0 +1,22 @@
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* Freescale MPC512x/MPC8xxx GPIO controller
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Required properties:
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- compatible : Should be "fsl,<soc>-gpio"
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The following <soc>s are known to be supported:
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mpc5121, mpc5125, mpc8349, mpc8572, mpc8610, pq3, qoriq
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- reg : Address and length of the register set for the device
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- interrupts : Should be the port interrupt shared by all 32 pins.
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- #gpio-cells : Should be two. The first cell is the pin number and
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the second cell is used to specify the gpio polarity:
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0 = active high
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1 = active low
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Example:
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gpio0: gpio@1100 {
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compatible = "fsl,mpc5125-gpio";
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#gpio-cells = <2>;
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reg = <0x1100 0x080>;
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interrupts = <78 0x8>;
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status = "okay";
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};
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@@ -9,6 +9,7 @@ Required Properties:
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- "renesas,gpio-r8a7791": for R8A7791 (R-Car M2-W) compatible GPIO controller.
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- "renesas,gpio-r8a7793": for R8A7793 (R-Car M2-N) compatible GPIO controller.
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- "renesas,gpio-r8a7794": for R8A7794 (R-Car E2) compatible GPIO controller.
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- "renesas,gpio-r8a7795": for R8A7795 (R-Car H3) compatible GPIO controller.
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- "renesas,gpio-rcar": for generic R-Car GPIO controller.
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- reg: Base address and length of each memory resource used by the GPIO
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@@ -0,0 +1,24 @@
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ZTE ZX296702 GPIO controller
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Required properties:
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- compatible : "zte,zx296702-gpio"
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- #gpio-cells : Should be two. The first cell is the pin number and the
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second cell is used to specify optional parameters:
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- bit 0 specifies polarity (0 for normal, 1 for inverted)
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- gpio-controller : Marks the device node as a GPIO controller.
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- interrupts : Interrupt mapping for GPIO IRQ.
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- gpio-ranges : Interaction with the PINCTRL subsystem.
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gpio1: gpio@b008040 {
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compatible = "zte,zx296702-gpio";
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reg = <0xb008040 0x40>;
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gpio-controller;
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#gpio-cells = <2>;
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gpio-ranges = < &pmx0 0 54 2 &pmx0 2 59 14>;
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interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-parent = <&intc>;
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interrupt-controller;
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#interrupt-cells = <2>;
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clock-names = "gpio_pclk";
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clocks = <&lsp0clk ZX296702_GPIO_CLK>;
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};
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@@ -6,6 +6,9 @@ consumer.txt
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- How to obtain and use GPIOs in a driver
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driver.txt
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- How to write a GPIO driver
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drivers-on-gpio.txt:
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- Drivers in other subsystems that can use GPIO to provide more
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complex functionality.
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board.txt
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- How to assign GPIOs to a consumer device and a function
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sysfs.txt
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@@ -237,6 +237,39 @@ Note that these functions should only be used with great moderation ; a driver
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should not have to care about the physical line level.
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The active-low property
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-----------------------
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As a driver should not have to care about the physical line level, all of the
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gpiod_set_value_xxx() or gpiod_set_array_value_xxx() functions operate with
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the *logical* value. With this they take the active-low property into account.
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This means that they check whether the GPIO is configured to be active-low,
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and if so, they manipulate the passed value before the physical line level is
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driven.
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With this, all the gpiod_set_(array)_value_xxx() functions interpret the
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parameter "value" as "active" ("1") or "inactive" ("0"). The physical line
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level will be driven accordingly.
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As an example, if the active-low property for a dedicated GPIO is set, and the
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gpiod_set_(array)_value_xxx() passes "active" ("1"), the physical line level
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will be driven low.
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To summarize:
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Function (example) active-low proporty physical line
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gpiod_set_raw_value(desc, 0); don't care low
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gpiod_set_raw_value(desc, 1); don't care high
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gpiod_set_value(desc, 0); default (active-high) low
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gpiod_set_value(desc, 1); default (active-high) high
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gpiod_set_value(desc, 0); active-low high
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gpiod_set_value(desc, 1); active-low low
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Please note again that the set_raw/get_raw functions should be avoided as much
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as possible, especially by drivers which should not care about the actual
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physical line level and worry about the logical value instead.
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Set multiple GPIO outputs with a single function call
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-----------------------------------------------------
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The following functions set the output values of an array of GPIOs:
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@@ -0,0 +1,95 @@
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Subsystem drivers using GPIO
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============================
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Note that standard kernel drivers exist for common GPIO tasks and will provide
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the right in-kernel and userspace APIs/ABIs for the job, and that these
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drivers can quite easily interconnect with other kernel subsystems using
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hardware descriptions such as device tree or ACPI:
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- leds-gpio: drivers/leds/leds-gpio.c will handle LEDs connected to GPIO
|
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lines, giving you the LED sysfs interface
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- ledtrig-gpio: drivers/leds/trigger/ledtrig-gpio.c will provide a LED trigger,
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i.e. a LED will turn on/off in response to a GPIO line going high or low
|
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(and that LED may in turn use the leds-gpio as per above).
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- gpio-keys: drivers/input/keyboard/gpio_keys.c is used when your GPIO line
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can generate interrupts in response to a key press. Also supports debounce.
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- gpio-keys-polled: drivers/input/keyboard/gpio_keys_polled.c is used when your
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GPIO line cannot generate interrupts, so it needs to be periodically polled
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by a timer.
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- gpio_mouse: drivers/input/mouse/gpio_mouse.c is used to provide a mouse with
|
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up to three buttons by simply using GPIOs and no mouse port. You can cut the
|
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mouse cable and connect the wires to GPIO lines or solder a mouse connector
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to the lines for a more permanent solution of this type.
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- gpio-beeper: drivers/input/misc/gpio-beeper.c is used to provide a beep from
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an external speaker connected to a GPIO line.
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- gpio-tilt-polled: drivers/input/misc/gpio_tilt_polled.c provides tilt
|
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detection switches using GPIO, which is useful for your homebrewn pinball
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machine if for nothing else. It can detect different tilt angles of the
|
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monitored object.
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|
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- extcon-gpio: drivers/extcon/extcon-gpio.c is used when you need to read an
|
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external connector status, such as a headset line for an audio driver or an
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HDMI connector. It will provide a better userspace sysfs interface than GPIO.
|
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|
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- restart-gpio: drivers/power/gpio-restart.c is used to restart/reboot the
|
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system by pulling a GPIO line and will register a restart handler so
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userspace can issue the right system call to restart the system.
|
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|
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- poweroff-gpio: drivers/power/gpio-poweroff.c is used to power the system down
|
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by pulling a GPIO line and will register a pm_power_off() callback so that
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userspace can issue the right system call to power down the system.
|
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|
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- gpio-gate-clock: drivers/clk/clk-gpio-gate.c is used to control a gated clock
|
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(off/on) that uses a GPIO, and integrated with the clock subsystem.
|
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|
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- i2c-gpio: drivers/i2c/busses/i2c-gpio.c is used to drive an I2C bus
|
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(two wires, SDA and SCL lines) by hammering (bitbang) two GPIO lines. It will
|
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appear as any other I2C bus to the system and makes it possible to connect
|
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drivers for the I2C devices on the bus like any other I2C bus driver.
|
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|
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- spi_gpio: drivers/spi/spi-gpio.c is used to drive an SPI bus (variable number
|
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of wires, atleast SCK and optionally MISO, MOSI and chip select lines) using
|
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GPIO hammering (bitbang). It will appear as any other SPI bus on the system
|
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and makes it possible to connect drivers for SPI devices on the bus like
|
||||
any other SPI bus driver. For example any MMC/SD card can then be connected
|
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to this SPI by using the mmc_spi host from the MMC/SD card subsystem.
|
||||
|
||||
- w1-gpio: drivers/w1/masters/w1-gpio.c is used to drive a one-wire bus using
|
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a GPIO line, integrating with the W1 subsystem and handling devices on
|
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the bus like any other W1 device.
|
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|
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- gpio-fan: drivers/hwmon/gpio-fan.c is used to control a fan for cooling the
|
||||
system, connected to a GPIO line (and optionally a GPIO alarm line),
|
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presenting all the right in-kernel and sysfs interfaces to make your system
|
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not overheat.
|
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|
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- gpio-regulator: drivers/regulator/gpio-regulator.c is used to control a
|
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regulator providing a certain voltage by pulling a GPIO line, integrating
|
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with the regulator subsystem and giving you all the right interfaces.
|
||||
|
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- gpio-wdt: drivers/watchdog/gpio_wdt.c is used to provide a watchdog timer
|
||||
that will periodically "ping" a hardware connected to a GPIO line by toggling
|
||||
it from 1-to-0-to-1. If that hardware does not recieve its "ping"
|
||||
periodically, it will reset the system.
|
||||
|
||||
- gpio-nand: drivers/mtd/nand/gpio.c is used to connect a NAND flash chip to
|
||||
a set of simple GPIO lines: RDY, NCE, ALE, CLE, NWP. It interacts with the
|
||||
NAND flash MTD subsystem and provides chip access and partition parsing like
|
||||
any other NAND driving hardware.
|
||||
|
||||
Apart from this there are special GPIO drivers in subsystems like MMC/SD to
|
||||
read card detect and write protect GPIO lines, and in the TTY serial subsystem
|
||||
to emulate MCTRL (modem control) signals CTS/RTS by using two GPIO lines. The
|
||||
MTD NOR flash has add-ons for extra GPIO lines too, though the address bus is
|
||||
usually connected directly to the flash.
|
||||
|
||||
Use those instead of talking directly to the GPIOs using sysfs; they integrate
|
||||
with kernel frameworks better than your userspace code could. Needless to say,
|
||||
just using the apropriate kernel drivers will simplify and speed up your
|
||||
embedded hacking in particular by providing ready-made components.
|
||||
@@ -20,11 +20,10 @@ userspace GPIO can be used to determine system configuration data that
|
||||
standard kernels won't know about. And for some tasks, simple userspace
|
||||
GPIO drivers could be all that the system really needs.
|
||||
|
||||
Note that standard kernel drivers exist for common "LEDs and Buttons"
|
||||
GPIO tasks: "leds-gpio" and "gpio_keys", respectively. Use those
|
||||
instead of talking directly to the GPIOs; they integrate with kernel
|
||||
frameworks better than your userspace code could.
|
||||
|
||||
DO NOT ABUSE SYFS TO CONTROL HARDWARE THAT HAS PROPER KERNEL DRIVERS.
|
||||
PLEASE READ THE DOCUMENT NAMED "drivers-on-gpio.txt" IN THIS DOCUMENTATION
|
||||
DIRECTORY TO AVOID REINVENTING KERNEL WHEELS IN USERSPACE. I MEAN IT.
|
||||
REALLY.
|
||||
|
||||
Paths in Sysfs
|
||||
--------------
|
||||
|
||||
@@ -113,7 +113,6 @@ config GPIO_74XX_MMIO
|
||||
config GPIO_ALTERA
|
||||
tristate "Altera GPIO"
|
||||
depends on OF_GPIO
|
||||
select GPIO_GENERIC
|
||||
select GPIOLIB_IRQCHIP
|
||||
help
|
||||
Say Y or M here to build support for the Altera PIO device.
|
||||
@@ -131,6 +130,7 @@ config GPIO_BRCMSTB
|
||||
default y if ARCH_BRCMSTB
|
||||
depends on OF_GPIO && (ARCH_BRCMSTB || COMPILE_TEST)
|
||||
select GPIO_GENERIC
|
||||
select GPIOLIB_IRQCHIP
|
||||
help
|
||||
Say yes here to enable GPIO support for Broadcom STB (BCM7XXX) SoCs.
|
||||
|
||||
@@ -172,6 +172,7 @@ config GPIO_ETRAXFS
|
||||
depends on CRIS || COMPILE_TEST
|
||||
depends on OF
|
||||
select GPIO_GENERIC
|
||||
select GPIOLIB_IRQCHIP
|
||||
help
|
||||
Say yes here to support the GPIO controller on Axis ETRAX FS SoCs.
|
||||
|
||||
@@ -308,7 +309,6 @@ config GPIO_MVEBU
|
||||
def_bool y
|
||||
depends on PLAT_ORION
|
||||
depends on OF
|
||||
select GPIO_GENERIC
|
||||
select GENERIC_IRQ_CHIP
|
||||
|
||||
config GPIO_MXC
|
||||
@@ -1005,6 +1005,12 @@ config GPIO_MC33880
|
||||
SPI driver for Freescale MC33880 high-side/low-side switch.
|
||||
This provides GPIO interface supporting inputs and outputs.
|
||||
|
||||
config GPIO_ZX
|
||||
bool "ZTE ZX GPIO support"
|
||||
select GPIOLIB_IRQCHIP
|
||||
help
|
||||
Say yes here to support the GPIO device on ZTE ZX SoCs.
|
||||
|
||||
endmenu
|
||||
|
||||
menu "USB GPIO expanders"
|
||||
|
||||
@@ -117,3 +117,4 @@ obj-$(CONFIG_GPIO_XLP) += gpio-xlp.o
|
||||
obj-$(CONFIG_GPIO_XTENSA) += gpio-xtensa.o
|
||||
obj-$(CONFIG_GPIO_ZEVIO) += gpio-zevio.o
|
||||
obj-$(CONFIG_GPIO_ZYNQ) += gpio-zynq.o
|
||||
obj-$(CONFIG_GPIO_ZX) += gpio-zx.o
|
||||
|
||||
@@ -59,13 +59,13 @@ static int devm_gpiod_match_array(struct device *dev, void *res, void *data)
|
||||
* automatically disposed on driver detach. See gpiod_get() for detailed
|
||||
* information about behavior and return values.
|
||||
*/
|
||||
struct gpio_desc *__must_check __devm_gpiod_get(struct device *dev,
|
||||
struct gpio_desc *__must_check devm_gpiod_get(struct device *dev,
|
||||
const char *con_id,
|
||||
enum gpiod_flags flags)
|
||||
{
|
||||
return devm_gpiod_get_index(dev, con_id, 0, flags);
|
||||
}
|
||||
EXPORT_SYMBOL(__devm_gpiod_get);
|
||||
EXPORT_SYMBOL(devm_gpiod_get);
|
||||
|
||||
/**
|
||||
* devm_gpiod_get_optional - Resource-managed gpiod_get_optional()
|
||||
@@ -77,13 +77,13 @@ EXPORT_SYMBOL(__devm_gpiod_get);
|
||||
* are automatically disposed on driver detach. See gpiod_get_optional() for
|
||||
* detailed information about behavior and return values.
|
||||
*/
|
||||
struct gpio_desc *__must_check __devm_gpiod_get_optional(struct device *dev,
|
||||
struct gpio_desc *__must_check devm_gpiod_get_optional(struct device *dev,
|
||||
const char *con_id,
|
||||
enum gpiod_flags flags)
|
||||
{
|
||||
return devm_gpiod_get_index_optional(dev, con_id, 0, flags);
|
||||
}
|
||||
EXPORT_SYMBOL(__devm_gpiod_get_optional);
|
||||
EXPORT_SYMBOL(devm_gpiod_get_optional);
|
||||
|
||||
/**
|
||||
* devm_gpiod_get_index - Resource-managed gpiod_get_index()
|
||||
@@ -96,7 +96,7 @@ EXPORT_SYMBOL(__devm_gpiod_get_optional);
|
||||
* automatically disposed on driver detach. See gpiod_get_index() for detailed
|
||||
* information about behavior and return values.
|
||||
*/
|
||||
struct gpio_desc *__must_check __devm_gpiod_get_index(struct device *dev,
|
||||
struct gpio_desc *__must_check devm_gpiod_get_index(struct device *dev,
|
||||
const char *con_id,
|
||||
unsigned int idx,
|
||||
enum gpiod_flags flags)
|
||||
@@ -120,7 +120,7 @@ struct gpio_desc *__must_check __devm_gpiod_get_index(struct device *dev,
|
||||
|
||||
return desc;
|
||||
}
|
||||
EXPORT_SYMBOL(__devm_gpiod_get_index);
|
||||
EXPORT_SYMBOL(devm_gpiod_get_index);
|
||||
|
||||
/**
|
||||
* devm_get_gpiod_from_child - get a GPIO descriptor from a device's child node
|
||||
@@ -182,10 +182,10 @@ EXPORT_SYMBOL(devm_get_gpiod_from_child);
|
||||
* gpiod_get_index_optional() for detailed information about behavior and
|
||||
* return values.
|
||||
*/
|
||||
struct gpio_desc *__must_check __devm_gpiod_get_index_optional(struct device *dev,
|
||||
struct gpio_desc *__must_check devm_gpiod_get_index_optional(struct device *dev,
|
||||
const char *con_id,
|
||||
unsigned int index,
|
||||
enum gpiod_flags flags)
|
||||
enum gpiod_flags flags)
|
||||
{
|
||||
struct gpio_desc *desc;
|
||||
|
||||
@@ -197,7 +197,7 @@ struct gpio_desc *__must_check __devm_gpiod_get_index_optional(struct device *de
|
||||
|
||||
return desc;
|
||||
}
|
||||
EXPORT_SYMBOL(__devm_gpiod_get_index_optional);
|
||||
EXPORT_SYMBOL(devm_gpiod_get_index_optional);
|
||||
|
||||
/**
|
||||
* devm_gpiod_get_array - Resource-managed gpiod_get_array()
|
||||
|
||||
@@ -129,7 +129,7 @@ static int mmio_74xx_gpio_probe(struct platform_device *pdev)
|
||||
if (IS_ERR(dat))
|
||||
return PTR_ERR(dat);
|
||||
|
||||
priv->flags = (unsigned)of_id->data;
|
||||
priv->flags = (uintptr_t) of_id->data;
|
||||
|
||||
err = bgpio_init(&priv->bgc, &pdev->dev,
|
||||
DIV_ROUND_UP(MMIO_74XX_BIT_CNT(priv->flags), 8),
|
||||
|
||||
@@ -305,15 +305,7 @@ static int adp5588_irq_setup(struct adp5588_gpio *dev)
|
||||
irq_set_chip_and_handler(irq, &adp5588_irq_chip,
|
||||
handle_level_irq);
|
||||
irq_set_nested_thread(irq, 1);
|
||||
#ifdef CONFIG_ARM
|
||||
/*
|
||||
* ARM needs us to explicitly flag the IRQ as VALID,
|
||||
* once we do so, it will also set the noprobe.
|
||||
*/
|
||||
set_irq_flags(irq, IRQF_VALID);
|
||||
#else
|
||||
irq_set_noprobe(irq);
|
||||
#endif
|
||||
irq_modify_status(irq, IRQ_NOREQUEST, IRQ_NOPROBE);
|
||||
}
|
||||
|
||||
ret = request_threaded_irq(client->irq,
|
||||
|
||||
@@ -338,9 +338,9 @@ static int altera_gpio_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct altera_gpio_chip *altera_gc = platform_get_drvdata(pdev);
|
||||
|
||||
gpiochip_remove(&altera_gc->mmchip.gc);
|
||||
of_mm_gpiochip_remove(&altera_gc->mmchip);
|
||||
|
||||
return -EIO;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct of_device_id altera_gpio_of_match[] = {
|
||||
|
||||
@@ -438,7 +438,7 @@ static void bcm_kona_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
|
||||
void __iomem *reg_base;
|
||||
int bit, bank_id;
|
||||
unsigned long sta;
|
||||
struct bcm_kona_gpio_bank *bank = irq_get_handler_data(irq);
|
||||
struct bcm_kona_gpio_bank *bank = irq_desc_get_handler_data(desc);
|
||||
struct irq_chip *chip = irq_desc_get_chip(desc);
|
||||
|
||||
chained_irq_enter(chip, desc);
|
||||
@@ -525,11 +525,7 @@ static int bcm_kona_gpio_irq_map(struct irq_domain *d, unsigned int irq,
|
||||
return ret;
|
||||
irq_set_lockdep_class(irq, &gpio_lock_class);
|
||||
irq_set_chip_and_handler(irq, &bcm_gpio_irq_chip, handle_simple_irq);
|
||||
#ifdef CONFIG_ARM
|
||||
set_irq_flags(irq, IRQF_VALID);
|
||||
#else
|
||||
irq_set_noprobe(irq);
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
}
|
||||
@@ -644,17 +640,6 @@ static int bcm_kona_gpio_probe(struct platform_device *pdev)
|
||||
dev_err(dev, "Couldn't add GPIO chip -- %d\n", ret);
|
||||
goto err_irq_domain;
|
||||
}
|
||||
for (i = 0; i < chip->ngpio; i++) {
|
||||
int irq = bcm_kona_gpio_to_irq(chip, i);
|
||||
irq_set_lockdep_class(irq, &gpio_lock_class);
|
||||
irq_set_chip_and_handler(irq, &bcm_gpio_irq_chip,
|
||||
handle_simple_irq);
|
||||
#ifdef CONFIG_ARM
|
||||
set_irq_flags(irq, IRQF_VALID);
|
||||
#else
|
||||
irq_set_noprobe(irq);
|
||||
#endif
|
||||
}
|
||||
for (i = 0; i < kona_gpio->num_bank; i++) {
|
||||
bank = &kona_gpio->banks[i];
|
||||
irq_set_chained_handler_and_data(bank->irq,
|
||||
|
||||
+300
-6
@@ -17,6 +17,10 @@
|
||||
#include <linux/of_irq.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/basic_mmio_gpio.h>
|
||||
#include <linux/irqdomain.h>
|
||||
#include <linux/irqchip/chained_irq.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/reboot.h>
|
||||
|
||||
#define GIO_BANK_SIZE 0x20
|
||||
#define GIO_ODEN(bank) (((bank) * GIO_BANK_SIZE) + 0x00)
|
||||
@@ -34,14 +38,18 @@ struct brcmstb_gpio_bank {
|
||||
struct bgpio_chip bgc;
|
||||
struct brcmstb_gpio_priv *parent_priv;
|
||||
u32 width;
|
||||
struct irq_chip irq_chip;
|
||||
};
|
||||
|
||||
struct brcmstb_gpio_priv {
|
||||
struct list_head bank_list;
|
||||
void __iomem *reg_base;
|
||||
int num_banks;
|
||||
struct platform_device *pdev;
|
||||
int parent_irq;
|
||||
int gpio_base;
|
||||
bool can_wake;
|
||||
int parent_wake_irq;
|
||||
struct notifier_block reboot_notifier;
|
||||
};
|
||||
|
||||
#define MAX_GPIO_PER_BANK 32
|
||||
@@ -63,6 +71,203 @@ brcmstb_gpio_gc_to_priv(struct gpio_chip *gc)
|
||||
return bank->parent_priv;
|
||||
}
|
||||
|
||||
static void brcmstb_gpio_set_imask(struct brcmstb_gpio_bank *bank,
|
||||
unsigned int offset, bool enable)
|
||||
{
|
||||
struct bgpio_chip *bgc = &bank->bgc;
|
||||
struct brcmstb_gpio_priv *priv = bank->parent_priv;
|
||||
u32 mask = bgc->pin2mask(bgc, offset);
|
||||
u32 imask;
|
||||
unsigned long flags;
|
||||
|
||||
spin_lock_irqsave(&bgc->lock, flags);
|
||||
imask = bgc->read_reg(priv->reg_base + GIO_MASK(bank->id));
|
||||
if (enable)
|
||||
imask |= mask;
|
||||
else
|
||||
imask &= ~mask;
|
||||
bgc->write_reg(priv->reg_base + GIO_MASK(bank->id), imask);
|
||||
spin_unlock_irqrestore(&bgc->lock, flags);
|
||||
}
|
||||
|
||||
/* -------------------- IRQ chip functions -------------------- */
|
||||
|
||||
static void brcmstb_gpio_irq_mask(struct irq_data *d)
|
||||
{
|
||||
struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
|
||||
struct brcmstb_gpio_bank *bank = brcmstb_gpio_gc_to_bank(gc);
|
||||
|
||||
brcmstb_gpio_set_imask(bank, d->hwirq, false);
|
||||
}
|
||||
|
||||
static void brcmstb_gpio_irq_unmask(struct irq_data *d)
|
||||
{
|
||||
struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
|
||||
struct brcmstb_gpio_bank *bank = brcmstb_gpio_gc_to_bank(gc);
|
||||
|
||||
brcmstb_gpio_set_imask(bank, d->hwirq, true);
|
||||
}
|
||||
|
||||
static int brcmstb_gpio_irq_set_type(struct irq_data *d, unsigned int type)
|
||||
{
|
||||
struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
|
||||
struct brcmstb_gpio_bank *bank = brcmstb_gpio_gc_to_bank(gc);
|
||||
struct brcmstb_gpio_priv *priv = bank->parent_priv;
|
||||
u32 mask = BIT(d->hwirq);
|
||||
u32 edge_insensitive, iedge_insensitive;
|
||||
u32 edge_config, iedge_config;
|
||||
u32 level, ilevel;
|
||||
unsigned long flags;
|
||||
|
||||
switch (type) {
|
||||
case IRQ_TYPE_LEVEL_LOW:
|
||||
level = 0;
|
||||
edge_config = 0;
|
||||
edge_insensitive = 0;
|
||||
break;
|
||||
case IRQ_TYPE_LEVEL_HIGH:
|
||||
level = mask;
|
||||
edge_config = 0;
|
||||
edge_insensitive = 0;
|
||||
break;
|
||||
case IRQ_TYPE_EDGE_FALLING:
|
||||
level = 0;
|
||||
edge_config = 0;
|
||||
edge_insensitive = 0;
|
||||
break;
|
||||
case IRQ_TYPE_EDGE_RISING:
|
||||
level = 0;
|
||||
edge_config = mask;
|
||||
edge_insensitive = 0;
|
||||
break;
|
||||
case IRQ_TYPE_EDGE_BOTH:
|
||||
level = 0;
|
||||
edge_config = 0; /* don't care, but want known value */
|
||||
edge_insensitive = mask;
|
||||
break;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
spin_lock_irqsave(&bank->bgc.lock, flags);
|
||||
|
||||
iedge_config = bank->bgc.read_reg(priv->reg_base +
|
||||
GIO_EC(bank->id)) & ~mask;
|
||||
iedge_insensitive = bank->bgc.read_reg(priv->reg_base +
|
||||
GIO_EI(bank->id)) & ~mask;
|
||||
ilevel = bank->bgc.read_reg(priv->reg_base +
|
||||
GIO_LEVEL(bank->id)) & ~mask;
|
||||
|
||||
bank->bgc.write_reg(priv->reg_base + GIO_EC(bank->id),
|
||||
iedge_config | edge_config);
|
||||
bank->bgc.write_reg(priv->reg_base + GIO_EI(bank->id),
|
||||
iedge_insensitive | edge_insensitive);
|
||||
bank->bgc.write_reg(priv->reg_base + GIO_LEVEL(bank->id),
|
||||
ilevel | level);
|
||||
|
||||
spin_unlock_irqrestore(&bank->bgc.lock, flags);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int brcmstb_gpio_priv_set_wake(struct brcmstb_gpio_priv *priv,
|
||||
unsigned int enable)
|
||||
{
|
||||
int ret = 0;
|
||||
|
||||
/*
|
||||
* Only enable wake IRQ once for however many hwirqs can wake
|
||||
* since they all use the same wake IRQ. Mask will be set
|
||||
* up appropriately thanks to IRQCHIP_MASK_ON_SUSPEND flag.
|
||||
*/
|
||||
if (enable)
|
||||
ret = enable_irq_wake(priv->parent_wake_irq);
|
||||
else
|
||||
ret = disable_irq_wake(priv->parent_wake_irq);
|
||||
if (ret)
|
||||
dev_err(&priv->pdev->dev, "failed to %s wake-up interrupt\n",
|
||||
enable ? "enable" : "disable");
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int brcmstb_gpio_irq_set_wake(struct irq_data *d, unsigned int enable)
|
||||
{
|
||||
struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
|
||||
struct brcmstb_gpio_priv *priv = brcmstb_gpio_gc_to_priv(gc);
|
||||
|
||||
return brcmstb_gpio_priv_set_wake(priv, enable);
|
||||
}
|
||||
|
||||
static irqreturn_t brcmstb_gpio_wake_irq_handler(int irq, void *data)
|
||||
{
|
||||
struct brcmstb_gpio_priv *priv = data;
|
||||
|
||||
if (!priv || irq != priv->parent_wake_irq)
|
||||
return IRQ_NONE;
|
||||
pm_wakeup_event(&priv->pdev->dev, 0);
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
static void brcmstb_gpio_irq_bank_handler(struct brcmstb_gpio_bank *bank)
|
||||
{
|
||||
struct brcmstb_gpio_priv *priv = bank->parent_priv;
|
||||
struct irq_domain *irq_domain = bank->bgc.gc.irqdomain;
|
||||
void __iomem *reg_base = priv->reg_base;
|
||||
unsigned long status;
|
||||
unsigned long flags;
|
||||
|
||||
spin_lock_irqsave(&bank->bgc.lock, flags);
|
||||
while ((status = bank->bgc.read_reg(reg_base + GIO_STAT(bank->id)) &
|
||||
bank->bgc.read_reg(reg_base + GIO_MASK(bank->id)))) {
|
||||
int bit;
|
||||
|
||||
for_each_set_bit(bit, &status, 32) {
|
||||
u32 stat = bank->bgc.read_reg(reg_base +
|
||||
GIO_STAT(bank->id));
|
||||
if (bit >= bank->width)
|
||||
dev_warn(&priv->pdev->dev,
|
||||
"IRQ for invalid GPIO (bank=%d, offset=%d)\n",
|
||||
bank->id, bit);
|
||||
bank->bgc.write_reg(reg_base + GIO_STAT(bank->id),
|
||||
stat | BIT(bit));
|
||||
generic_handle_irq(irq_find_mapping(irq_domain, bit));
|
||||
}
|
||||
}
|
||||
spin_unlock_irqrestore(&bank->bgc.lock, flags);
|
||||
}
|
||||
|
||||
/* Each UPG GIO block has one IRQ for all banks */
|
||||
static void brcmstb_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
|
||||
{
|
||||
struct gpio_chip *gc = irq_desc_get_handler_data(desc);
|
||||
struct brcmstb_gpio_priv *priv = brcmstb_gpio_gc_to_priv(gc);
|
||||
struct irq_chip *chip = irq_desc_get_chip(desc);
|
||||
struct list_head *pos;
|
||||
|
||||
/* Interrupts weren't properly cleared during probe */
|
||||
BUG_ON(!priv || !chip);
|
||||
|
||||
chained_irq_enter(chip, desc);
|
||||
list_for_each(pos, &priv->bank_list) {
|
||||
struct brcmstb_gpio_bank *bank =
|
||||
list_entry(pos, struct brcmstb_gpio_bank, node);
|
||||
brcmstb_gpio_irq_bank_handler(bank);
|
||||
}
|
||||
chained_irq_exit(chip, desc);
|
||||
}
|
||||
|
||||
static int brcmstb_gpio_reboot(struct notifier_block *nb,
|
||||
unsigned long action, void *data)
|
||||
{
|
||||
struct brcmstb_gpio_priv *priv =
|
||||
container_of(nb, struct brcmstb_gpio_priv, reboot_notifier);
|
||||
|
||||
/* Enable GPIO for S5 cold boot */
|
||||
if (action == SYS_POWER_OFF)
|
||||
brcmstb_gpio_priv_set_wake(priv, 1);
|
||||
|
||||
return NOTIFY_DONE;
|
||||
}
|
||||
|
||||
/* Make sure that the number of banks matches up between properties */
|
||||
static int brcmstb_gpio_sanity_check_banks(struct device *dev,
|
||||
struct device_node *np, struct resource *res)
|
||||
@@ -100,7 +305,13 @@ static int brcmstb_gpio_remove(struct platform_device *pdev)
|
||||
bank = list_entry(pos, struct brcmstb_gpio_bank, node);
|
||||
ret = bgpio_remove(&bank->bgc);
|
||||
if (ret)
|
||||
dev_err(&pdev->dev, "gpiochip_remove fail in cleanup");
|
||||
dev_err(&pdev->dev, "gpiochip_remove fail in cleanup\n");
|
||||
}
|
||||
if (priv->reboot_notifier.notifier_call) {
|
||||
ret = unregister_reboot_notifier(&priv->reboot_notifier);
|
||||
if (ret)
|
||||
dev_err(&pdev->dev,
|
||||
"failed to unregister reboot notifier\n");
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
@@ -121,7 +332,7 @@ static int brcmstb_gpio_of_xlate(struct gpio_chip *gc,
|
||||
return -EINVAL;
|
||||
|
||||
offset = gpiospec->args[0] - (gc->base - priv->gpio_base);
|
||||
if (offset >= gc->ngpio)
|
||||
if (offset >= gc->ngpio || offset < 0)
|
||||
return -EINVAL;
|
||||
|
||||
if (unlikely(offset >= bank->width)) {
|
||||
@@ -136,6 +347,65 @@ static int brcmstb_gpio_of_xlate(struct gpio_chip *gc,
|
||||
return offset;
|
||||
}
|
||||
|
||||
/* Before calling, must have bank->parent_irq set and gpiochip registered */
|
||||
static int brcmstb_gpio_irq_setup(struct platform_device *pdev,
|
||||
struct brcmstb_gpio_bank *bank)
|
||||
{
|
||||
struct brcmstb_gpio_priv *priv = bank->parent_priv;
|
||||
struct device *dev = &pdev->dev;
|
||||
struct device_node *np = dev->of_node;
|
||||
|
||||
bank->irq_chip.name = dev_name(dev);
|
||||
bank->irq_chip.irq_mask = brcmstb_gpio_irq_mask;
|
||||
bank->irq_chip.irq_unmask = brcmstb_gpio_irq_unmask;
|
||||
bank->irq_chip.irq_set_type = brcmstb_gpio_irq_set_type;
|
||||
|
||||
/* Ensures that all non-wakeup IRQs are disabled at suspend */
|
||||
bank->irq_chip.flags = IRQCHIP_MASK_ON_SUSPEND;
|
||||
|
||||
if (IS_ENABLED(CONFIG_PM_SLEEP) && !priv->can_wake &&
|
||||
of_property_read_bool(np, "wakeup-source")) {
|
||||
priv->parent_wake_irq = platform_get_irq(pdev, 1);
|
||||
if (priv->parent_wake_irq < 0) {
|
||||
dev_warn(dev,
|
||||
"Couldn't get wake IRQ - GPIOs will not be able to wake from sleep");
|
||||
} else {
|
||||
int err;
|
||||
|
||||
/*
|
||||
* Set wakeup capability before requesting wakeup
|
||||
* interrupt, so we can process boot-time "wakeups"
|
||||
* (e.g., from S5 cold boot)
|
||||
*/
|
||||
device_set_wakeup_capable(dev, true);
|
||||
device_wakeup_enable(dev);
|
||||
err = devm_request_irq(dev, priv->parent_wake_irq,
|
||||
brcmstb_gpio_wake_irq_handler, 0,
|
||||
"brcmstb-gpio-wake", priv);
|
||||
|
||||
if (err < 0) {
|
||||
dev_err(dev, "Couldn't request wake IRQ");
|
||||
return err;
|
||||
}
|
||||
|
||||
priv->reboot_notifier.notifier_call =
|
||||
brcmstb_gpio_reboot;
|
||||
register_reboot_notifier(&priv->reboot_notifier);
|
||||
priv->can_wake = true;
|
||||
}
|
||||
}
|
||||
|
||||
if (priv->can_wake)
|
||||
bank->irq_chip.irq_set_wake = brcmstb_gpio_irq_set_wake;
|
||||
|
||||
gpiochip_irqchip_add(&bank->bgc.gc, &bank->irq_chip, 0,
|
||||
handle_simple_irq, IRQ_TYPE_NONE);
|
||||
gpiochip_set_chained_irqchip(&bank->bgc.gc, &bank->irq_chip,
|
||||
priv->parent_irq, brcmstb_gpio_irq_handler);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int brcmstb_gpio_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct device *dev = &pdev->dev;
|
||||
@@ -146,6 +416,7 @@ static int brcmstb_gpio_probe(struct platform_device *pdev)
|
||||
struct property *prop;
|
||||
const __be32 *p;
|
||||
u32 bank_width;
|
||||
int num_banks = 0;
|
||||
int err;
|
||||
static int gpio_base;
|
||||
|
||||
@@ -164,6 +435,16 @@ static int brcmstb_gpio_probe(struct platform_device *pdev)
|
||||
priv->reg_base = reg_base;
|
||||
priv->pdev = pdev;
|
||||
|
||||
if (of_property_read_bool(np, "interrupt-controller")) {
|
||||
priv->parent_irq = platform_get_irq(pdev, 0);
|
||||
if (priv->parent_irq <= 0) {
|
||||
dev_err(dev, "Couldn't get IRQ");
|
||||
return -ENOENT;
|
||||
}
|
||||
} else {
|
||||
priv->parent_irq = -ENOENT;
|
||||
}
|
||||
|
||||
if (brcmstb_gpio_sanity_check_banks(dev, np, res))
|
||||
return -EINVAL;
|
||||
|
||||
@@ -180,7 +461,7 @@ static int brcmstb_gpio_probe(struct platform_device *pdev)
|
||||
}
|
||||
|
||||
bank->parent_priv = priv;
|
||||
bank->id = priv->num_banks;
|
||||
bank->id = num_banks;
|
||||
if (bank_width <= 0 || bank_width > MAX_GPIO_PER_BANK) {
|
||||
dev_err(dev, "Invalid bank width %d\n", bank_width);
|
||||
goto fail;
|
||||
@@ -212,6 +493,12 @@ static int brcmstb_gpio_probe(struct platform_device *pdev)
|
||||
/* not all ngpio lines are valid, will use bank width later */
|
||||
gc->ngpio = MAX_GPIO_PER_BANK;
|
||||
|
||||
/*
|
||||
* Mask all interrupts by default, since wakeup interrupts may
|
||||
* be retained from S5 cold boot
|
||||
*/
|
||||
bank->bgc.write_reg(reg_base + GIO_MASK(bank->id), 0);
|
||||
|
||||
err = gpiochip_add(gc);
|
||||
if (err) {
|
||||
dev_err(dev, "Could not add gpiochip for bank %d\n",
|
||||
@@ -219,17 +506,24 @@ static int brcmstb_gpio_probe(struct platform_device *pdev)
|
||||
goto fail;
|
||||
}
|
||||
gpio_base += gc->ngpio;
|
||||
|
||||
if (priv->parent_irq > 0) {
|
||||
err = brcmstb_gpio_irq_setup(pdev, bank);
|
||||
if (err)
|
||||
goto fail;
|
||||
}
|
||||
|
||||
dev_dbg(dev, "bank=%d, base=%d, ngpio=%d, width=%d\n", bank->id,
|
||||
gc->base, gc->ngpio, bank->width);
|
||||
|
||||
/* Everything looks good, so add bank to list */
|
||||
list_add(&bank->node, &priv->bank_list);
|
||||
|
||||
priv->num_banks++;
|
||||
num_banks++;
|
||||
}
|
||||
|
||||
dev_info(dev, "Registered %d banks (GPIO(s): %d-%d)\n",
|
||||
priv->num_banks, priv->gpio_base, gpio_base - 1);
|
||||
num_banks, priv->gpio_base, gpio_base - 1);
|
||||
|
||||
return 0;
|
||||
|
||||
|
||||
@@ -65,11 +65,11 @@ static struct davinci_gpio_regs __iomem *gpio2regs(unsigned gpio)
|
||||
return ptr;
|
||||
}
|
||||
|
||||
static inline struct davinci_gpio_regs __iomem *irq2regs(int irq)
|
||||
static inline struct davinci_gpio_regs __iomem *irq2regs(struct irq_data *d)
|
||||
{
|
||||
struct davinci_gpio_regs __iomem *g;
|
||||
|
||||
g = (__force struct davinci_gpio_regs __iomem *)irq_get_chip_data(irq);
|
||||
g = (__force struct davinci_gpio_regs __iomem *)irq_data_get_irq_chip_data(d);
|
||||
|
||||
return g;
|
||||
}
|
||||
@@ -287,7 +287,7 @@ static int davinci_gpio_probe(struct platform_device *pdev)
|
||||
|
||||
static void gpio_irq_disable(struct irq_data *d)
|
||||
{
|
||||
struct davinci_gpio_regs __iomem *g = irq2regs(d->irq);
|
||||
struct davinci_gpio_regs __iomem *g = irq2regs(d);
|
||||
u32 mask = (u32) irq_data_get_irq_handler_data(d);
|
||||
|
||||
writel_relaxed(mask, &g->clr_falling);
|
||||
@@ -296,7 +296,7 @@ static void gpio_irq_disable(struct irq_data *d)
|
||||
|
||||
static void gpio_irq_enable(struct irq_data *d)
|
||||
{
|
||||
struct davinci_gpio_regs __iomem *g = irq2regs(d->irq);
|
||||
struct davinci_gpio_regs __iomem *g = irq2regs(d);
|
||||
u32 mask = (u32) irq_data_get_irq_handler_data(d);
|
||||
unsigned status = irqd_get_trigger_type(d);
|
||||
|
||||
@@ -327,8 +327,9 @@ static struct irq_chip gpio_irqchip = {
|
||||
};
|
||||
|
||||
static void
|
||||
gpio_irq_handler(unsigned irq, struct irq_desc *desc)
|
||||
gpio_irq_handler(unsigned __irq, struct irq_desc *desc)
|
||||
{
|
||||
unsigned int irq = irq_desc_get_irq(desc);
|
||||
struct davinci_gpio_regs __iomem *g;
|
||||
u32 mask = 0xffff;
|
||||
struct davinci_gpio_controller *d;
|
||||
@@ -396,7 +397,7 @@ static int gpio_irq_type_unbanked(struct irq_data *data, unsigned trigger)
|
||||
struct davinci_gpio_regs __iomem *g;
|
||||
u32 mask;
|
||||
|
||||
d = (struct davinci_gpio_controller *)data->handler_data;
|
||||
d = (struct davinci_gpio_controller *)irq_data_get_irq_handler_data(data);
|
||||
g = (struct davinci_gpio_regs __iomem *)d->regs;
|
||||
mask = __gpio_mask(data->irq - d->gpio_irq);
|
||||
|
||||
@@ -422,7 +423,6 @@ davinci_gpio_irq_map(struct irq_domain *d, unsigned int irq,
|
||||
irq_set_irq_type(irq, IRQ_TYPE_NONE);
|
||||
irq_set_chip_data(irq, (__force void *)g);
|
||||
irq_set_handler_data(irq, (void *)__gpio_mask(hw));
|
||||
set_irq_flags(irq, IRQF_VALID);
|
||||
|
||||
return 0;
|
||||
}
|
||||
@@ -545,7 +545,7 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev)
|
||||
chips[0].chip.to_irq = gpio_to_irq_unbanked;
|
||||
chips[0].gpio_irq = bank_irq;
|
||||
chips[0].gpio_unbanked = pdata->gpio_unbanked;
|
||||
binten = BIT(0);
|
||||
binten = GENMASK(pdata->gpio_unbanked / 16, 0);
|
||||
|
||||
/* AINTC handles mask/unmask; GPIO handles triggering */
|
||||
irq = bank_irq;
|
||||
|
||||
@@ -149,7 +149,7 @@ static u32 dwapb_do_irq(struct dwapb_gpio *gpio)
|
||||
|
||||
static void dwapb_irq_handler(u32 irq, struct irq_desc *desc)
|
||||
{
|
||||
struct dwapb_gpio *gpio = irq_get_handler_data(irq);
|
||||
struct dwapb_gpio *gpio = irq_desc_get_handler_data(desc);
|
||||
struct irq_chip *chip = irq_desc_get_chip(desc);
|
||||
|
||||
dwapb_do_irq(gpio);
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user