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Merge branch 'pm-cpufreq'
* pm-cpufreq: (57 commits) cpufreq: MAINTAINERS: Add co-maintainer cpufreq: pxa2xx: initialize variables ARM: S5pv210: compiling issue, ARM_S5PV210_CPUFREQ needs CONFIG_CPU_FREQ_TABLE=y cpufreq: cpu0: Put cpu parent node after using it cpufreq: ARM big LITTLE: Adapt to latest cpufreq updates cpufreq: ARM big LITTLE: put DT nodes after using them cpufreq: Don't call __cpufreq_governor() for drivers without target() cpufreq: exynos5440: Protect OPP search calls with RCU lock cpufreq: dbx500: Round to closest available freq cpufreq: Call __cpufreq_governor() with correct policy->cpus mask cpufreq / intel_pstate: Optimize intel_pstate_set_policy cpufreq: OMAP: instantiate omap-cpufreq as a platform_driver arm: exynos: Enable OPP library support for exynos5440 cpufreq: exynos: Remove error return even if no soc is found cpufreq: exynos: Add cpufreq driver for exynos5440 cpufreq: AMD "frequency sensitivity feedback" powersave bias for ondemand governor cpufreq: ondemand: allow custom powersave_bias_target handler to be registered cpufreq: convert cpufreq_driver to using RCU cpufreq: powerpc/platforms/cell: move cpufreq driver to drivers/cpufreq cpufreq: sparc: move cpufreq driver to drivers/cpufreq ... Conflicts: MAINTAINERS (with commita8e39c3from pm-cpuidle) drivers/cpufreq/cpufreq_governor.h (with commitbeb0ff3)
This commit is contained in:
@@ -108,8 +108,9 @@ policy->governor must contain the "default policy" for
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cpufreq_driver.target is called with
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these values.
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For setting some of these values, the frequency table helpers might be
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helpful. See the section 2 for more information on them.
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For setting some of these values (cpuinfo.min[max]_freq, policy->min[max]), the
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frequency table helpers might be helpful. See the section 2 for more information
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on them.
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SMP systems normally have same clock source for a group of cpus. For these the
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.init() would be called only once for the first online cpu. Here the .init()
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@@ -184,10 +185,10 @@ the reference implementation in drivers/cpufreq/longrun.c
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As most cpufreq processors only allow for being set to a few specific
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frequencies, a "frequency table" with some functions might assist in
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some work of the processor driver. Such a "frequency table" consists
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of an array of struct cpufreq_freq_table entries, with any value in
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of an array of struct cpufreq_frequency_table entries, with any value in
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"index" you want to use, and the corresponding frequency in
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"frequency". At the end of the table, you need to add a
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cpufreq_freq_table entry with frequency set to CPUFREQ_TABLE_END. And
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cpufreq_frequency_table entry with frequency set to CPUFREQ_TABLE_END. And
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if you want to skip one entry in the table, set the frequency to
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CPUFREQ_ENTRY_INVALID. The entries don't need to be in ascending
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order.
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@@ -167,6 +167,27 @@ of load evaluation and helping the CPU stay at its top speed when truly
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busy, rather than shifting back and forth in speed. This tunable has no
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effect on behavior at lower speeds/lower CPU loads.
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powersave_bias: this parameter takes a value between 0 to 1000. It
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defines the percentage (times 10) value of the target frequency that
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will be shaved off of the target. For example, when set to 100 -- 10%,
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when ondemand governor would have targeted 1000 MHz, it will target
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1000 MHz - (10% of 1000 MHz) = 900 MHz instead. This is set to 0
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(disabled) by default.
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When AMD frequency sensitivity powersave bias driver --
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drivers/cpufreq/amd_freq_sensitivity.c is loaded, this parameter
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defines the workload frequency sensitivity threshold in which a lower
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frequency is chosen instead of ondemand governor's original target.
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The frequency sensitivity is a hardware reported (on AMD Family 16h
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Processors and above) value between 0 to 100% that tells software how
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the performance of the workload running on a CPU will change when
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frequency changes. A workload with sensitivity of 0% (memory/IO-bound)
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will not perform any better on higher core frequency, whereas a
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workload with sensitivity of 100% (CPU-bound) will perform better
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higher the frequency. When the driver is loaded, this is set to 400
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by default -- for CPUs running workloads with sensitivity value below
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40%, a lower frequency is chosen. Unloading the driver or writing 0
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will disable this feature.
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2.5 Conservative
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----------------
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@@ -191,6 +212,12 @@ governor but for the opposite direction. For example when set to its
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default value of '20' it means that if the CPU usage needs to be below
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20% between samples to have the frequency decreased.
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sampling_down_factor: similar functionality as in "ondemand" governor.
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But in "conservative", it controls the rate at which the kernel makes
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a decision on when to decrease the frequency while running in any
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speed. Load for frequency increase is still evaluated every
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sampling rate.
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3. The Governor Interface in the CPUfreq Core
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=============================================
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@@ -0,0 +1,65 @@
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Generic ARM big LITTLE cpufreq driver's DT glue
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-----------------------------------------------
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This is DT specific glue layer for generic cpufreq driver for big LITTLE
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systems.
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Both required and optional properties listed below must be defined
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under node /cpus/cpu@x. Where x is the first cpu inside a cluster.
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FIXME: Cpus should boot in the order specified in DT and all cpus for a cluster
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must be present contiguously. Generic DT driver will check only node 'x' for
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cpu:x.
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Required properties:
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- operating-points: Refer to Documentation/devicetree/bindings/power/opp.txt
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for details
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Optional properties:
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- clock-latency: Specify the possible maximum transition latency for clock,
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in unit of nanoseconds.
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Examples:
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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compatible = "arm,cortex-a15";
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reg = <0>;
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next-level-cache = <&L2>;
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operating-points = <
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/* kHz uV */
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792000 1100000
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396000 950000
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198000 850000
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>;
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clock-latency = <61036>; /* two CLK32 periods */
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};
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cpu@1 {
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compatible = "arm,cortex-a15";
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reg = <1>;
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next-level-cache = <&L2>;
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};
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cpu@100 {
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compatible = "arm,cortex-a7";
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reg = <100>;
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next-level-cache = <&L2>;
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operating-points = <
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/* kHz uV */
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792000 950000
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396000 750000
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198000 450000
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>;
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clock-latency = <61036>; /* two CLK32 periods */
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};
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cpu@101 {
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compatible = "arm,cortex-a7";
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reg = <101>;
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next-level-cache = <&L2>;
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};
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};
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@@ -32,7 +32,7 @@ cpus {
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396000 950000
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198000 850000
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>;
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transition-latency = <61036>; /* two CLK32 periods */
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clock-latency = <61036>; /* two CLK32 periods */
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};
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cpu@1 {
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@@ -0,0 +1,28 @@
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Exynos5440 cpufreq driver
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-------------------
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Exynos5440 SoC cpufreq driver for CPU frequency scaling.
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Required properties:
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- interrupts: Interrupt to know the completion of cpu frequency change.
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- operating-points: Table of frequencies and voltage CPU could be transitioned into,
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in the decreasing order. Frequency should be in KHz units and voltage
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should be in microvolts.
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Optional properties:
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- clock-latency: Clock monitor latency in microsecond.
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All the required listed above must be defined under node cpufreq.
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Example:
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--------
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cpufreq@160000 {
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compatible = "samsung,exynos5440-cpufreq";
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reg = <0x160000 0x1000>;
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interrupts = <0 57 0>;
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operating-points = <
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1000000 975000
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800000 925000>;
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clock-latency = <100000>;
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};
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+13
@@ -2200,12 +2200,25 @@ F: drivers/net/ethernet/ti/cpmac.c
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CPU FREQUENCY DRIVERS
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M: Rafael J. Wysocki <rjw@sisk.pl>
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M: Viresh Kumar <viresh.kumar@linaro.org>
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L: cpufreq@vger.kernel.org
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L: linux-pm@vger.kernel.org
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S: Maintained
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T: git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm.git
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F: drivers/cpufreq/
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F: include/linux/cpufreq.h
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CPU FREQUENCY DRIVERS - ARM BIG LITTLE
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M: Viresh Kumar <viresh.kumar@linaro.org>
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M: Sudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com>
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L: cpufreq@vger.kernel.org
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L: linux-pm@vger.kernel.org
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W: http://www.arm.com/products/processors/technologies/biglittleprocessing.php
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S: Maintained
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F: drivers/cpufreq/arm_big_little.h
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F: drivers/cpufreq/arm_big_little.c
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F: drivers/cpufreq/arm_big_little_dt.c
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CPUIDLE DRIVERS
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M: Rafael J. Wysocki <rjw@sisk.pl>
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M: Daniel Lezcano <daniel.lezcano@linaro.org>
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@@ -2160,7 +2160,6 @@ endmenu
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menu "CPU Power Management"
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if ARCH_HAS_CPUFREQ
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source "drivers/cpufreq/Kconfig"
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config CPU_FREQ_IMX
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@@ -2170,30 +2169,6 @@ config CPU_FREQ_IMX
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help
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This enables the CPUfreq driver for i.MX CPUs.
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config CPU_FREQ_SA1100
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bool
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config CPU_FREQ_SA1110
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bool
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config CPU_FREQ_INTEGRATOR
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tristate "CPUfreq driver for ARM Integrator CPUs"
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depends on ARCH_INTEGRATOR && CPU_FREQ
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default y
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help
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This enables the CPUfreq driver for ARM Integrator CPUs.
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For details, take a look at <file:Documentation/cpu-freq>.
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If in doubt, say Y.
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config CPU_FREQ_PXA
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bool
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depends on CPU_FREQ && ARCH_PXA && PXA25x
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default y
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select CPU_FREQ_DEFAULT_GOV_USERSPACE
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select CPU_FREQ_TABLE
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config CPU_FREQ_S3C
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bool
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help
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@@ -37,7 +37,6 @@ obj-$(CONFIG_MACH_MITYOMAPL138) += board-mityomapl138.o
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obj-$(CONFIG_MACH_OMAPL138_HAWKBOARD) += board-omapl138-hawk.o
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# Power Management
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obj-$(CONFIG_CPU_FREQ) += cpufreq.o
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obj-$(CONFIG_CPU_IDLE) += cpuidle.o
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obj-$(CONFIG_SUSPEND) += pm.o sleep.o
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obj-$(CONFIG_HAVE_CLK) += pm_domain.o
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@@ -72,10 +72,12 @@ config SOC_EXYNOS5440
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bool "SAMSUNG EXYNOS5440"
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default y
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depends on ARCH_EXYNOS5
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select ARCH_HAS_OPP
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select ARM_ARCH_TIMER
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select AUTO_ZRELADDR
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select PINCTRL
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select PINCTRL_EXYNOS5440
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select PM_OPP
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help
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Enable EXYNOS5440 SoC support
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@@ -87,13 +87,12 @@ static int mxc_set_target(struct cpufreq_policy *policy,
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freqs.old = clk_get_rate(cpu_clk) / 1000;
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freqs.new = freq_Hz / 1000;
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freqs.cpu = 0;
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freqs.flags = 0;
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cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
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cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE);
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ret = set_cpu_freq(freq_Hz);
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cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
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cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE);
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return ret;
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}
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@@ -145,14 +144,11 @@ static int mxc_cpufreq_init(struct cpufreq_policy *policy)
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imx_freq_table[i].frequency = CPUFREQ_TABLE_END;
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policy->cur = clk_get_rate(cpu_clk) / 1000;
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policy->min = policy->cpuinfo.min_freq = cpu_freq_khz_min;
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policy->max = policy->cpuinfo.max_freq = cpu_freq_khz_max;
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/* Manual states, that PLL stabilizes in two CLK32 periods */
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policy->cpuinfo.transition_latency = 2 * NANOSECOND / CLK32_FREQ;
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ret = cpufreq_frequency_table_cpuinfo(policy, imx_freq_table);
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if (ret < 0) {
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printk(KERN_ERR "%s: failed to register i.MXC CPUfreq with error code %d\n",
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__func__, ret);
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@@ -9,5 +9,4 @@ obj-$(CONFIG_ARCH_INTEGRATOR_AP) += integrator_ap.o
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obj-$(CONFIG_ARCH_INTEGRATOR_CP) += integrator_cp.o
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obj-$(CONFIG_PCI) += pci_v3.o pci.o
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obj-$(CONFIG_CPU_FREQ_INTEGRATOR) += cpu.o
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obj-$(CONFIG_INTEGRATOR_IMPD1) += impd1.o
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@@ -265,6 +265,12 @@ static void __init omap4_init_voltages(void)
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omap2_set_init_voltage("iva", "dpll_iva_m5x2_ck", "iva");
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}
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static inline void omap_init_cpufreq(void)
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{
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struct platform_device_info devinfo = { .name = "omap-cpufreq", };
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platform_device_register_full(&devinfo);
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}
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static int __init omap2_common_pm_init(void)
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{
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if (!of_have_populated_dt())
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@@ -294,6 +300,9 @@ int __init omap2_common_pm_late_init(void)
|
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/* Smartreflex device init */
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omap_devinit_smartreflex();
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|
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/* cpufreq dummy device instantiation */
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omap_init_cpufreq();
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}
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|
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#ifdef CONFIG_SUSPEND
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|
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@@ -7,12 +7,6 @@ obj-y += clock.o devices.o generic.o irq.o \
|
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time.o reset.o
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obj-$(CONFIG_PM) += pm.o sleep.o standby.o
|
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|
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ifeq ($(CONFIG_CPU_FREQ),y)
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obj-$(CONFIG_PXA25x) += cpufreq-pxa2xx.o
|
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obj-$(CONFIG_PXA27x) += cpufreq-pxa2xx.o
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obj-$(CONFIG_PXA3xx) += cpufreq-pxa3xx.o
|
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endif
|
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|
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# Generic drivers that other drivers may depend upon
|
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|
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# SoC-specific code
|
||||
|
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@@ -0,0 +1 @@
|
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#include "../../generic.h"
|
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@@ -204,7 +204,6 @@ static int s3c_cpufreq_settarget(struct cpufreq_policy *policy,
|
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freqs.old = cpu_cur.freq;
|
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freqs.new = cpu_new.freq;
|
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|
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freqs.freqs.cpu = 0;
|
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freqs.freqs.old = cpu_cur.freq.armclk / 1000;
|
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freqs.freqs.new = cpu_new.freq.armclk / 1000;
|
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|
||||
@@ -218,9 +217,7 @@ static int s3c_cpufreq_settarget(struct cpufreq_policy *policy,
|
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s3c_cpufreq_updateclk(clk_pclk, cpu_new.freq.pclk);
|
||||
|
||||
/* start the frequency change */
|
||||
|
||||
if (policy)
|
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cpufreq_notify_transition(&freqs.freqs, CPUFREQ_PRECHANGE);
|
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cpufreq_notify_transition(policy, &freqs.freqs, CPUFREQ_PRECHANGE);
|
||||
|
||||
/* If hclk is staying the same, then we do not need to
|
||||
* re-write the IO or the refresh timings whilst we are changing
|
||||
@@ -264,8 +261,7 @@ static int s3c_cpufreq_settarget(struct cpufreq_policy *policy,
|
||||
local_irq_restore(flags);
|
||||
|
||||
/* notify everyone we've done this */
|
||||
if (policy)
|
||||
cpufreq_notify_transition(&freqs.freqs, CPUFREQ_POSTCHANGE);
|
||||
cpufreq_notify_transition(policy, &freqs.freqs, CPUFREQ_POSTCHANGE);
|
||||
|
||||
s3c_freq_dbg("%s: finished\n", __func__);
|
||||
return 0;
|
||||
|
||||
@@ -4,7 +4,7 @@ menu "SA11x0 Implementations"
|
||||
|
||||
config SA1100_ASSABET
|
||||
bool "Assabet"
|
||||
select CPU_FREQ_SA1110
|
||||
select ARM_SA1110_CPUFREQ
|
||||
help
|
||||
Say Y here if you are using the Intel(R) StrongARM(R) SA-1110
|
||||
Microprocessor Development Board (also known as the Assabet).
|
||||
@@ -20,7 +20,7 @@ config ASSABET_NEPONSET
|
||||
|
||||
config SA1100_CERF
|
||||
bool "CerfBoard"
|
||||
select CPU_FREQ_SA1110
|
||||
select ARM_SA1110_CPUFREQ
|
||||
help
|
||||
The Intrinsyc CerfBoard is based on the StrongARM 1110 (Discontinued).
|
||||
More information is available at:
|
||||
@@ -47,7 +47,7 @@ endchoice
|
||||
|
||||
config SA1100_COLLIE
|
||||
bool "Sharp Zaurus SL5500"
|
||||
# FIXME: select CPU_FREQ_SA11x0
|
||||
# FIXME: select ARM_SA11x0_CPUFREQ
|
||||
select SHARP_LOCOMO
|
||||
select SHARP_PARAM
|
||||
select SHARP_SCOOP
|
||||
@@ -56,7 +56,7 @@ config SA1100_COLLIE
|
||||
|
||||
config SA1100_H3100
|
||||
bool "Compaq iPAQ H3100"
|
||||
select CPU_FREQ_SA1110
|
||||
select ARM_SA1110_CPUFREQ
|
||||
select HTC_EGPIO
|
||||
help
|
||||
Say Y here if you intend to run this kernel on the Compaq iPAQ
|
||||
@@ -67,7 +67,7 @@ config SA1100_H3100
|
||||
|
||||
config SA1100_H3600
|
||||
bool "Compaq iPAQ H3600/H3700"
|
||||
select CPU_FREQ_SA1110
|
||||
select ARM_SA1110_CPUFREQ
|
||||
select HTC_EGPIO
|
||||
help
|
||||
Say Y here if you intend to run this kernel on the Compaq iPAQ
|
||||
@@ -78,7 +78,7 @@ config SA1100_H3600
|
||||
|
||||
config SA1100_BADGE4
|
||||
bool "HP Labs BadgePAD 4"
|
||||
select CPU_FREQ_SA1100
|
||||
select ARM_SA1100_CPUFREQ
|
||||
select SA1111
|
||||
help
|
||||
Say Y here if you want to build a kernel for the HP Laboratories
|
||||
@@ -86,7 +86,7 @@ config SA1100_BADGE4
|
||||
|
||||
config SA1100_JORNADA720
|
||||
bool "HP Jornada 720"
|
||||
# FIXME: select CPU_FREQ_SA11x0
|
||||
# FIXME: select ARM_SA11x0_CPUFREQ
|
||||
select SA1111
|
||||
help
|
||||
Say Y here if you want to build a kernel for the HP Jornada 720
|
||||
@@ -105,14 +105,14 @@ config SA1100_JORNADA720_SSP
|
||||
|
||||
config SA1100_HACKKIT
|
||||
bool "HackKit Core CPU Board"
|
||||
select CPU_FREQ_SA1100
|
||||
select ARM_SA1100_CPUFREQ
|
||||
help
|
||||
Say Y here to support the HackKit Core CPU Board
|
||||
<http://hackkit.eletztrick.de>;
|
||||
|
||||
config SA1100_LART
|
||||
bool "LART"
|
||||
select CPU_FREQ_SA1100
|
||||
select ARM_SA1100_CPUFREQ
|
||||
help
|
||||
Say Y here if you are using the Linux Advanced Radio Terminal
|
||||
(also known as the LART). See <http://www.lartmaker.nl/> for
|
||||
@@ -120,7 +120,7 @@ config SA1100_LART
|
||||
|
||||
config SA1100_NANOENGINE
|
||||
bool "nanoEngine"
|
||||
select CPU_FREQ_SA1110
|
||||
select ARM_SA1110_CPUFREQ
|
||||
select PCI
|
||||
select PCI_NANOENGINE
|
||||
help
|
||||
@@ -130,7 +130,7 @@ config SA1100_NANOENGINE
|
||||
|
||||
config SA1100_PLEB
|
||||
bool "PLEB"
|
||||
select CPU_FREQ_SA1100
|
||||
select ARM_SA1100_CPUFREQ
|
||||
help
|
||||
Say Y here if you are using version 1 of the Portable Linux
|
||||
Embedded Board (also known as PLEB).
|
||||
@@ -139,7 +139,7 @@ config SA1100_PLEB
|
||||
|
||||
config SA1100_SHANNON
|
||||
bool "Shannon"
|
||||
select CPU_FREQ_SA1100
|
||||
select ARM_SA1100_CPUFREQ
|
||||
help
|
||||
The Shannon (also known as a Tuxscreen, and also as a IS2630) was a
|
||||
limited edition webphone produced by Philips. The Shannon is a SA1100
|
||||
@@ -148,7 +148,7 @@ config SA1100_SHANNON
|
||||
|
||||
config SA1100_SIMPAD
|
||||
bool "Simpad"
|
||||
select CPU_FREQ_SA1110
|
||||
select ARM_SA1110_CPUFREQ
|
||||
help
|
||||
The SIEMENS webpad SIMpad is based on the StrongARM 1110. There
|
||||
are two different versions CL4 and SL4. CL4 has 32MB RAM and 16MB
|
||||
|
||||
@@ -8,9 +8,6 @@ obj-m :=
|
||||
obj-n :=
|
||||
obj- :=
|
||||
|
||||
obj-$(CONFIG_CPU_FREQ_SA1100) += cpu-sa1100.o
|
||||
obj-$(CONFIG_CPU_FREQ_SA1110) += cpu-sa1110.o
|
||||
|
||||
# Specific board support
|
||||
obj-$(CONFIG_SA1100_ASSABET) += assabet.o
|
||||
obj-$(CONFIG_ASSABET_NEPONSET) += neponset.o
|
||||
|
||||
@@ -0,0 +1 @@
|
||||
#include "../../generic.h"
|
||||
@@ -24,7 +24,6 @@ obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += cpuidle-tegra30.o
|
||||
endif
|
||||
obj-$(CONFIG_SMP) += platsmp.o headsmp.o
|
||||
obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
|
||||
obj-$(CONFIG_CPU_FREQ) += cpu-tegra.o
|
||||
obj-$(CONFIG_TEGRA_PCI) += pcie.o
|
||||
|
||||
obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += board-dt-tegra20.o
|
||||
|
||||
@@ -250,20 +250,7 @@ config ARCH_SUSPEND_POSSIBLE
|
||||
def_bool y
|
||||
|
||||
menu "CPU Frequency scaling"
|
||||
|
||||
source "drivers/cpufreq/Kconfig"
|
||||
|
||||
config CPU_FREQ_AT32AP
|
||||
bool "CPU frequency driver for AT32AP"
|
||||
depends on CPU_FREQ && PLATFORM_AT32AP
|
||||
default n
|
||||
help
|
||||
This enables the CPU frequency driver for AT32AP processors.
|
||||
|
||||
For details, take a look in <file:Documentation/cpu-freq>.
|
||||
|
||||
If in doubt, say N.
|
||||
|
||||
endmenu
|
||||
|
||||
endmenu
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user