You've already forked linux-apfs
mirror of
https://github.com/linux-apfs/linux-apfs.git
synced 2026-05-01 15:00:59 -07:00
Merge tag 'asoc-v4.4-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-next
ASoC: Last updates for v4.5 A bunch more updates for v4.5, mainly driver work: - More topology API enhancements from Mengdong Lin working towards making everything more component based and being able to specify PCM links via topology. - Large sets driver updates from Cirrus, Intel (mainly more Skylake support) and Renesas. - New driver for AMD ACP - Rename PCM1792a driver to be generic pcm179x
This commit is contained in:
+1
-1
@@ -1,4 +1,4 @@
|
||||
Texas Instruments pcm1792a DT bindings
|
||||
Texas Instruments pcm179x DT bindings
|
||||
|
||||
This driver supports the SPI bus.
|
||||
|
||||
@@ -0,0 +1,41 @@
|
||||
RT5651 audio CODEC
|
||||
|
||||
This device supports I2C only.
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible : "realtek,rt5651".
|
||||
|
||||
- reg : The I2C address of the device.
|
||||
|
||||
Optional properties:
|
||||
|
||||
- realtek,in2-differential
|
||||
Boolean. Indicate MIC2 input are differential, rather than single-ended.
|
||||
|
||||
- realtek,dmic-en
|
||||
Boolean. true if dmic is used.
|
||||
|
||||
Pins on the device (for linking into audio routes) for RT5651:
|
||||
|
||||
* DMIC L1
|
||||
* DMIC R1
|
||||
* IN1P
|
||||
* IN2P
|
||||
* IN2N
|
||||
* IN3P
|
||||
* HPOL
|
||||
* HPOR
|
||||
* LOUTL
|
||||
* LOUTR
|
||||
* PDML
|
||||
* PDMR
|
||||
|
||||
Example:
|
||||
|
||||
codec: rt5651@1a {
|
||||
compatible = "realtek,rt5651";
|
||||
reg = <0x1a>;
|
||||
realtek,dmic-en = "true";
|
||||
realtek,in2-diff = "false";
|
||||
};
|
||||
@@ -46,6 +46,7 @@ struct i2s_platform_data {
|
||||
u32 snd_rates;
|
||||
|
||||
#define DW_I2S_QUIRK_COMP_REG_OFFSET (1 << 0)
|
||||
#define DW_I2S_QUIRK_COMP_PARAM1 (1 << 1)
|
||||
unsigned int quirks;
|
||||
unsigned int i2s_reg_comp1;
|
||||
unsigned int i2s_reg_comp2;
|
||||
|
||||
@@ -233,6 +233,15 @@ enum { SDI0, SDI1, SDI2, SDI3, SDO0, SDO1, SDO2, SDO3 };
|
||||
#define AZX_MLCTL_SPA (1<<16)
|
||||
#define AZX_MLCTL_CPA 23
|
||||
|
||||
|
||||
/* registers for DMA Resume Capability Structure */
|
||||
#define AZX_DRSM_CAP_ID 0x5
|
||||
#define AZX_REG_DRSM_CTL 0x4
|
||||
/* Base used to calculate the iterating register offset */
|
||||
#define AZX_DRSM_BASE 0x08
|
||||
/* Interval used to calculate the iterating register offset */
|
||||
#define AZX_DRSM_INTERVAL 0x08
|
||||
|
||||
/*
|
||||
* helpers to read the stream position
|
||||
*/
|
||||
|
||||
@@ -12,6 +12,7 @@
|
||||
* @spbcap: SPIB capabilities pointer
|
||||
* @mlcap: MultiLink capabilities pointer
|
||||
* @gtscap: gts capabilities pointer
|
||||
* @drsmcap: dma resume capabilities pointer
|
||||
* @hlink_list: link list of HDA links
|
||||
*/
|
||||
struct hdac_ext_bus {
|
||||
@@ -23,6 +24,7 @@ struct hdac_ext_bus {
|
||||
void __iomem *spbcap;
|
||||
void __iomem *mlcap;
|
||||
void __iomem *gtscap;
|
||||
void __iomem *drsmcap;
|
||||
|
||||
struct list_head hlink_list;
|
||||
};
|
||||
@@ -72,6 +74,9 @@ enum hdac_ext_stream_type {
|
||||
* @pplc_addr: processing pipe link stream pointer
|
||||
* @spib_addr: software position in buffers stream pointer
|
||||
* @fifo_addr: software position Max fifos stream pointer
|
||||
* @dpibr_addr: DMA position in buffer resume pointer
|
||||
* @dpib: DMA position in buffer
|
||||
* @lpib: Linear position in buffer
|
||||
* @decoupled: stream host and link is decoupled
|
||||
* @link_locked: link is locked
|
||||
* @link_prepared: link is prepared
|
||||
@@ -86,6 +91,10 @@ struct hdac_ext_stream {
|
||||
void __iomem *spib_addr;
|
||||
void __iomem *fifo_addr;
|
||||
|
||||
void __iomem *dpibr_addr;
|
||||
|
||||
u32 dpib;
|
||||
u32 lpib;
|
||||
bool decoupled:1;
|
||||
bool link_locked:1;
|
||||
bool link_prepared;
|
||||
@@ -116,6 +125,11 @@ int snd_hdac_ext_stream_set_spib(struct hdac_ext_bus *ebus,
|
||||
struct hdac_ext_stream *stream, u32 value);
|
||||
int snd_hdac_ext_stream_get_spbmaxfifo(struct hdac_ext_bus *ebus,
|
||||
struct hdac_ext_stream *stream);
|
||||
void snd_hdac_ext_stream_drsm_enable(struct hdac_ext_bus *ebus,
|
||||
bool enable, int index);
|
||||
int snd_hdac_ext_stream_set_dpibr(struct hdac_ext_bus *ebus,
|
||||
struct hdac_ext_stream *stream, u32 value);
|
||||
int snd_hdac_ext_stream_set_lpib(struct hdac_ext_stream *stream, u32 value);
|
||||
|
||||
void snd_hdac_ext_link_stream_start(struct hdac_ext_stream *hstream);
|
||||
void snd_hdac_ext_link_stream_clear(struct hdac_ext_stream *hstream);
|
||||
@@ -133,6 +147,7 @@ struct hdac_ext_link {
|
||||
|
||||
int snd_hdac_ext_bus_link_power_up(struct hdac_ext_link *link);
|
||||
int snd_hdac_ext_bus_link_power_down(struct hdac_ext_link *link);
|
||||
int snd_hdac_ext_bus_link_power_up_all(struct hdac_ext_bus *ebus);
|
||||
int snd_hdac_ext_bus_link_power_down_all(struct hdac_ext_bus *ebus);
|
||||
void snd_hdac_ext_link_set_stream_id(struct hdac_ext_link *link,
|
||||
int stream);
|
||||
|
||||
@@ -222,6 +222,7 @@ struct snd_soc_dai_driver {
|
||||
const char *name;
|
||||
unsigned int id;
|
||||
unsigned int base;
|
||||
struct snd_soc_dobj dobj;
|
||||
|
||||
/* DAI driver callbacks */
|
||||
int (*probe)(struct snd_soc_dai *dai);
|
||||
|
||||
+9
-2
@@ -798,6 +798,7 @@ struct snd_soc_component {
|
||||
unsigned int registered_as_component:1;
|
||||
|
||||
struct list_head list;
|
||||
struct list_head list_aux; /* for auxiliary component of the card */
|
||||
|
||||
struct snd_soc_dai_driver *dai_drv;
|
||||
int num_dai;
|
||||
@@ -841,6 +842,9 @@ struct snd_soc_component {
|
||||
int (*probe)(struct snd_soc_component *);
|
||||
void (*remove)(struct snd_soc_component *);
|
||||
|
||||
/* machine specific init */
|
||||
int (*init)(struct snd_soc_component *component);
|
||||
|
||||
#ifdef CONFIG_DEBUG_FS
|
||||
void (*init_debugfs)(struct snd_soc_component *component);
|
||||
const char *debugfs_prefix;
|
||||
@@ -1141,8 +1145,7 @@ struct snd_soc_card {
|
||||
*/
|
||||
struct snd_soc_aux_dev *aux_dev;
|
||||
int num_aux_devs;
|
||||
struct snd_soc_pcm_runtime *rtd_aux;
|
||||
int num_aux_rtd;
|
||||
struct list_head aux_comp_list;
|
||||
|
||||
const struct snd_kcontrol_new *controls;
|
||||
int num_controls;
|
||||
@@ -1550,6 +1553,7 @@ static inline void snd_soc_initialize_card_lists(struct snd_soc_card *card)
|
||||
INIT_LIST_HEAD(&card->widgets);
|
||||
INIT_LIST_HEAD(&card->paths);
|
||||
INIT_LIST_HEAD(&card->dapm_list);
|
||||
INIT_LIST_HEAD(&card->aux_comp_list);
|
||||
}
|
||||
|
||||
static inline bool snd_soc_volsw_is_stereo(struct soc_mixer_control *mc)
|
||||
@@ -1676,6 +1680,9 @@ int snd_soc_add_dai_link(struct snd_soc_card *card,
|
||||
void snd_soc_remove_dai_link(struct snd_soc_card *card,
|
||||
struct snd_soc_dai_link *dai_link);
|
||||
|
||||
int snd_soc_register_dai(struct snd_soc_component *component,
|
||||
struct snd_soc_dai_driver *dai_drv);
|
||||
|
||||
#include <sound/soc-dai.h>
|
||||
|
||||
#ifdef CONFIG_DEBUG_FS
|
||||
|
||||
@@ -77,6 +77,12 @@ int snd_hdac_ext_bus_parse_capabilities(struct hdac_ext_bus *ebus)
|
||||
ebus->spbcap = bus->remap_addr + offset;
|
||||
break;
|
||||
|
||||
case AZX_DRSM_CAP_ID:
|
||||
/* DMA resume capability found, handler function */
|
||||
dev_dbg(bus->dev, "Found DRSM capability\n");
|
||||
ebus->drsmcap = bus->remap_addr + offset;
|
||||
break;
|
||||
|
||||
default:
|
||||
dev_dbg(bus->dev, "Unknown capability %d\n", cur_cap);
|
||||
break;
|
||||
@@ -240,7 +246,7 @@ static int check_hdac_link_power_active(struct hdac_ext_link *link, bool enable)
|
||||
int mask = (1 << AZX_MLCTL_CPA);
|
||||
|
||||
udelay(3);
|
||||
timeout = 50;
|
||||
timeout = 150;
|
||||
|
||||
do {
|
||||
val = readl(link->ml_addr + AZX_REG_ML_LCTL);
|
||||
@@ -281,6 +287,27 @@ int snd_hdac_ext_bus_link_power_down(struct hdac_ext_link *link)
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_link_power_down);
|
||||
|
||||
/**
|
||||
* snd_hdac_ext_bus_link_power_up_all -power up all hda link
|
||||
* @ebus: HD-audio extended bus
|
||||
*/
|
||||
int snd_hdac_ext_bus_link_power_up_all(struct hdac_ext_bus *ebus)
|
||||
{
|
||||
struct hdac_ext_link *hlink = NULL;
|
||||
int ret;
|
||||
|
||||
list_for_each_entry(hlink, &ebus->hlink_list, list) {
|
||||
snd_hdac_updatel(hlink->ml_addr,
|
||||
AZX_REG_ML_LCTL, 0, AZX_MLCTL_SPA);
|
||||
ret = check_hdac_link_power_active(hlink, true);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_link_power_up_all);
|
||||
|
||||
/**
|
||||
* snd_hdac_ext_bus_link_power_down_all -power down all hda link
|
||||
* @ebus: HD-audio extended bus
|
||||
|
||||
@@ -59,6 +59,10 @@ void snd_hdac_ext_stream_init(struct hdac_ext_bus *ebus,
|
||||
AZX_SPB_MAXFIFO;
|
||||
}
|
||||
|
||||
if (ebus->drsmcap)
|
||||
stream->dpibr_addr = ebus->drsmcap + AZX_DRSM_BASE +
|
||||
AZX_DRSM_INTERVAL * idx;
|
||||
|
||||
stream->decoupled = false;
|
||||
snd_hdac_stream_init(bus, &stream->hstream, idx, direction, tag);
|
||||
}
|
||||
@@ -107,6 +111,7 @@ void snd_hdac_stream_free_all(struct hdac_ext_bus *ebus)
|
||||
while (!list_empty(&bus->stream_list)) {
|
||||
s = list_first_entry(&bus->stream_list, struct hdac_stream, list);
|
||||
stream = stream_to_hdac_ext_stream(s);
|
||||
snd_hdac_ext_stream_decouple(ebus, stream, false);
|
||||
list_del(&s->list);
|
||||
kfree(stream);
|
||||
}
|
||||
@@ -497,3 +502,70 @@ void snd_hdac_ext_stop_streams(struct hdac_ext_bus *ebus)
|
||||
}
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(snd_hdac_ext_stop_streams);
|
||||
|
||||
/**
|
||||
* snd_hdac_ext_stream_drsm_enable - enable DMA resume for a stream
|
||||
* @ebus: HD-audio ext core bus
|
||||
* @enable: flag to enable/disable DRSM
|
||||
* @index: stream index for which DRSM need to be enabled
|
||||
*/
|
||||
void snd_hdac_ext_stream_drsm_enable(struct hdac_ext_bus *ebus,
|
||||
bool enable, int index)
|
||||
{
|
||||
u32 mask = 0;
|
||||
u32 register_mask = 0;
|
||||
struct hdac_bus *bus = &ebus->bus;
|
||||
|
||||
if (!ebus->drsmcap) {
|
||||
dev_err(bus->dev, "Address of DRSM capability is NULL");
|
||||
return;
|
||||
}
|
||||
|
||||
mask |= (1 << index);
|
||||
|
||||
register_mask = readl(ebus->drsmcap + AZX_REG_SPB_SPBFCCTL);
|
||||
|
||||
mask |= register_mask;
|
||||
|
||||
if (enable)
|
||||
snd_hdac_updatel(ebus->drsmcap, AZX_REG_DRSM_CTL, 0, mask);
|
||||
else
|
||||
snd_hdac_updatel(ebus->drsmcap, AZX_REG_DRSM_CTL, mask, 0);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(snd_hdac_ext_stream_drsm_enable);
|
||||
|
||||
/**
|
||||
* snd_hdac_ext_stream_set_dpibr - sets the dpibr value of a stream
|
||||
* @ebus: HD-audio ext core bus
|
||||
* @stream: hdac_ext_stream
|
||||
* @value: dpib value to set
|
||||
*/
|
||||
int snd_hdac_ext_stream_set_dpibr(struct hdac_ext_bus *ebus,
|
||||
struct hdac_ext_stream *stream, u32 value)
|
||||
{
|
||||
struct hdac_bus *bus = &ebus->bus;
|
||||
|
||||
if (!ebus->drsmcap) {
|
||||
dev_err(bus->dev, "Address of DRSM capability is NULL");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
writel(value, stream->dpibr_addr);
|
||||
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(snd_hdac_ext_stream_set_dpibr);
|
||||
|
||||
/**
|
||||
* snd_hdac_ext_stream_set_lpib - sets the lpib value of a stream
|
||||
* @ebus: HD-audio ext core bus
|
||||
* @stream: hdac_ext_stream
|
||||
* @value: lpib value to set
|
||||
*/
|
||||
int snd_hdac_ext_stream_set_lpib(struct hdac_ext_stream *stream, u32 value)
|
||||
{
|
||||
snd_hdac_stream_writel(&stream->hstream, SD_LPIB, value);
|
||||
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(snd_hdac_ext_stream_set_lpib);
|
||||
|
||||
@@ -38,6 +38,7 @@ config SND_SOC_TOPOLOGY
|
||||
|
||||
# All the supported SoCs
|
||||
source "sound/soc/adi/Kconfig"
|
||||
source "sound/soc/amd/Kconfig"
|
||||
source "sound/soc/atmel/Kconfig"
|
||||
source "sound/soc/au1x/Kconfig"
|
||||
source "sound/soc/bcm/Kconfig"
|
||||
|
||||
@@ -18,6 +18,7 @@ obj-$(CONFIG_SND_SOC) += snd-soc-core.o
|
||||
obj-$(CONFIG_SND_SOC) += codecs/
|
||||
obj-$(CONFIG_SND_SOC) += generic/
|
||||
obj-$(CONFIG_SND_SOC) += adi/
|
||||
obj-$(CONFIG_SND_SOC) += amd/
|
||||
obj-$(CONFIG_SND_SOC) += atmel/
|
||||
obj-$(CONFIG_SND_SOC) += au1x/
|
||||
obj-$(CONFIG_SND_SOC) += bcm/
|
||||
|
||||
@@ -0,0 +1,4 @@
|
||||
config SND_SOC_AMD_ACP
|
||||
tristate "AMD Audio Coprocessor support"
|
||||
help
|
||||
This option enables ACP DMA support on AMD platform.
|
||||
@@ -0,0 +1,3 @@
|
||||
snd-soc-acp-pcm-objs := acp-pcm-dma.o
|
||||
|
||||
obj-$(CONFIG_SND_SOC_AMD_ACP) += snd-soc-acp-pcm.o
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,118 @@
|
||||
#ifndef __ACP_HW_H
|
||||
#define __ACP_HW_H
|
||||
|
||||
#include "include/acp_2_2_d.h"
|
||||
#include "include/acp_2_2_sh_mask.h"
|
||||
|
||||
#define ACP_PAGE_SIZE_4K_ENABLE 0x02
|
||||
|
||||
#define ACP_PLAYBACK_PTE_OFFSET 10
|
||||
#define ACP_CAPTURE_PTE_OFFSET 0
|
||||
|
||||
#define ACP_GARLIC_CNTL_DEFAULT 0x00000FB4
|
||||
#define ACP_ONION_CNTL_DEFAULT 0x00000FB4
|
||||
|
||||
#define ACP_PHYSICAL_BASE 0x14000
|
||||
|
||||
/* Playback SRAM address (as a destination in dma descriptor) */
|
||||
#define ACP_SHARED_RAM_BANK_1_ADDRESS 0x4002000
|
||||
|
||||
/* Capture SRAM address (as a source in dma descriptor) */
|
||||
#define ACP_SHARED_RAM_BANK_5_ADDRESS 0x400A000
|
||||
|
||||
#define ACP_DMA_RESET_TIME 10000
|
||||
#define ACP_CLOCK_EN_TIME_OUT_VALUE 0x000000FF
|
||||
#define ACP_SOFT_RESET_DONE_TIME_OUT_VALUE 0x000000FF
|
||||
#define ACP_DMA_COMPLETE_TIME_OUT_VALUE 0x000000FF
|
||||
|
||||
#define ACP_SRAM_BASE_ADDRESS 0x4000000
|
||||
#define ACP_DAGB_GRP_SRAM_BASE_ADDRESS 0x4001000
|
||||
#define ACP_DAGB_GRP_SRBM_SRAM_BASE_OFFSET 0x1000
|
||||
#define ACP_INTERNAL_APERTURE_WINDOW_0_ADDRESS 0x00000000
|
||||
#define ACP_INTERNAL_APERTURE_WINDOW_4_ADDRESS 0x01800000
|
||||
|
||||
#define TO_ACP_I2S_1 0x2
|
||||
#define TO_ACP_I2S_2 0x4
|
||||
#define FROM_ACP_I2S_1 0xa
|
||||
#define FROM_ACP_I2S_2 0xb
|
||||
|
||||
#define ACP_TILE_ON_MASK 0x03
|
||||
#define ACP_TILE_OFF_MASK 0x02
|
||||
#define ACP_TILE_ON_RETAIN_REG_MASK 0x1f
|
||||
#define ACP_TILE_OFF_RETAIN_REG_MASK 0x20
|
||||
|
||||
#define ACP_TILE_P1_MASK 0x3e
|
||||
#define ACP_TILE_P2_MASK 0x3d
|
||||
#define ACP_TILE_DSP0_MASK 0x3b
|
||||
#define ACP_TILE_DSP1_MASK 0x37
|
||||
|
||||
#define ACP_TILE_DSP2_MASK 0x2f
|
||||
/* Playback DMA channels */
|
||||
#define SYSRAM_TO_ACP_CH_NUM 12
|
||||
#define ACP_TO_I2S_DMA_CH_NUM 13
|
||||
|
||||
/* Capture DMA channels */
|
||||
#define ACP_TO_SYSRAM_CH_NUM 14
|
||||
#define I2S_TO_ACP_DMA_CH_NUM 15
|
||||
|
||||
#define NUM_DSCRS_PER_CHANNEL 2
|
||||
|
||||
#define PLAYBACK_START_DMA_DESCR_CH12 0
|
||||
#define PLAYBACK_END_DMA_DESCR_CH12 1
|
||||
#define PLAYBACK_START_DMA_DESCR_CH13 2
|
||||
#define PLAYBACK_END_DMA_DESCR_CH13 3
|
||||
|
||||
#define CAPTURE_START_DMA_DESCR_CH14 4
|
||||
#define CAPTURE_END_DMA_DESCR_CH14 5
|
||||
#define CAPTURE_START_DMA_DESCR_CH15 6
|
||||
#define CAPTURE_END_DMA_DESCR_CH15 7
|
||||
|
||||
enum acp_dma_priority_level {
|
||||
/* 0x0 Specifies the DMA channel is given normal priority */
|
||||
ACP_DMA_PRIORITY_LEVEL_NORMAL = 0x0,
|
||||
/* 0x1 Specifies the DMA channel is given high priority */
|
||||
ACP_DMA_PRIORITY_LEVEL_HIGH = 0x1,
|
||||
ACP_DMA_PRIORITY_LEVEL_FORCESIZE = 0xFF
|
||||
};
|
||||
|
||||
struct audio_substream_data {
|
||||
struct page *pg;
|
||||
unsigned int order;
|
||||
u16 num_of_pages;
|
||||
u16 direction;
|
||||
uint64_t size;
|
||||
void __iomem *acp_mmio;
|
||||
};
|
||||
|
||||
enum {
|
||||
ACP_TILE_P1 = 0,
|
||||
ACP_TILE_P2,
|
||||
ACP_TILE_DSP0,
|
||||
ACP_TILE_DSP1,
|
||||
ACP_TILE_DSP2,
|
||||
};
|
||||
|
||||
enum {
|
||||
ACP_DMA_ATTRIBUTES_SHAREDMEM_TO_DAGB_ONION = 0x0,
|
||||
ACP_DMA_ATTRIBUTES_SHARED_MEM_TO_DAGB_GARLIC = 0x1,
|
||||
ACP_DMA_ATTRIBUTES_DAGB_ONION_TO_SHAREDMEM = 0x8,
|
||||
ACP_DMA_ATTRIBUTES_DAGB_GARLIC_TO_SHAREDMEM = 0x9,
|
||||
ACP_DMA_ATTRIBUTES_FORCE_SIZE = 0xF
|
||||
};
|
||||
|
||||
typedef struct acp_dma_dscr_transfer {
|
||||
/* Specifies the source memory location for the DMA data transfer. */
|
||||
u32 src;
|
||||
/* Specifies the destination memory location to where the data will
|
||||
* be transferred.
|
||||
*/
|
||||
u32 dest;
|
||||
/* Specifies the number of bytes need to be transferred
|
||||
* from source to destination memory.Transfer direction & IOC enable
|
||||
*/
|
||||
u32 xfer_val;
|
||||
/* Reserved for future use */
|
||||
u32 reserved;
|
||||
} acp_dma_dscr_transfer_t;
|
||||
|
||||
#endif /*__ACP_HW_H */
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -31,20 +31,20 @@
|
||||
* General Public License for more details.
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/device.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/clk.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/device.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/slab.h>
|
||||
|
||||
#include <sound/core.h>
|
||||
#include <sound/dmaengine_pcm.h>
|
||||
#include <sound/initval.h>
|
||||
#include <sound/pcm.h>
|
||||
#include <sound/pcm_params.h>
|
||||
#include <sound/initval.h>
|
||||
#include <sound/soc.h>
|
||||
#include <sound/dmaengine_pcm.h>
|
||||
|
||||
/* Clock registers */
|
||||
#define BCM2835_CLK_PCMCTL_REG 0x00
|
||||
|
||||
@@ -87,7 +87,7 @@ config SND_SOC_ALL_CODECS
|
||||
select SND_SOC_ML26124 if I2C
|
||||
select SND_SOC_NAU8825 if I2C
|
||||
select SND_SOC_PCM1681 if I2C
|
||||
select SND_SOC_PCM1792A if SPI_MASTER
|
||||
select SND_SOC_PCM179X if SPI_MASTER
|
||||
select SND_SOC_PCM3008
|
||||
select SND_SOC_PCM3168A_I2C if I2C
|
||||
select SND_SOC_PCM3168A_SPI if SPI_MASTER
|
||||
@@ -526,8 +526,8 @@ config SND_SOC_PCM1681
|
||||
tristate "Texas Instruments PCM1681 CODEC"
|
||||
depends on I2C
|
||||
|
||||
config SND_SOC_PCM1792A
|
||||
tristate "Texas Instruments PCM1792A CODEC"
|
||||
config SND_SOC_PCM179X
|
||||
tristate "Texas Instruments PCM179X CODEC"
|
||||
depends on SPI_MASTER
|
||||
|
||||
config SND_SOC_PCM3008
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user