Merge tag 'at91-cleanup2' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91 into next/soc

Merge "at91: cleanup for 3.20 #2" from Nicolas Ferre:

Second batch of cleanup for 3.20:
- By reworking the PM code, we can remove the AT91 more specific initialization
- We are using DT for SRAM initialization now, so we can remove its explicit
  mapping
- The PMC clock driver now hosts IDLE function for at91rm9200 with other
  SoCs ones.

* tag 'at91-cleanup2' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91: (37 commits)
  ARM: at91: move at91rm9200_idle() to clk/at91/pmc.c
  ARM: at91: remove unused at91_init_sram
  ARM: at91: sama5d4: remove useless call to at91_init_sram
  ARM: at91: remove useless map_io
  ARM: at91: pm: prepare for multiplatform
  ARM: at91: pm: add UDP and UHP checks to newer SoCs
  ARM: at91: pm: use the mmio-sram pool to access SRAM
  ARM: at91: pm: rework cpu detection
  ARM: at91: dts: sama5d3: add ov2640 camera sensor support
  ARM: at91: dts: sama5d3: change name of pinctrl of ISI_MCK
  ARM: at91: dts: sama5d3: change name of pinctrl_isi_{power,reset}
  ARM: at91: dts: sama5d3: move the isi mck pin to mb
  ARM: at91: dts: sama5d3: add missing pins of isi
  ARM: at91: dts: sama5d3: split isi pinctrl
  ARM: at91: dts: sama5d3: add isi clock
  ARM: at91/dt: ethernut5: use at91sam9xe.dtsi
  ARM: at91/dt: Add a dtsi for at91sam9xe
  ARM: at91/dt: add SRAM nodes
  ARM: at91/dt: at91rm9200ek: enable RTC
  ARM: at91/dt: rm9200: add RTC node
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
2015-01-21 15:17:56 -08:00
45 changed files with 520 additions and 491 deletions
+124
View File
@@ -0,0 +1,124 @@
ARM Atmel SoCs (aka AT91)
=========================
Introduction
------------
This document gives useful information about the ARM Atmel SoCs that are
currently supported in Linux Mainline (you know, the one on kernel.org).
It is important to note that the Atmel | SMART ARM-based MPU product line is
historically named "AT91" or "at91" throughout the Linux kernel development
process even if this product prefix has completely disappeared from the
official Atmel product name. Anyway, files, directories, git trees,
git branches/tags and email subject always contain this "at91" sub-string.
AT91 SoCs
---------
Documentation and detailled datasheet for each product are available on
the Atmel website: http://www.atmel.com.
Flavors:
* ARM 920 based SoC
- at91rm9200
+ Datasheet
http://www.atmel.com/Images/doc1768.pdf
* ARM 926 based SoCs
- at91sam9260
+ Datasheet
http://www.atmel.com/Images/doc6221.pdf
- at91sam9xe
+ Datasheet
http://www.atmel.com/Images/Atmel-6254-32-bit-ARM926EJ-S-Embedded-Microprocessor-SAM9XE_Datasheet.pdf
- at91sam9261
+ Datasheet
http://www.atmel.com/Images/doc6062.pdf
- at91sam9263
+ Datasheet
http://www.atmel.com/Images/Atmel_6249_32-bit-ARM926EJ-S-Microcontroller_SAM9263_Datasheet.pdf
- at91sam9rl
+ Datasheet
http://www.atmel.com/Images/doc6289.pdf
- at91sam9g20
+ Datasheet
http://www.atmel.com/Images/doc6384.pdf
- at91sam9g45 family
- at91sam9g45
- at91sam9g46
- at91sam9m10
- at91sam9m11 (device superset)
+ Datasheet
http://www.atmel.com/Images/Atmel-6437-32-bit-ARM926-Embedded-Microprocessor-SAM9M11_Datasheet.pdf
- at91sam9x5 family (aka "The 5 series")
- at91sam9g15
- at91sam9g25
- at91sam9g35
- at91sam9x25
- at91sam9x35
+ Datasheet (can be considered as covering the whole family)
http://www.atmel.com/Images/Atmel_11055_32-bit-ARM926EJ-S-Microcontroller_SAM9X35_Datasheet.pdf
- at91sam9n12
+ Datasheet
http://www.atmel.com/Images/Atmel_11063_32-bit-ARM926EJ-S-Microcontroller_SAM9N12CN11CN12_Datasheet.pdf
* ARM Cortex-A5 based SoCs
- sama5d3 family
- sama5d31
- sama5d33
- sama5d34
- sama5d35
- sama5d36 (device superset)
+ Datasheet
http://www.atmel.com/Images/Atmel-11121-32-bit-Cortex-A5-Microcontroller-SAMA5D3_Datasheet.pdf
* ARM Cortex-A5 + NEON based SoCs
- sama5d4 family
- sama5d41
- sama5d42
- sama5d43
- sama5d44 (device superset)
+ Datasheet
http://www.atmel.com/Images/Atmel-11238-32-bit-Cortex-A5-Microcontroller-SAMA5D4_Datasheet.pdf
Linux kernel information
------------------------
Linux kernel mach directory: arch/arm/mach-at91
MAINTAINERS entry is: "ARM/ATMEL AT91RM9200 AND AT91SAM ARM ARCHITECTURES"
Device Tree for AT91 SoCs and boards
------------------------------------
All AT91 SoCs are converted to Device Tree. Since Linux 3.19, these products
must use this method to boot the Linux kernel.
Work In Progress statement:
Device Tree files and Device Tree bindings that apply to AT91 SoCs and boards are
considered as "Unstable". To be completely clear, any at91 binding can change at
any time. So, be sure to use a Device Tree Binary and a Kernel Image generated from
the same source tree.
Please refer to the Documentation/devicetree/bindings/ABI.txt file for a
definition of a "Stable" binding/ABI.
This statement will be removed by AT91 MAINTAINERS when appropriate.
Naming conventions and best practice:
- SoCs Device Tree Source Include files are named after the official name of
the product (at91sam9g20.dtsi or sama5d33.dtsi for instance).
- Device Tree Source Include files (.dtsi) are used to collect common nodes that can be
shared across SoCs or boards (sama5d3.dtsi or at91sam9x5cm.dtsi for instance).
When collecting nodes for a particular peripheral or topic, the identifier have to
be placed at the end of the file name, separated with a "_" (at91sam9x5_can.dtsi
or sama5d3_gmac.dtsi for example).
- board Device Tree Source files (.dts) are prefixed by the string "at91-" so
that they can be identified easily. Note that some files are historical exceptions
to this rule (sama5d3[13456]ek.dts, usb_a9g20.dts or animeo_ip.dts for example).
@@ -24,6 +24,7 @@ compatible: must be one of:
o "atmel,at91sam9g45"
o "atmel,at91sam9n12"
o "atmel,at91sam9rl"
o "atmel,at91sam9xe"
* "atmel,sama5" for SoCs using a Cortex-A5, shall be extended with the specific
SoC family:
o "atmel,sama5d3" shall be extended with the specific SoC compatible:
@@ -136,3 +137,19 @@ Example:
compatible = "atmel,at91sam9260-rstc";
reg = <0xfffffd00 0x10>;
};
Special Function Registers (SFR)
Special Function Registers (SFR) manage specific aspects of the integrated
memory, bridge implementations, processor and other functionality not controlled
elsewhere.
required properties:
- compatible: Should be "atmel,<chip>-sfr", "syscon".
<chip> can be "sama5d3" or "sama5d4".
- reg: Should contain registers location and length
sfr@f0038000 {
compatible = "atmel,sama5d3-sfr", "syscon";
reg = <0xf0038000 0x60>;
};
+1
View File
@@ -877,6 +877,7 @@ F: arch/arm/boot/dts/at91*.dts
F: arch/arm/boot/dts/at91*.dtsi
F: arch/arm/boot/dts/sama*.dts
F: arch/arm/boot/dts/sama*.dtsi
F: arch/arm/include/debug/at91.S
ARM/ATMEL AT91 Clock Support
M: Boris Brezillon <boris.brezillon@free-electrons.com>
+7 -2
View File
@@ -115,15 +115,18 @@ choice
0x80024000 | 0xf0024000 | UART9
config AT91_DEBUG_LL_DBGU0
bool "Kernel low-level debugging on rm9200, 9260/9g20, 9261/9g10 and 9rl"
bool "Kernel low-level debugging on rm9200, 9260/9g20, 9261/9g10, 9rl, 9x5, 9n12"
select DEBUG_AT91_UART
depends on HAVE_AT91_DBGU0
config AT91_DEBUG_LL_DBGU1
bool "Kernel low-level debugging on 9263 and 9g45"
bool "Kernel low-level debugging on 9263, 9g45 and sama5d3"
select DEBUG_AT91_UART
depends on HAVE_AT91_DBGU1
config AT91_DEBUG_LL_DBGU2
bool "Kernel low-level debugging on sama5d4"
select DEBUG_AT91_UART
depends on HAVE_AT91_DBGU2
config DEBUG_BCM2835
@@ -1204,6 +1207,8 @@ config DEBUG_LL_INCLUDE
string
default "debug/sa1100.S" if DEBUG_SA1100
default "debug/8250.S" if DEBUG_LL_UART_8250 || DEBUG_UART_8250
default "debug/at91.S" if AT91_DEBUG_LL_DBGU0 || AT91_DEBUG_LL_DBGU1 || \
AT91_DEBUG_LL_DBGU2
default "debug/asm9260.S" if DEBUG_ASM9260_UART
default "debug/clps711x.S" if DEBUG_CLPS711X_UART1 || DEBUG_CLPS711X_UART2
default "debug/meson.S" if DEBUG_MESON_UARTAO
+12
View File
@@ -66,6 +66,11 @@
};
};
sram: sram@00200000 {
compatible = "mmio-sram";
reg = <0x00200000 0x4000>;
};
ahb {
compatible = "simple-bus";
#address-cells = <1>;
@@ -356,6 +361,13 @@
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
};
rtc: rtc@fffffe00 {
compatible = "atmel,at91rm9200-rtc";
reg = <0xfffffe00 0x40>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
status = "disabled";
};
tcb0: timer@fffa0000 {
compatible = "atmel,at91rm9200-tcb";
reg = <0xfffa0000 0x100>;
+4
View File
@@ -77,6 +77,10 @@
dbgu: serial@fffff200 {
status = "okay";
};
rtc: rtc@fffffe00 {
status = "okay";
};
};
usb0: ohci@00300000 {
+5
View File
@@ -69,6 +69,11 @@
};
};
sram0: sram@002ff000 {
compatible = "mmio-sram";
reg = <0x002ff000 0x2000>;
};
ahb {
compatible = "simple-bus";
#address-cells = <1>;
+5
View File
@@ -60,6 +60,11 @@
};
};
sram: sram@00300000 {
compatible = "mmio-sram";
reg = <0x00300000 0x28000>;
};
ahb {
compatible = "simple-bus";
#address-cells = <1>;
+11 -1
View File
@@ -62,6 +62,16 @@
};
};
sram0: sram@00300000 {
compatible = "mmio-sram";
reg = <0x00300000 0x14000>;
};
sram1: sram@00500000 {
compatible = "mmio-sram";
reg = <0x00300000 0x4000>;
};
ahb {
compatible = "simple-bus";
#address-cells = <1>;
@@ -294,7 +304,7 @@
reg = <17>;
};
ac91_clk: ac97_clk {
ac97_clk: ac97_clk {
#clock-cells = <0>;
reg = <18>;
};
+9
View File
@@ -16,6 +16,15 @@
reg = <0x20000000 0x08000000>;
};
sram0: sram@002ff000 {
status = "disabled";
};
sram1: sram@002fc000 {
compatible = "mmio-sram";
reg = <0x002fc000 0x8000>;
};
ahb {
apb {
i2c0: i2c@fffac000 {
+5 -2
View File
@@ -74,6 +74,11 @@
};
};
sram: sram@00300000 {
compatible = "mmio-sram";
reg = <0x00300000 0x10000>;
};
ahb {
compatible = "simple-bus";
#address-cells = <1>;
@@ -1287,7 +1292,6 @@
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
reg = <0x00700000 0x100000>;
interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
//TODO
clocks = <&usb>, <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
status = "disabled";
@@ -1297,7 +1301,6 @@
compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
reg = <0x00800000 0x100000>;
interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
//TODO
clocks = <&usb>, <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
clock-names = "usb_clk", "ehci_clk", "hclk", "uhpck";
status = "disabled";
+12
View File
@@ -64,6 +64,11 @@
};
};
sram: sram@00300000 {
compatible = "mmio-sram";
reg = <0x00300000 0x8000>;
};
ahb {
compatible = "simple-bus";
#address-cells = <1>;
@@ -893,6 +898,13 @@
status = "disabled";
};
rtc@fffffeb0 {
compatible = "atmel,at91rm9200-rtc";
reg = <0xfffffeb0 0x40>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
status = "disabled";
};
pwm0: pwm@f8034000 {
compatible = "atmel,at91sam9rl-pwm";
reg = <0xf8034000 0x300>;
+5
View File
@@ -70,6 +70,11 @@
};
};
sram: sram@00300000 {
compatible = "mmio-sram";
reg = <0x00300000 0x10000>;
};
ahb {
compatible = "simple-bus";
#address-cells = <1>;
+5
View File
@@ -72,6 +72,11 @@
};
};
sram: sram@00300000 {
compatible = "mmio-sram";
reg = <0x00300000 0x8000>;
};
ahb {
compatible = "simple-bus";
#address-cells = <1>;
+60
View File
@@ -0,0 +1,60 @@
/*
* at91sam9xe.dtsi - Device Tree Include file for AT91SAM9XE family SoC
*
* Copyright (C) 2015 Atmel,
* 2015 Alexandre Belloni <alexandre.Belloni@free-electrons.com>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#include "at91sam9260.dtsi"
/ {
model = "Atmel AT91SAM9XE family SoC";
compatible = "atmel,at91sam9xe", "atmel,at91sam9260";
sram0: sram@002ff000 {
status = "disabled";
};
sram1: sram@00300000 {
compatible = "mmio-sram";
reg = <0x00300000 0x4000>;
};
};
+1 -1
View File
@@ -6,7 +6,7 @@
* Licensed under GPLv2.
*/
/dts-v1/;
#include "at91sam9260.dtsi"
#include "at91sam9xe.dtsi"
/ {
model = "Ethernut 5";
+29 -5
View File
@@ -78,6 +78,11 @@
};
};
sram: sram@00300000 {
compatible = "mmio-sram";
reg = <0x00300000 0x20000>;
};
ahb {
compatible = "simple-bus";
#address-cells = <1>;
@@ -214,7 +219,20 @@
compatible = "atmel,at91sam9g45-isi";
reg = <0xf0034000 0x4000>;
interrupts = <37 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_isi_data_0_7>;
clocks = <&isi_clk>;
clock-names = "isi_clk";
status = "disabled";
port {
#address-cells = <1>;
#size-cells = <0>;
};
};
sfr: sfr@f0038000 {
compatible = "atmel,sama5d3-sfr", "syscon";
reg = <0xf0038000 0x60>;
};
mmc1: mmc@f8000000 {
@@ -545,7 +563,7 @@
};
isi {
pinctrl_isi: isi-0 {
pinctrl_isi_data_0_7: isi-0-data-0-7 {
atmel,pins =
<AT91_PIOA 16 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA16 periph C ISI_D0, conflicts with LCDDAT16 */
AT91_PIOA 17 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA17 periph C ISI_D1, conflicts with LCDDAT17 */
@@ -557,13 +575,19 @@
AT91_PIOA 23 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA23 periph C ISI_D7, conflicts with LCDDAT23, PWML1 */
AT91_PIOC 30 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC30 periph C ISI_PCK, conflicts with UTXD0 */
AT91_PIOA 31 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA31 periph C ISI_HSYNC, conflicts with TWCK0, UTXD1 */
AT91_PIOA 30 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA30 periph C ISI_VSYNC, conflicts with TWD0, URXD1 */
AT91_PIOC 29 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC29 periph C ISI_PD8, conflicts with URXD0, PWMFI2 */
AT91_PIOA 30 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PA30 periph C ISI_VSYNC, conflicts with TWD0, URXD1 */
};
pinctrl_isi_data_8_9: isi-0-data-8-9 {
atmel,pins =
<AT91_PIOC 29 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC29 periph C ISI_PD8, conflicts with URXD0, PWMFI2 */
AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C ISI_PD9, conflicts with SPI1_NPCS3, PWMFI0 */
};
pinctrl_isi_pck_as_mck: isi_pck_as_mck-0 {
pinctrl_isi_data_10_11: isi-0-data-10-11 {
atmel,pins =
<AT91_PIOD 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD31 periph B ISI_MCK */
<AT91_PIOC 27 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC27 periph C ISI_PD10, conflicts with SPI1_NPCS2, TWCK1 */
AT91_PIOC 26 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC26 periph C ISI_PD11, conflicts with SPI1_NPCS1, TWD1 */
};
};
+1
View File
@@ -122,6 +122,7 @@
d2 {
label = "d2";
gpios = <&pioE 25 GPIO_ACTIVE_LOW>; /* PE25, conflicts with A25, RXD2 */
linux,default-trigger = "heartbeat";
};
};
};
+36 -4
View File
@@ -52,6 +52,29 @@
};
};
i2c1: i2c@f0018000 {
ov2640: camera@0x30 {
compatible = "ovti,ov2640";
reg = <0x30>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pck1_as_isi_mck &pinctrl_sensor_power &pinctrl_sensor_reset>;
resetb-gpios = <&pioE 24 GPIO_ACTIVE_LOW>;
pwdn-gpios = <&pioE 29 GPIO_ACTIVE_HIGH>;
/* use pck1 for the master clock of ov2640 */
clocks = <&pck1>;
clock-names = "xvclk";
assigned-clocks = <&pck1>;
assigned-clock-rates = <25000000>;
port {
ov2640_0: endpoint {
remote-endpoint = <&isi_0>;
bus-width = <8>;
};
};
};
};
usart1: serial@f0020000 {
dmas = <0>, <0>; /* Do not use DMA for usart1 */
pinctrl-names = "default";
@@ -60,8 +83,12 @@
};
isi: isi@f0034000 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_isi &pinctrl_isi_pck_as_mck &pinctrl_isi_power &pinctrl_isi_reset>;
port {
isi_0: endpoint {
remote-endpoint = <&ov2640_0>;
bus-width = <8>;
};
};
};
mmc1: mmc@f8000000 {
@@ -117,12 +144,17 @@
<AT91_PIOD 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD30 periph B */
};
pinctrl_isi_reset: isi_reset-0 {
pinctrl_pck1_as_isi_mck: pck1_as_isi_mck-0 {
atmel,pins =
<AT91_PIOD 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD31 periph B ISI_MCK */
};
pinctrl_sensor_reset: sensor_reset-0 {
atmel,pins =
<AT91_PIOE 24 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; /* PE24 gpio */
};
pinctrl_isi_power: isi_power-0 {
pinctrl_sensor_power: sensor_power-0 {
atmel,pins =
<AT91_PIOE 29 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; /* PE29 gpio */
};
+10
View File
@@ -103,6 +103,11 @@
};
};
ns_sram: sram@00210000 {
compatible = "mmio-sram";
reg = <0x00210000 0x10000>;
};
ahb {
compatible = "simple-bus";
#address-cells = <1>;
@@ -870,6 +875,11 @@
status = "disabled";
};
sfr: sfr@f8028000 {
compatible = "atmel,sama5d4-sfr", "syscon";
reg = <0xf8028000 0x60>;
};
mmc1: mmc@fc000000 {
compatible = "atmel,hsmci";
reg = <0xfc000000 0x600>;

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