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Merge branch 'master' of /pub/scm/linux/kernel/git/torvalds/linux-2.6
This commit is contained in:
Steve French
+7
-6
@@ -1963,11 +1963,6 @@ M: adaplas@gmail.com
|
||||
L: linux-fbdev-devel@lists.sourceforge.net (subscribers-only)
|
||||
S: Maintained
|
||||
|
||||
INTEL APIC/IOAPIC, LOWLEVEL X86 SMP SUPPORT
|
||||
P: Ingo Molnar
|
||||
M: mingo@redhat.com
|
||||
S: Maintained
|
||||
|
||||
INTEL I8XX RANDOM NUMBER GENERATOR SUPPORT
|
||||
P: Jeff Garzik
|
||||
M: jgarzik@pobox.com
|
||||
@@ -4269,9 +4264,15 @@ M: jacmet@sunsite.dk
|
||||
L: linux-serial@vger.kernel.org
|
||||
S: Maintained
|
||||
|
||||
X86 3-LEVEL PAGING (PAE) SUPPORT
|
||||
X86 ARCHITECTURE (32-BIT AND 64-BIT)
|
||||
P: Thomas Gleixner
|
||||
M: tglx@linutronix.de
|
||||
P: Ingo Molnar
|
||||
M: mingo@redhat.com
|
||||
P: H. Peter Anvin
|
||||
M: hpa@zytor.com
|
||||
L: linux-kernel@vger.kernel.org
|
||||
T: git://git.kernel.org/pub/scm/linux/kernel/git/x86/linux-2.6-x86.git
|
||||
S: Maintained
|
||||
|
||||
YAM DRIVER FOR AX.25
|
||||
|
||||
@@ -1505,7 +1505,7 @@ quiet_cmd_rmfiles = $(if $(wildcard $(rm-files)),CLEAN $(wildcard $(rm-files))
|
||||
# and we build for the host arch
|
||||
quiet_cmd_depmod = DEPMOD $(KERNELRELEASE)
|
||||
cmd_depmod = \
|
||||
if [ -r System.map -a -x $(DEPMOD) -a "$(SUBARCH)" == "$(ARCH)" ]; then \
|
||||
if [ -r System.map -a -x $(DEPMOD) -a "$(SUBARCH)" = "$(ARCH)" ]; then \
|
||||
$(DEPMOD) -ae -F System.map \
|
||||
$(if $(strip $(INSTALL_MOD_PATH)), -b $(INSTALL_MOD_PATH) -r) \
|
||||
$(KERNELRELEASE); \
|
||||
|
||||
+55
-6
@@ -71,7 +71,7 @@ config GENERIC_CALIBRATE_DELAY
|
||||
|
||||
config IRQCHIP_DEMUX_GPIO
|
||||
bool
|
||||
depends on (BF53x || BF561 || BF54x)
|
||||
depends on (BF52x || BF53x || BF561 || BF54x)
|
||||
default y
|
||||
|
||||
source "init/Kconfig"
|
||||
@@ -85,6 +85,21 @@ choice
|
||||
prompt "CPU"
|
||||
default BF533
|
||||
|
||||
config BF522
|
||||
bool "BF522"
|
||||
help
|
||||
BF522 Processor Support.
|
||||
|
||||
config BF525
|
||||
bool "BF525"
|
||||
help
|
||||
BF525 Processor Support.
|
||||
|
||||
config BF527
|
||||
bool "BF527"
|
||||
help
|
||||
BF527 Processor Support.
|
||||
|
||||
config BF531
|
||||
bool "BF531"
|
||||
help
|
||||
@@ -144,13 +159,18 @@ endchoice
|
||||
|
||||
choice
|
||||
prompt "Silicon Rev"
|
||||
default BF_REV_0_1 if BF527
|
||||
default BF_REV_0_2 if BF537
|
||||
default BF_REV_0_3 if BF533
|
||||
default BF_REV_0_0 if BF549
|
||||
|
||||
config BF_REV_0_0
|
||||
bool "0.0"
|
||||
depends on (BF549)
|
||||
depends on (BF549 || BF527)
|
||||
|
||||
config BF_REV_0_1
|
||||
bool "0.2"
|
||||
depends on (BF549 || BF527)
|
||||
|
||||
config BF_REV_0_2
|
||||
bool "0.2"
|
||||
@@ -176,6 +196,11 @@ config BF_REV_NONE
|
||||
|
||||
endchoice
|
||||
|
||||
config BF52x
|
||||
bool
|
||||
depends on (BF522 || BF525 || BF527)
|
||||
default y
|
||||
|
||||
config BF53x
|
||||
bool
|
||||
depends on (BF531 || BF532 || BF533 || BF534 || BF536 || BF537)
|
||||
@@ -204,6 +229,12 @@ choice
|
||||
configuration to ensure that all the other settings are
|
||||
correct.
|
||||
|
||||
config BFIN527_EZKIT
|
||||
bool "BF527-EZKIT"
|
||||
depends on (BF522 || BF525 || BF527)
|
||||
help
|
||||
BF533-EZKIT-LITE board Support.
|
||||
|
||||
config BFIN533_EZKIT
|
||||
bool "BF533-EZKIT"
|
||||
depends on (BF533 || BF532 || BF531)
|
||||
@@ -299,11 +330,17 @@ config MEM_MT48LC8M32B2B5_7
|
||||
depends on (BFIN561_BLUETECHNIX_CM)
|
||||
default y
|
||||
|
||||
config MEM_MT48LC32M16A2TG_75
|
||||
bool
|
||||
depends on (BFIN527_EZKIT)
|
||||
default y
|
||||
|
||||
config BFIN_SHARED_FLASH_ENET
|
||||
bool
|
||||
depends on (BFIN533_STAMP)
|
||||
default y
|
||||
|
||||
source "arch/blackfin/mach-bf527/Kconfig"
|
||||
source "arch/blackfin/mach-bf533/Kconfig"
|
||||
source "arch/blackfin/mach-bf561/Kconfig"
|
||||
source "arch/blackfin/mach-bf537/Kconfig"
|
||||
@@ -329,7 +366,7 @@ config CLKIN_HZ
|
||||
int "Crystal Frequency in Hz"
|
||||
default "11059200" if BFIN533_STAMP
|
||||
default "27000000" if BFIN533_EZKIT
|
||||
default "25000000" if BFIN537_STAMP
|
||||
default "25000000" if (BFIN537_STAMP || BFIN527_EZKIT)
|
||||
default "30000000" if BFIN561_EZKIT
|
||||
default "24576000" if PNAV10
|
||||
help
|
||||
@@ -362,7 +399,7 @@ config VCO_MULT
|
||||
range 1 64
|
||||
default "22" if BFIN533_EZKIT
|
||||
default "45" if BFIN533_STAMP
|
||||
default "20" if BFIN537_STAMP
|
||||
default "20" if (BFIN537_STAMP || BFIN527_EZKIT)
|
||||
default "22" if BFIN533_BLUETECHNIX_CM
|
||||
default "20" if BFIN537_BLUETECHNIX_CM
|
||||
default "20" if BFIN561_BLUETECHNIX_CM
|
||||
@@ -398,7 +435,7 @@ config SCLK_DIV
|
||||
range 1 15
|
||||
default 5 if BFIN533_EZKIT
|
||||
default 5 if BFIN533_STAMP
|
||||
default 4 if BFIN537_STAMP
|
||||
default 4 if (BFIN537_STAMP || BFIN527_EZKIT)
|
||||
default 5 if BFIN533_BLUETECHNIX_CM
|
||||
default 4 if BFIN537_BLUETECHNIX_CM
|
||||
default 4 if BFIN561_BLUETECHNIX_CM
|
||||
@@ -450,6 +487,7 @@ comment "Memory Setup"
|
||||
config MEM_SIZE
|
||||
int "SDRAM Memory Size in MBytes"
|
||||
default 32 if BFIN533_EZKIT
|
||||
default 64 if BFIN527_EZKIT
|
||||
default 64 if BFIN537_STAMP
|
||||
default 64 if BFIN561_EZKIT
|
||||
default 128 if BFIN533_STAMP
|
||||
@@ -459,6 +497,7 @@ config MEM_ADD_WIDTH
|
||||
int "SDRAM Memory Address Width"
|
||||
default 9 if BFIN533_EZKIT
|
||||
default 9 if BFIN561_EZKIT
|
||||
default 10 if BFIN527_EZKIT
|
||||
default 10 if BFIN537_STAMP
|
||||
default 11 if BFIN533_STAMP
|
||||
default 10 if PNAV10
|
||||
@@ -749,9 +788,19 @@ config LARGE_ALLOCS
|
||||
a lot of RAM, and you need to able to allocate very large
|
||||
contiguous chunks. If unsure, say N.
|
||||
|
||||
config BFIN_GPTIMERS
|
||||
tristate "Enable Blackfin General Purpose Timers API"
|
||||
default n
|
||||
help
|
||||
Enable support for the General Purpose Timers API. If you
|
||||
are unsure, say N.
|
||||
|
||||
To compile this driver as a module, choose M here: the module
|
||||
will be called gptimers.ko.
|
||||
|
||||
config BFIN_DMA_5XX
|
||||
bool "Enable DMA Support"
|
||||
depends on (BF533 || BF532 || BF531 || BF537 || BF536 || BF534 || BF561 || BF54x)
|
||||
depends on (BF52x || BF53x || BF561 || BF54x)
|
||||
default y
|
||||
help
|
||||
DMA driver for BF5xx.
|
||||
|
||||
+21
-2
@@ -12,12 +12,17 @@ LDFLAGS_vmlinux := -X
|
||||
OBJCOPYFLAGS := -O binary -R .note -R .comment -S
|
||||
GZFLAGS := -9
|
||||
|
||||
CFLAGS += $(call cc-option,-mno-fdpic)
|
||||
AFLAGS += $(call cc-option,-mno-fdpic)
|
||||
CFLAGS_MODULE += -mlong-calls
|
||||
KALLSYMS += --symbol-prefix=_
|
||||
|
||||
KBUILD_DEFCONFIG := BF537-STAMP_defconfig
|
||||
|
||||
# setup the machine name and the machine dependent settings
|
||||
machine-$(CONFIG_BF522) := bf527
|
||||
machine-$(CONFIG_BF525) := bf527
|
||||
machine-$(CONFIG_BF527) := bf527
|
||||
machine-$(CONFIG_BF531) := bf533
|
||||
machine-$(CONFIG_BF532) := bf533
|
||||
machine-$(CONFIG_BF533) := bf533
|
||||
@@ -32,6 +37,9 @@ machine-$(CONFIG_BF561) := bf561
|
||||
MACHINE := $(machine-y)
|
||||
export MACHINE
|
||||
|
||||
cpu-$(CONFIG_BF522) := bf522
|
||||
cpu-$(CONFIG_BF525) := bf525
|
||||
cpu-$(CONFIG_BF527) := bf527
|
||||
cpu-$(CONFIG_BF531) := bf531
|
||||
cpu-$(CONFIG_BF532) := bf532
|
||||
cpu-$(CONFIG_BF533) := bf533
|
||||
@@ -97,12 +105,23 @@ archclean:
|
||||
$(Q)$(MAKE) $(clean)=$(boot)
|
||||
|
||||
|
||||
all: vmImage
|
||||
boot := arch/$(ARCH)/boot
|
||||
BOOT_TARGETS = vmImage
|
||||
.PHONY: $(BOOT_TARGETS)
|
||||
PHONY += $(BOOT_TARGETS) install
|
||||
KBUILD_IMAGE := $(boot)/vmImage
|
||||
|
||||
all: vmImage
|
||||
|
||||
$(BOOT_TARGETS): vmlinux
|
||||
$(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
|
||||
|
||||
install:
|
||||
$(Q)$(MAKE) $(build)=$(boot) BOOTIMAGE=$(KBUILD_IMAGE) install
|
||||
|
||||
define archhelp
|
||||
echo '* vmImage - Kernel-only image for U-Boot (arch/$(ARCH)/boot/vmImage)'
|
||||
echo ' install - Install kernel using'
|
||||
echo ' (your) ~/bin/$(CROSS_COMPILE)installkernel or'
|
||||
echo ' (distribution) PATH: $(CROSS_COMPILE)installkernel or'
|
||||
echo ' install to $$(INSTALL_PATH)'
|
||||
endef
|
||||
|
||||
@@ -26,3 +26,6 @@ $(obj)/vmlinux.gz: $(obj)/vmlinux.bin FORCE
|
||||
$(obj)/vmImage: $(obj)/vmlinux.gz
|
||||
$(call if_changed,uimage)
|
||||
@echo 'Kernel: $@ is ready'
|
||||
|
||||
install:
|
||||
sh $(srctree)/$(src)/install.sh $(KERNELRELEASE) $(BOOTIMAGE) System.map "$(INSTALL_PATH)"
|
||||
|
||||
@@ -0,0 +1,57 @@
|
||||
#!/bin/sh
|
||||
#
|
||||
# arch/blackfin/boot/install.sh
|
||||
#
|
||||
# This file is subject to the terms and conditions of the GNU General Public
|
||||
# License. See the file "COPYING" in the main directory of this archive
|
||||
# for more details.
|
||||
#
|
||||
# Copyright (C) 1995 by Linus Torvalds
|
||||
#
|
||||
# Adapted from code in arch/i386/boot/Makefile by H. Peter Anvin
|
||||
# Adapted from code in arch/i386/boot/install.sh by Mike Frysinger
|
||||
#
|
||||
# "make install" script for Blackfin architecture
|
||||
#
|
||||
# Arguments:
|
||||
# $1 - kernel version
|
||||
# $2 - kernel image file
|
||||
# $3 - kernel map file
|
||||
# $4 - default install path (blank if root directory)
|
||||
#
|
||||
|
||||
verify () {
|
||||
if [ ! -f "$1" ]; then
|
||||
echo "" 1>&2
|
||||
echo " *** Missing file: $1" 1>&2
|
||||
echo ' *** You need to run "make" before "make install".' 1>&2
|
||||
echo "" 1>&2
|
||||
exit 1
|
||||
fi
|
||||
}
|
||||
|
||||
# Make sure the files actually exist
|
||||
verify "$2"
|
||||
verify "$3"
|
||||
|
||||
# User may have a custom install script
|
||||
|
||||
if [ -x ~/bin/${CROSS_COMPILE}installkernel ]; then exec ~/bin/${CROSS_COMPILE}installkernel "$@"; fi
|
||||
if which ${CROSS_COMPILE}installkernel >/dev/null 2>&1; then
|
||||
exec ${CROSS_COMPILE}installkernel "$@"
|
||||
fi
|
||||
|
||||
# Default install - same as make zlilo
|
||||
|
||||
back_it_up() {
|
||||
local file=$1
|
||||
[ -f ${file} ] || return 0
|
||||
local stamp=$(stat -c %Y ${file} 2>/dev/null)
|
||||
mv ${file} ${file}.${stamp:-old}
|
||||
}
|
||||
|
||||
back_it_up $4/uImage
|
||||
back_it_up $4/System.map
|
||||
|
||||
cat $2 > $4/uImage
|
||||
cp $3 $4/System.map
|
||||
File diff suppressed because it is too large
Load Diff
@@ -809,7 +809,14 @@ CONFIG_UNIX98_PTYS=y
|
||||
# IPMI
|
||||
#
|
||||
# CONFIG_IPMI_HANDLER is not set
|
||||
# CONFIG_WATCHDOG is not set
|
||||
CONFIG_WATCHDOG=y
|
||||
# CONFIG_WATCHDOG_NOWAYOUT is not set
|
||||
|
||||
#
|
||||
# Watchdog Device Drivers
|
||||
#
|
||||
# CONFIG_SOFT_WATCHDOG is not set
|
||||
CONFIG_BFIN_WDT=y
|
||||
CONFIG_HW_RANDOM=y
|
||||
# CONFIG_GEN_RTC is not set
|
||||
# CONFIG_R3964 is not set
|
||||
|
||||
@@ -9,6 +9,7 @@ obj-y := \
|
||||
sys_bfin.o time.o traps.o irqchip.o dma-mapping.o flat.o \
|
||||
fixed_code.o cplbinit.o cacheinit.o reboot.o bfin_gpio.o
|
||||
|
||||
obj-$(CONFIG_BFIN_GPTIMERS) += gptimers.o
|
||||
obj-$(CONFIG_MODULES) += module.o
|
||||
obj-$(CONFIG_BFIN_DMA_5XX) += bfin_dma_5xx.o
|
||||
obj-$(CONFIG_DUAL_CORE_TEST_MODULE) += dualcore_test.o
|
||||
|
||||
@@ -420,6 +420,32 @@ unsigned short get_dma_curr_ycount(unsigned int channel)
|
||||
}
|
||||
EXPORT_SYMBOL(get_dma_curr_ycount);
|
||||
|
||||
unsigned long get_dma_next_desc_ptr(unsigned int channel)
|
||||
{
|
||||
BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE
|
||||
&& channel < MAX_BLACKFIN_DMA_CHANNEL));
|
||||
|
||||
return dma_ch[channel].regs->next_desc_ptr;
|
||||
}
|
||||
EXPORT_SYMBOL(get_dma_next_desc_ptr);
|
||||
|
||||
unsigned long get_dma_curr_desc_ptr(unsigned int channel)
|
||||
{
|
||||
BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE
|
||||
&& channel < MAX_BLACKFIN_DMA_CHANNEL));
|
||||
|
||||
return dma_ch[channel].regs->curr_desc_ptr;
|
||||
}
|
||||
|
||||
unsigned long get_dma_curr_addr(unsigned int channel)
|
||||
{
|
||||
BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE
|
||||
&& channel < MAX_BLACKFIN_DMA_CHANNEL));
|
||||
|
||||
return dma_ch[channel].regs->curr_addr_ptr;
|
||||
}
|
||||
EXPORT_SYMBOL(get_dma_curr_addr);
|
||||
|
||||
static void *__dma_memcpy(void *dest, const void *src, size_t size)
|
||||
{
|
||||
int direction; /* 1 - address decrease, 0 - address increase */
|
||||
|
||||
@@ -124,7 +124,7 @@ static struct gpio_port_t *gpio_bankb[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef BF537_FAMILY
|
||||
#if defined(BF527_FAMILY) || defined(BF537_FAMILY)
|
||||
static struct gpio_port_t *gpio_bankb[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
|
||||
(struct gpio_port_t *) PORTFIO,
|
||||
(struct gpio_port_t *) PORTGIO,
|
||||
@@ -139,6 +139,21 @@ static unsigned short *port_fer[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef BF527_FAMILY
|
||||
static unsigned short *port_mux[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
|
||||
(unsigned short *) PORTF_MUX,
|
||||
(unsigned short *) PORTG_MUX,
|
||||
(unsigned short *) PORTH_MUX,
|
||||
};
|
||||
|
||||
static const
|
||||
u8 pmux_offset[][16] =
|
||||
{{ 0, 0, 0, 0, 0, 0, 0, 0, 2, 2, 4, 6, 8, 8, 10, 10 }, /* PORTF */
|
||||
{ 0, 0, 0, 0, 0, 2, 2, 4, 4, 6, 8, 10, 10, 10, 12, 12 }, /* PORTG */
|
||||
{ 0, 0, 0, 0, 0, 0, 0, 0, 2, 4, 4, 4, 4, 4, 4, 4 }, /* PORTH */
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef BF561_FAMILY
|
||||
static struct gpio_port_t *gpio_bankb[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
|
||||
(struct gpio_port_t *) FIO0_FLAG_D,
|
||||
@@ -186,6 +201,10 @@ static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PROG_INTB
|
||||
static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PROG_INTB, IRQ_PORTG_INTB, IRQ_MAC_TX};
|
||||
#endif
|
||||
|
||||
#ifdef BF527_FAMILY
|
||||
static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PORTF_INTB, IRQ_PORTG_INTB, IRQ_PORTH_INTB};
|
||||
#endif
|
||||
|
||||
#ifdef BF561_FAMILY
|
||||
static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PROG0_INTB, IRQ_PROG1_INTB, IRQ_PROG2_INTB};
|
||||
#endif
|
||||
@@ -238,7 +257,7 @@ static int cmp_label(unsigned short ident, const char *label)
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
#ifdef BF537_FAMILY
|
||||
#if defined(BF527_FAMILY) || defined(BF537_FAMILY)
|
||||
static void port_setup(unsigned short gpio, unsigned short usage)
|
||||
{
|
||||
if (!check_gpio(gpio)) {
|
||||
@@ -354,6 +373,18 @@ inline u16 get_portmux(unsigned short portno)
|
||||
|
||||
return (pmux >> (2 * gpio_sub_n(portno)) & 0x3);
|
||||
}
|
||||
#elif defined(BF527_FAMILY)
|
||||
inline void portmux_setup(unsigned short portno, unsigned short function)
|
||||
{
|
||||
u16 pmux, ident = P_IDENT(portno);
|
||||
u8 offset = pmux_offset[gpio_bank(ident)][gpio_sub_n(ident)];
|
||||
|
||||
pmux = *port_mux[gpio_bank(ident)];
|
||||
pmux &= ~(3 << offset);
|
||||
pmux |= (function & 3) << offset;
|
||||
*port_mux[gpio_bank(ident)] = pmux;
|
||||
SSYNC();
|
||||
}
|
||||
#else
|
||||
# define portmux_setup(...) do { } while (0)
|
||||
#endif
|
||||
|
||||
@@ -0,0 +1,250 @@
|
||||
/*
|
||||
* bfin_gptimers.c - derived from bf53x_timers.c
|
||||
* Driver for General Purpose Timer functions on the Blackfin processor
|
||||
*
|
||||
* Copyright (C) 2005 John DeHority
|
||||
* Copyright (C) 2006 Hella Aglaia GmbH (awe@aglaia-gmbh.de)
|
||||
*
|
||||
* Licensed under the GPLv2.
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/module.h>
|
||||
|
||||
#include <asm/io.h>
|
||||
#include <asm/blackfin.h>
|
||||
#include <asm/gptimers.h>
|
||||
|
||||
#ifdef DEBUG
|
||||
# define tassert(expr)
|
||||
#else
|
||||
# define tassert(expr) \
|
||||
if (!(expr)) \
|
||||
printk(KERN_DEBUG "%s:%s:%i: Assertion failed: " #expr "\n", \
|
||||
__FILE__, __func__, __LINE__);
|
||||
#endif
|
||||
|
||||
#define BFIN_TIMER_NUM_GROUP (BFIN_TIMER_OCTET(MAX_BLACKFIN_GPTIMERS - 1) + 1)
|
||||
|
||||
typedef struct {
|
||||
uint16_t config;
|
||||
uint16_t __pad;
|
||||
uint32_t counter;
|
||||
uint32_t period;
|
||||
uint32_t width;
|
||||
} GPTIMER_timer_regs;
|
||||
|
||||
typedef struct {
|
||||
uint16_t enable;
|
||||
uint16_t __pad0;
|
||||
uint16_t disable;
|
||||
uint16_t __pad1;
|
||||
uint32_t status;
|
||||
} GPTIMER_group_regs;
|
||||
|
||||
static volatile GPTIMER_timer_regs *const timer_regs[MAX_BLACKFIN_GPTIMERS] =
|
||||
{
|
||||
(GPTIMER_timer_regs *)TIMER0_CONFIG,
|
||||
(GPTIMER_timer_regs *)TIMER1_CONFIG,
|
||||
(GPTIMER_timer_regs *)TIMER2_CONFIG,
|
||||
#if (MAX_BLACKFIN_GPTIMERS > 3)
|
||||
(GPTIMER_timer_regs *)TIMER3_CONFIG,
|
||||
(GPTIMER_timer_regs *)TIMER4_CONFIG,
|
||||
(GPTIMER_timer_regs *)TIMER5_CONFIG,
|
||||
(GPTIMER_timer_regs *)TIMER6_CONFIG,
|
||||
(GPTIMER_timer_regs *)TIMER7_CONFIG,
|
||||
#endif
|
||||
#if (MAX_BLACKFIN_GPTIMERS > 8)
|
||||
(GPTIMER_timer_regs *)TIMER8_CONFIG,
|
||||
(GPTIMER_timer_regs *)TIMER9_CONFIG,
|
||||
(GPTIMER_timer_regs *)TIMER10_CONFIG,
|
||||
(GPTIMER_timer_regs *)TIMER11_CONFIG,
|
||||
#endif
|
||||
};
|
||||
|
||||
static volatile GPTIMER_group_regs *const group_regs[BFIN_TIMER_NUM_GROUP] =
|
||||
{
|
||||
(GPTIMER_group_regs *)TIMER0_GROUP_REG,
|
||||
#if (MAX_BLACKFIN_GPTIMERS > 8)
|
||||
(GPTIMER_group_regs *)TIMER8_GROUP_REG,
|
||||
#endif
|
||||
};
|
||||
|
||||
static uint32_t const dis_mask[MAX_BLACKFIN_GPTIMERS] =
|
||||
{
|
||||
TIMER_STATUS_TRUN0,
|
||||
TIMER_STATUS_TRUN1,
|
||||
TIMER_STATUS_TRUN2,
|
||||
#if (MAX_BLACKFIN_GPTIMERS > 3)
|
||||
TIMER_STATUS_TRUN3,
|
||||
TIMER_STATUS_TRUN4,
|
||||
TIMER_STATUS_TRUN5,
|
||||
TIMER_STATUS_TRUN6,
|
||||
TIMER_STATUS_TRUN7,
|
||||
#endif
|
||||
#if (MAX_BLACKFIN_GPTIMERS > 8)
|
||||
TIMER_STATUS_TRUN8,
|
||||
TIMER_STATUS_TRUN9,
|
||||
TIMER_STATUS_TRUN10,
|
||||
TIMER_STATUS_TRUN11,
|
||||
#endif
|
||||
};
|
||||
|
||||
static uint32_t const irq_mask[MAX_BLACKFIN_GPTIMERS] =
|
||||
{
|
||||
TIMER_STATUS_TIMIL0,
|
||||
TIMER_STATUS_TIMIL1,
|
||||
TIMER_STATUS_TIMIL2,
|
||||
#if (MAX_BLACKFIN_GPTIMERS > 3)
|
||||
TIMER_STATUS_TIMIL3,
|
||||
TIMER_STATUS_TIMIL4,
|
||||
TIMER_STATUS_TIMIL5,
|
||||
TIMER_STATUS_TIMIL6,
|
||||
TIMER_STATUS_TIMIL7,
|
||||
#endif
|
||||
#if (MAX_BLACKFIN_GPTIMERS > 8)
|
||||
TIMER_STATUS_TIMIL8,
|
||||
TIMER_STATUS_TIMIL9,
|
||||
TIMER_STATUS_TIMIL10,
|
||||
TIMER_STATUS_TIMIL11,
|
||||
#endif
|
||||
};
|
||||
|
||||
void set_gptimer_pwidth(int timer_id, uint32_t value)
|
||||
{
|
||||
tassert(timer_id < MAX_BLACKFIN_GPTIMERS);
|
||||
timer_regs[timer_id]->width = value;
|
||||
SSYNC();
|
||||
}
|
||||
EXPORT_SYMBOL(set_gptimer_pwidth);
|
||||
|
||||
uint32_t get_gptimer_pwidth(int timer_id)
|
||||
{
|
||||
tassert(timer_id < MAX_BLACKFIN_GPTIMERS);
|
||||
return timer_regs[timer_id]->width;
|
||||
}
|
||||
EXPORT_SYMBOL(get_gptimer_pwidth);
|
||||
|
||||
void set_gptimer_period(int timer_id, uint32_t period)
|
||||
{
|
||||
tassert(timer_id < MAX_BLACKFIN_GPTIMERS);
|
||||
timer_regs[timer_id]->period = period;
|
||||
SSYNC();
|
||||
}
|
||||
EXPORT_SYMBOL(set_gptimer_period);
|
||||
|
||||
uint32_t get_gptimer_period(int timer_id)
|
||||
{
|
||||
tassert(timer_id < MAX_BLACKFIN_GPTIMERS);
|
||||
return timer_regs[timer_id]->period;
|
||||
}
|
||||
EXPORT_SYMBOL(get_gptimer_period);
|
||||
|
||||
uint32_t get_gptimer_count(int timer_id)
|
||||
{
|
||||
tassert(timer_id < MAX_BLACKFIN_GPTIMERS);
|
||||
return timer_regs[timer_id]->counter;
|
||||
}
|
||||
EXPORT_SYMBOL(get_gptimer_count);
|
||||
|
||||
uint32_t get_gptimer_status(int group)
|
||||
{
|
||||
tassert(group < BFIN_TIMER_NUM_GROUP);
|
||||
return group_regs[group]->status;
|
||||
}
|
||||
EXPORT_SYMBOL(get_gptimer_status);
|
||||
|
||||
void set_gptimer_status(int group, uint32_t value)
|
||||
{
|
||||
tassert(group < BFIN_TIMER_NUM_GROUP);
|
||||
group_regs[group]->status = value;
|
||||
SSYNC();
|
||||
}
|
||||
EXPORT_SYMBOL(set_gptimer_status);
|
||||
|
||||
uint16_t get_gptimer_intr(int timer_id)
|
||||
{
|
||||
tassert(timer_id < MAX_BLACKFIN_GPTIMERS);
|
||||
return (group_regs[BFIN_TIMER_OCTET(timer_id)]->status & irq_mask[timer_id]) ? 1 : 0;
|
||||
}
|
||||
EXPORT_SYMBOL(get_gptimer_intr);
|
||||
|
||||
void clear_gptimer_intr(int timer_id)
|
||||
{
|
||||
tassert(timer_id < MAX_BLACKFIN_GPTIMERS);
|
||||
group_regs[BFIN_TIMER_OCTET(timer_id)]->status = irq_mask[timer_id];
|
||||
}
|
||||
EXPORT_SYMBOL(clear_gptimer_intr);
|
||||
|
||||
void set_gptimer_config(int timer_id, uint16_t config)
|
||||
{
|
||||
tassert(timer_id < MAX_BLACKFIN_GPTIMERS);
|
||||
timer_regs[timer_id]->config = config;
|
||||
SSYNC();
|
||||
}
|
||||
EXPORT_SYMBOL(set_gptimer_config);
|
||||
|
||||
uint16_t get_gptimer_config(int timer_id)
|
||||
{
|
||||
tassert(timer_id < MAX_BLACKFIN_GPTIMERS);
|
||||
return timer_regs[timer_id]->config;
|
||||
}
|
||||
EXPORT_SYMBOL(get_gptimer_config);
|
||||
|
||||
void enable_gptimers(uint16_t mask)
|
||||
{
|
||||
int i;
|
||||
tassert((mask & ~BLACKFIN_GPTIMER_IDMASK) == 0);
|
||||
for (i = 0; i < BFIN_TIMER_NUM_GROUP; ++i) {
|
||||
group_regs[i]->enable = mask & 0xFF;
|
||||
mask >>= 8;
|
||||
}
|
||||
SSYNC();
|
||||
}
|
||||
EXPORT_SYMBOL(enable_gptimers);
|
||||
|
||||
void disable_gptimers(uint16_t mask)
|
||||
{
|
||||
int i;
|
||||
uint16_t m = mask;
|
||||
tassert((mask & ~BLACKFIN_GPTIMER_IDMASK) == 0);
|
||||
for (i = 0; i < BFIN_TIMER_NUM_GROUP; ++i) {
|
||||
group_regs[i]->disable = m & 0xFF;
|
||||
m >>= 8;
|
||||
}
|
||||
for (i = 0; i < MAX_BLACKFIN_GPTIMERS; ++i)
|
||||
if (mask & (1 << i))
|
||||
group_regs[BFIN_TIMER_OCTET(i)]->status |= dis_mask[i];
|
||||
SSYNC();
|
||||
}
|
||||
EXPORT_SYMBOL(disable_gptimers);
|
||||
|
||||
void set_gptimer_pulse_hi(int timer_id)
|
||||
{
|
||||
tassert(timer_id < MAX_BLACKFIN_GPTIMERS);
|
||||
timer_regs[timer_id]->config |= TIMER_PULSE_HI;
|
||||
SSYNC();
|
||||
}
|
||||
EXPORT_SYMBOL(set_gptimer_pulse_hi);
|
||||
|
||||
void clear_gptimer_pulse_hi(int timer_id)
|
||||
{
|
||||
tassert(timer_id < MAX_BLACKFIN_GPTIMERS);
|
||||
timer_regs[timer_id]->config &= ~TIMER_PULSE_HI;
|
||||
SSYNC();
|
||||
}
|
||||
EXPORT_SYMBOL(clear_gptimer_pulse_hi);
|
||||
|
||||
uint16_t get_enabled_gptimers(void)
|
||||
{
|
||||
int i;
|
||||
uint16_t result = 0;
|
||||
for (i = 0; i < BFIN_TIMER_NUM_GROUP; ++i)
|
||||
result |= (group_regs[i]->enable << (i << 3));
|
||||
return result;
|
||||
}
|
||||
EXPORT_SYMBOL(get_enabled_gptimers);
|
||||
|
||||
MODULE_AUTHOR("Axel Weiss (awe@aglaia-gmbh.de)");
|
||||
MODULE_DESCRIPTION("Blackfin General Purpose Timers API");
|
||||
MODULE_LICENSE("GPL");
|
||||
@@ -11,7 +11,7 @@
|
||||
#include <asm/reboot.h>
|
||||
#include <asm/system.h>
|
||||
|
||||
#if defined(BF537_FAMILY) || defined(BF533_FAMILY)
|
||||
#if defined(BF537_FAMILY) || defined(BF533_FAMILY) || defined(BF527_FAMILY)
|
||||
#define SYSCR_VAL 0x0
|
||||
#elif defined(BF561_FAMILY)
|
||||
#define SYSCR_VAL 0x20
|
||||
|
||||
@@ -459,7 +459,7 @@ static u_long get_vco(void)
|
||||
return vco;
|
||||
}
|
||||
|
||||
/*Get the Core clock*/
|
||||
/* Get the Core clock */
|
||||
u_long get_cclk(void)
|
||||
{
|
||||
u_long csel, ssel;
|
||||
@@ -493,12 +493,24 @@ u_long get_sclk(void)
|
||||
}
|
||||
EXPORT_SYMBOL(get_sclk);
|
||||
|
||||
unsigned long sclk_to_usecs(unsigned long sclk)
|
||||
{
|
||||
return (USEC_PER_SEC * (u64)sclk) / get_sclk();
|
||||
}
|
||||
EXPORT_SYMBOL(sclk_to_usecs);
|
||||
|
||||
unsigned long usecs_to_sclk(unsigned long usecs)
|
||||
{
|
||||
return get_sclk() / (USEC_PER_SEC * (u64)usecs);
|
||||
}
|
||||
EXPORT_SYMBOL(usecs_to_sclk);
|
||||
|
||||
/*
|
||||
* Get CPU information for use by the procfs.
|
||||
*/
|
||||
static int show_cpuinfo(struct seq_file *m, void *v)
|
||||
{
|
||||
char *cpu, *mmu, *fpu, *name;
|
||||
char *cpu, *mmu, *fpu, *vendor, *cache;
|
||||
uint32_t revid;
|
||||
|
||||
u_long cclk = 0, sclk = 0;
|
||||
@@ -508,70 +520,83 @@ static int show_cpuinfo(struct seq_file *m, void *v)
|
||||
mmu = "none";
|
||||
fpu = "none";
|
||||
revid = bfin_revid();
|
||||
name = bfin_board_name;
|
||||
|
||||
cclk = get_cclk();
|
||||
sclk = get_sclk();
|
||||
|
||||
seq_printf(m, "CPU:\t\tADSP-%s Rev. 0.%d\n"
|
||||
"MMU:\t\t%s\n"
|
||||
"FPU:\t\t%s\n"
|
||||
"Core Clock:\t%9lu Hz\n"
|
||||
"System Clock:\t%9lu Hz\n"
|
||||
"BogoMips:\t%lu.%02lu\n"
|
||||
"Calibration:\t%lu loops\n",
|
||||
cpu, revid, mmu, fpu,
|
||||
cclk,
|
||||
sclk,
|
||||
(loops_per_jiffy * HZ) / 500000,
|
||||
((loops_per_jiffy * HZ) / 5000) % 100,
|
||||
(loops_per_jiffy * HZ));
|
||||
seq_printf(m, "Board Name:\t%s\n", name);
|
||||
seq_printf(m, "Board Memory:\t%ld MB\n", physical_mem_end >> 20);
|
||||
seq_printf(m, "Kernel Memory:\t%ld MB\n", (unsigned long)_ramend >> 20);
|
||||
if (bfin_read_IMEM_CONTROL() & (ENICPLB | IMC))
|
||||
seq_printf(m, "I-CACHE:\tON\n");
|
||||
else
|
||||
seq_printf(m, "I-CACHE:\tOFF\n");
|
||||
if ((bfin_read_DMEM_CONTROL()) & (ENDCPLB | DMC_ENABLE))
|
||||
seq_printf(m, "D-CACHE:\tON"
|
||||
#if defined CONFIG_BFIN_WB
|
||||
" (write-back)"
|
||||
#elif defined CONFIG_BFIN_WT
|
||||
" (write-through)"
|
||||
#endif
|
||||
"\n");
|
||||
else
|
||||
seq_printf(m, "D-CACHE:\tOFF\n");
|
||||
switch (bfin_read_CHIPID() & CHIPID_MANUFACTURE) {
|
||||
case 0xca:
|
||||
vendor = "Analog Devices";
|
||||
break;
|
||||
default:
|
||||
vendor = "unknown";
|
||||
break;
|
||||
}
|
||||
|
||||
seq_printf(m, "processor\t: %d\n"
|
||||
"vendor_id\t: %s\n"
|
||||
"cpu family\t: 0x%x\n"
|
||||
"model name\t: ADSP-%s %lu(MHz CCLK) %lu(MHz SCLK)\n"
|
||||
"stepping\t: %d\n",
|
||||
0,
|
||||
vendor,
|
||||
(bfin_read_CHIPID() & CHIPID_FAMILY),
|
||||
cpu, cclk/1000000, sclk/1000000,
|
||||
revid);
|
||||
|
||||
seq_printf(m, "cpu MHz\t\t: %lu.%03lu/%lu.%03lu\n",
|
||||
cclk/1000000, cclk%1000000,
|
||||
sclk/1000000, sclk%1000000);
|
||||
seq_printf(m, "bogomips\t: %lu.%02lu\n"
|
||||
"Calibration\t: %lu loops\n",
|
||||
(loops_per_jiffy * HZ) / 500000,
|
||||
((loops_per_jiffy * HZ) / 5000) % 100,
|
||||
(loops_per_jiffy * HZ));
|
||||
|
||||
/* Check Cache configutation */
|
||||
switch (bfin_read_DMEM_CONTROL() & (1 << DMC0_P | 1 << DMC1_P)) {
|
||||
case ACACHE_BSRAM:
|
||||
seq_printf(m, "DBANK-A:\tCACHE\n" "DBANK-B:\tSRAM\n");
|
||||
cache = "dbank-A/B\t: cache/sram";
|
||||
dcache_size = 16;
|
||||
dsup_banks = 1;
|
||||
break;
|
||||
case ACACHE_BCACHE:
|
||||
seq_printf(m, "DBANK-A:\tCACHE\n" "DBANK-B:\tCACHE\n");
|
||||
cache = "dbank-A/B\t: cache/cache";
|
||||
dcache_size = 32;
|
||||
dsup_banks = 2;
|
||||
break;
|
||||
case ASRAM_BSRAM:
|
||||
seq_printf(m, "DBANK-A:\tSRAM\n" "DBANK-B:\tSRAM\n");
|
||||
cache = "dbank-A/B\t: sram/sram";
|
||||
dcache_size = 0;
|
||||
dsup_banks = 0;
|
||||
break;
|
||||
default:
|
||||
cache = "unknown";
|
||||
dcache_size = 0;
|
||||
dsup_banks = 0;
|
||||
break;
|
||||
}
|
||||
|
||||
/* Is it turned on? */
|
||||
if (!((bfin_read_DMEM_CONTROL()) & (ENDCPLB | DMC_ENABLE)))
|
||||
dcache_size = 0;
|
||||
|
||||
seq_printf(m, "I-CACHE Size:\t%dKB\n", BFIN_ICACHESIZE / 1024);
|
||||
seq_printf(m, "D-CACHE Size:\t%dKB\n", dcache_size);
|
||||
seq_printf(m, "I-CACHE Setup:\t%d Sub-banks/%d Ways, %d Lines/Way\n",
|
||||
seq_printf(m, "cache size\t: %d KB(L1 icache) "
|
||||
"%d KB(L1 dcache-%s) %d KB(L2 cache)\n",
|
||||
BFIN_ICACHESIZE / 1024, dcache_size,
|
||||
#if defined CONFIG_BFIN_WB
|
||||
"wb"
|
||||
#elif defined CONFIG_BFIN_WT
|
||||
"wt"
|
||||
#endif
|
||||
, 0);
|
||||
|
||||
seq_printf(m, "%s\n", cache);
|
||||
|
||||
seq_printf(m, "icache setup\t: %d Sub-banks/%d Ways, %d Lines/Way\n",
|
||||
BFIN_ISUBBANKS, BFIN_IWAYS, BFIN_ILINES);
|
||||
seq_printf(m,
|
||||
"D-CACHE Setup:\t%d Super-banks/%d Sub-banks/%d Ways, %d Lines/Way\n",
|
||||
"dcache setup\t: %d Super-banks/%d Sub-banks/%d Ways, %d Lines/Way\n",
|
||||
dsup_banks, BFIN_DSUBBANKS, BFIN_DWAYS,
|
||||
BFIN_DLINES);
|
||||
#ifdef CONFIG_BFIN_ICACHE_LOCK
|
||||
@@ -625,6 +650,15 @@ static int show_cpuinfo(struct seq_file *m, void *v)
|
||||
seq_printf(m, "No Ways are locked\n");
|
||||
}
|
||||
#endif
|
||||
|
||||
seq_printf(m, "board name\t: %s\n", bfin_board_name);
|
||||
seq_printf(m, "board memory\t: %ld kB (0x%p -> 0x%p)\n",
|
||||
physical_mem_end >> 10, (void *)0, (void *)physical_mem_end);
|
||||
seq_printf(m, "kernel memory\t: %d kB (0x%p -> 0x%p)\n",
|
||||
((int)memory_end - (int)_stext) >> 10,
|
||||
_stext,
|
||||
(void *)memory_end);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
@@ -118,12 +118,14 @@ static int printk_address(unsigned long address)
|
||||
offset = (address - vma->vm_start) + (vma->vm_pgoff << PAGE_SHIFT);
|
||||
|
||||
write_unlock_irq(&tasklist_lock);
|
||||
mmput(mm);
|
||||
return printk("<0x%p> [ %s + 0x%lx ]",
|
||||
(void *)address, name, offset);
|
||||
}
|
||||
|
||||
vml = vml->next;
|
||||
}
|
||||
mmput(mm);
|
||||
}
|
||||
write_unlock_irq(&tasklist_lock);
|
||||
|
||||
|
||||
@@ -4,7 +4,7 @@
|
||||
|
||||
lib-y := \
|
||||
ashldi3.o ashrdi3.o lshrdi3.o \
|
||||
muldi3.o divsi3.o udivsi3.o modsi3.o umodsi3.o \
|
||||
muldi3.o divsi3.o udivsi3.o udivdi3.o modsi3.o umodsi3.o \
|
||||
checksum.o memcpy.o memset.o memcmp.o memchr.o memmove.o \
|
||||
strcmp.o strcpy.o strncmp.o strncpy.o \
|
||||
umulsi3_highpart.o smulsi3_highpart.o \
|
||||
|
||||
@@ -0,0 +1,375 @@
|
||||
/*
|
||||
* udivdi3.S - unsigned long long division
|
||||
*
|
||||
* Copyright 2003-2007 Analog Devices Inc.
|
||||
* Enter bugs at http://blackfin.uclinux.org/
|
||||
*
|
||||
* Licensed under the GPLv2 or later.
|
||||
*/
|
||||
|
||||
#include <linux/linkage.h>
|
||||
|
||||
#define CARRY AC0
|
||||
|
||||
#ifdef CONFIG_ARITHMETIC_OPS_L1
|
||||
.section .l1.text
|
||||
#else
|
||||
.text
|
||||
#endif
|
||||
|
||||
|
||||
ENTRY(___udivdi3)
|
||||
R3 = [SP + 12];
|
||||
[--SP] = (R7:4, P5:3);
|
||||
|
||||
/* Attempt to use divide primitive first; these will handle
|
||||
** most cases, and they're quick - avoids stalls incurred by
|
||||
** testing for identities.
|
||||
*/
|
||||
|
||||
R4 = R2 | R3;
|
||||
CC = R4 == 0;
|
||||
IF CC JUMP .LDIV_BY_ZERO;
|
||||
|
||||
R4.H = 0x8000;
|
||||
R4 >>>= 16; // R4 now 0xFFFF8000
|
||||
R5 = R0 | R2; // If either dividend or
|
||||
R4 = R5 & R4; // divisor have bits in
|
||||
CC = R4; // top half or low half's sign
|
||||
IF CC JUMP .LIDENTS; // bit, skip builtins.
|
||||
R4 = R1 | R3; // Also check top halves
|
||||
CC = R4;
|
||||
IF CC JUMP .LIDENTS;
|
||||
|
||||
/* Can use the builtins. */
|
||||
|
||||
AQ = CC; // Clear AQ (CC==0)
|
||||
DIVQ(R0, R2);
|
||||
DIVQ(R0, R2);
|
||||
DIVQ(R0, R2);
|
||||
DIVQ(R0, R2);
|
||||
DIVQ(R0, R2);
|
||||
DIVQ(R0, R2);
|
||||
DIVQ(R0, R2);
|
||||
DIVQ(R0, R2);
|
||||
DIVQ(R0, R2);
|
||||
DIVQ(R0, R2);
|
||||
DIVQ(R0, R2);
|
||||
DIVQ(R0, R2);
|
||||
DIVQ(R0, R2);
|
||||
DIVQ(R0, R2);
|
||||
DIVQ(R0, R2);
|
||||
DIVQ(R0, R2);
|
||||
DIVQ(R0, R2);
|
||||
R0 = R0.L (Z);
|
||||
R1 = 0;
|
||||
(R7:4, P5:3) = [SP++];
|
||||
RTS;
|
||||
|
||||
.LIDENTS:
|
||||
/* Test for common identities. Value to be returned is
|
||||
** placed in R6,R7.
|
||||
*/
|
||||
// Check for 0/y, return 0
|
||||
R4 = R0 | R1;
|
||||
CC = R4 == 0;
|
||||
IF CC JUMP .LRETURN_R0;
|
||||
|
||||
// Check for x/x, return 1
|
||||
R6 = R0 - R2; // If x == y, then both R6 and R7 will be zero
|
||||
R7 = R1 - R3;
|
||||
R4 = R6 | R7; // making R4 zero.
|
||||
R6 += 1; // which would now make R6:R7==1.
|
||||
CC = R4 == 0;
|
||||
IF CC JUMP .LRETURN_IDENT;
|
||||
|
||||
// Check for x/1, return x
|
||||
R6 = R0;
|
||||
R7 = R1;
|
||||
CC = R3 == 0;
|
||||
IF !CC JUMP .Lnexttest;
|
||||
CC = R2 == 1;
|
||||
IF CC JUMP .LRETURN_IDENT;
|
||||
|
||||
.Lnexttest:
|
||||
R4.L = ONES R2; // check for div by power of two which
|
||||
R5.L = ONES R3; // can be done using a shift
|
||||
R6 = PACK (R5.L, R4.L);
|
||||
CC = R6 == 1;
|
||||
IF CC JUMP .Lpower_of_two_upper_zero;
|
||||
R6 = PACK (R4.L, R5.L);
|
||||
CC = R6 == 1;
|
||||
IF CC JUMP .Lpower_of_two_lower_zero;
|
||||
|
||||
// Check for x < y, return 0
|
||||
R6 = 0;
|
||||
R7 = R6;
|
||||
CC = R1 < R3 (IU);
|
||||
IF CC JUMP .LRETURN_IDENT;
|
||||
CC = R1 == R3;
|
||||
IF !CC JUMP .Lno_idents;
|
||||
CC = R0 < R2 (IU);
|
||||
IF CC JUMP .LRETURN_IDENT;
|
||||
|
||||
.Lno_idents: // Idents don't match. Go for the full operation
|
||||
|
||||
|
||||
// If X, or X and Y have high bit set, it'll affect the
|
||||
// results, so shift right one to stop this. Note: we've already
|
||||
// checked that X >= Y, so Y's msb won't be set unless X's
|
||||
// is.
|
||||
|
||||
R4 = 0;
|
||||
CC = R1 < 0;
|
||||
IF !CC JUMP .Lx_msb_clear;
|
||||
CC = !CC; // 1 -> 0;
|
||||
R1 = ROT R1 BY -1; // Shift X >> 1
|
||||
R0 = ROT R0 BY -1; // lsb -> CC
|
||||
BITSET(R4,31); // to record only x msb was set
|
||||
CC = R3 < 0;
|
||||
IF !CC JUMP .Ly_msb_clear;
|
||||
CC = !CC;
|
||||
R3 = ROT R3 BY -1; // Shift Y >> 1
|
||||
R2 = ROT R2 BY -1;
|
||||
BITCLR(R4,31); // clear bit to record only x msb was set
|
||||
|
||||
.Ly_msb_clear:
|
||||
.Lx_msb_clear:
|
||||
// Bit 31 in R4 indicates X msb set, but Y msb wasn't, and no bits
|
||||
// were lost, so we should shift result left by one.
|
||||
|
||||
[--SP] = R4; // save for later
|
||||
|
||||
// In the loop that follows, each iteration we add
|
||||
// either Y' or -Y' to the Remainder. We compute the
|
||||
// negated Y', and store, for convenience. Y' goes
|
||||
// into P0:P1, while -Y' goes into P2:P3.
|
||||
|
||||
P0 = R2;
|
||||
P1 = R3;
|
||||
R2 = -R2;
|
||||
CC = CARRY;
|
||||
CC = !CC;
|
||||
R4 = CC;
|
||||
R3 = -R3;
|
||||
R3 = R3 - R4;
|
||||
|
||||
R6 = 0; // remainder = 0
|
||||
R7 = R6;
|
||||
|
||||
[--SP] = R2; P2 = SP;
|
||||
[--SP] = R3; P3 = SP;
|
||||
[--SP] = R6; P5 = SP; // AQ = 0
|
||||
[--SP] = P1;
|
||||
|
||||
/* In the loop that follows, we use the following
|
||||
** register assignments:
|
||||
** R0,R1 X, workspace
|
||||
** R2,R3 Y, workspace
|
||||
** R4,R5 partial Div
|
||||
** R6,R7 partial remainder
|
||||
** P5 AQ
|
||||
** The remainder and div form a 128-bit number, with
|
||||
** the remainder in the high 64-bits.
|
||||
*/
|
||||
R4 = R0; // Div = X'
|
||||
R5 = R1;
|
||||
R3 = 0;
|
||||
|
||||
P4 = 64; // Iterate once per bit
|
||||
LSETUP(.LULST,.LULEND) LC0 = P4;
|
||||
.LULST:
|
||||
/* Shift Div and remainder up by one. The bit shifted
|
||||
** out of the top of the quotient is shifted into the bottom
|
||||
** of the remainder.
|
||||
*/
|
||||
CC = R3;
|
||||
R4 = ROT R4 BY 1;
|
||||
R5 = ROT R5 BY 1 || // low q to high q
|
||||
R2 = [P5]; // load saved AQ
|
||||
R6 = ROT R6 BY 1 || // high q to low r
|
||||
R0 = [P2]; // load -Y'
|
||||
R7 = ROT R7 BY 1 || // low r to high r
|
||||
R1 = [P3];
|
||||
|
||||
// Assume add -Y'
|
||||
CC = R2 < 0; // But if AQ is set...
|
||||
IF CC R0 = P0; // then add Y' instead
|
||||
IF CC R1 = P1;
|
||||
|
||||
R6 = R6 + R0; // Rem += (Y' or -Y')
|
||||
CC = CARRY;
|
||||
R0 = CC;
|
||||
R7 = R7 + R1;
|
||||
R7 = R7 + R0 (NS) ||
|
||||
R1 = [SP];
|
||||
// Set the next AQ bit
|
||||
R1 = R7 ^ R1; // from Remainder and Y'
|
||||
R1 = R1 >> 31 || // Negate AQ's value, and
|
||||
[P5] = R1; // save next AQ
|
||||
BITTGL(R1, 0); // add neg AQ to the Div
|
||||
.LULEND: R4 = R4 + R1;
|
||||
|
||||
R6 = [SP + 16];
|
||||
|
||||
R0 = R4;
|
||||
R1 = R5;
|
||||
CC = BITTST(R6,30); // Just set CC=0
|
||||
R4 = ROT R0 BY 1; // but if we had to shift X,
|
||||
R5 = ROT R1 BY 1; // and didn't shift any bits out,
|
||||
CC = BITTST(R6,31); // then the result will be half as
|
||||
IF CC R0 = R4; // much as required, so shift left
|
||||
IF CC R1 = R5; // one space.
|
||||
|
||||
SP += 20;
|
||||
(R7:4, P5:3) = [SP++];
|
||||
RTS;
|
||||
|
||||
.Lpower_of_two:
|
||||
/* Y has a single bit set, which means it's a power of two.
|
||||
** That means we can perform the division just by shifting
|
||||
** X to the right the appropriate number of bits
|
||||
*/
|
||||
|
||||
/* signbits returns the number of sign bits, minus one.
|
||||
** 1=>30, 2=>29, ..., 0x40000000=>0. Which means we need
|
||||
** to shift right n-signbits spaces. It also means 0x80000000
|
||||
** is a special case, because that *also* gives a signbits of 0
|
||||
*/
|
||||
.Lpower_of_two_lower_zero:
|
||||
R7 = 0;
|
||||
R6 = R1 >> 31;
|
||||
CC = R3 < 0;
|
||||
IF CC JUMP .LRETURN_IDENT;
|
||||
|
||||
R2.L = SIGNBITS R3;
|
||||
R2 = R2.L (Z);
|
||||
R2 += -62;
|
||||
(R7:4, P5:3) = [SP++];
|
||||
JUMP ___lshftli;
|
||||
|
||||
.Lpower_of_two_upper_zero:
|
||||
CC = R2 < 0;
|
||||
IF CC JUMP .Lmaxint_shift;
|
||||
|
||||
R2.L = SIGNBITS R2;
|
||||
R2 = R2.L (Z);
|
||||
R2 += -30;
|
||||
(R7:4, P5:3) = [SP++];
|
||||
JUMP ___lshftli;
|
||||
|
||||
.Lmaxint_shift:
|
||||
R2 = -31;
|
||||
(R7:4, P5:3) = [SP++];
|
||||
JUMP ___lshftli;
|
||||
|
||||
.LRETURN_IDENT:
|
||||
R0 = R6;
|
||||
R1 = R7;
|
||||
.LRETURN_R0:
|
||||
(R7:4, P5:3) = [SP++];
|
||||
RTS;
|
||||
.LDIV_BY_ZERO:
|
||||
R0 = ~R2;
|
||||
R1 = R0;
|
||||
(R7:4, P5:3) = [SP++];
|
||||
RTS;
|
||||
|
||||
ENDPROC(___udivdi3)
|
||||
|
||||
|
||||
ENTRY(___lshftli)
|
||||
CC = R2 == 0;
|
||||
IF CC JUMP .Lfinished; // nothing to do
|
||||
CC = R2 < 0;
|
||||
IF CC JUMP .Lrshift;
|
||||
R3 = 64;
|
||||
CC = R2 < R3;
|
||||
IF !CC JUMP .Lretzero;
|
||||
|
||||
// We're shifting left, and it's less than 64 bits, so
|
||||
// a valid result will be returned.
|
||||
|
||||
R3 >>= 1; // R3 now 32
|
||||
CC = R2 < R3;
|
||||
|
||||
IF !CC JUMP .Lzerohalf;
|
||||
|
||||
// We're shifting left, between 1 and 31 bits, which means
|
||||
// some of the low half will be shifted into the high half.
|
||||
// Work out how much.
|
||||
|
||||
R3 = R3 - R2;
|
||||
|
||||
// Save that much data from the bottom half.
|
||||
|
||||
P1 = R7;
|
||||
R7 = R0;
|
||||
R7 >>= R3;
|
||||
|
||||
// Adjust both parts of the parameter.
|
||||
|
||||
R0 <<= R2;
|
||||
R1 <<= R2;
|
||||
|
||||
// And include the bits moved across.
|
||||
|
||||
R1 = R1 | R7;
|
||||
R7 = P1;
|
||||
RTS;
|
||||
|
||||
.Lzerohalf:
|
||||
// We're shifting left, between 32 and 63 bits, so the
|
||||
// bottom half will become zero, and the top half will
|
||||
// lose some bits. How many?
|
||||
|
||||
R2 = R2 - R3; // N - 32
|
||||
R1 = LSHIFT R0 BY R2.L;
|
||||
R0 = R0 - R0;
|
||||
RTS;
|
||||
|
||||
.Lretzero:
|
||||
R0 = R0 - R0;
|
||||
R1 = R0;
|
||||
.Lfinished:
|
||||
RTS;
|
||||
|
||||
.Lrshift:
|
||||
// We're shifting right, but by how much?
|
||||
R2 = -R2;
|
||||
R3 = 64;
|
||||
CC = R2 < R3;
|
||||
IF !CC JUMP .Lretzero;
|
||||
|
||||
// Shifting right less than 64 bits, so some result bits will
|
||||
// be retained.
|
||||
|
||||
R3 >>= 1; // R3 now 32
|
||||
CC = R2 < R3;
|
||||
IF !CC JUMP .Lsignhalf;
|
||||
|
||||
// Shifting right between 1 and 31 bits, so need to copy
|
||||
// data across words.
|
||||
|
||||
P1 = R7;
|
||||
R3 = R3 - R2;
|
||||
R7 = R1;
|
||||
R7 <<= R3;
|
||||
R1 >>= R2;
|
||||
R0 >>= R2;
|
||||
R0 = R7 | R0;
|
||||
R7 = P1;
|
||||
RTS;
|
||||
|
||||
.Lsignhalf:
|
||||
// Shifting right between 32 and 63 bits, so the top half
|
||||
// will become all zero-bits, and the bottom half is some
|
||||
// of the top half. But how much?
|
||||
|
||||
R2 = R2 - R3;
|
||||
R0 = R1;
|
||||
R0 >>= R2;
|
||||
R1 = 0;
|
||||
RTS;
|
||||
|
||||
ENDPROC(___lshftli)
|
||||
@@ -0,0 +1,251 @@
|
||||
if (BF52x)
|
||||
|
||||
menu "BF527 Specific Configuration"
|
||||
|
||||
comment "Alternative Multiplexing Scheme"
|
||||
|
||||
choice
|
||||
prompt "SPORT0"
|
||||
default BF527_SPORT0_PORTG
|
||||
help
|
||||
Select PORT used for SPORT0. See Hardware Reference Manual
|
||||
|
||||
config BF527_SPORT0_PORTF
|
||||
bool "PORT F"
|
||||
help
|
||||
PORT F
|
||||
|
||||
config BF527_SPORT0_PORTG
|
||||
bool "PORT G"
|
||||
help
|
||||
PORT G
|
||||
endchoice
|
||||
|
||||
choice
|
||||
prompt "SPORT0 TSCLK Location"
|
||||
depends on BF527_SPORT0_PORTG
|
||||
default BF527_SPORT0_TSCLK_PG10
|
||||
help
|
||||
Select PIN used for SPORT0_TSCLK. See Hardware Reference Manual
|
||||
|
||||
config BF527_SPORT0_TSCLK_PG10
|
||||
bool "PORT PG10"
|
||||
help
|
||||
PORT PG10
|
||||
|
||||
config BF527_SPORT0_TSCLK_PG14
|
||||
bool "PORT PG14"
|
||||
help
|
||||
PORT PG14
|
||||
endchoice
|
||||
|
||||
choice
|
||||
prompt "UART1"
|
||||
default BF527_UART1_PORTG
|
||||
help
|
||||
Select PORT used for UART1. See Hardware Reference Manual
|
||||
|
||||
config BF527_UART1_PORTF
|
||||
bool "PORT F"
|
||||
help
|
||||
PORT F
|
||||
|
||||
config BF527_UART1_PORTG
|
||||
bool "PORT G"
|
||||
help
|
||||
PORT G
|
||||
endchoice
|
||||
|
||||
choice
|
||||
prompt "NAND (NFC) Data"
|
||||
default BF527_NAND_D_PORTH
|
||||
help
|
||||
Select PORT used for NAND Data Bus. See Hardware Reference Manual
|
||||
|
||||
config BF527_NAND_D_PORTF
|
||||
bool "PORT F"
|
||||
help
|
||||
PORT F
|
||||
|
||||
config BF527_NAND_D_PORTH
|
||||
bool "PORT H"
|
||||
help
|
||||
PORT H
|
||||
endchoice
|
||||
|
||||
comment "Interrupt Priority Assignment"
|
||||
menu "Priority"
|
||||
|
||||
config IRQ_PLL_WAKEUP
|
||||
int "IRQ_PLL_WAKEUP"
|
||||
default 7
|
||||
config IRQ_DMA0_ERROR
|
||||
int "IRQ_DMA0_ERROR"
|
||||
default 7
|
||||
config IRQ_DMAR0_BLK
|
||||
int "IRQ_DMAR0_BLK"
|
||||
default 7
|
||||
config IRQ_DMAR1_BLK
|
||||
int "IRQ_DMAR1_BLK"
|
||||
default 7
|
||||
config IRQ_DMAR0_OVR
|
||||
int "IRQ_DMAR0_OVR"
|
||||
default 7
|
||||
config IRQ_DMAR1_OVR
|
||||
int "IRQ_DMAR1_OVR"
|
||||
default 7
|
||||
config IRQ_PPI_ERROR
|
||||
int "IRQ_PPI_ERROR"
|
||||
default 7
|
||||
config IRQ_MAC_ERROR
|
||||
int "IRQ_MAC_ERROR"
|
||||
default 7
|
||||
config IRQ_SPORT0_ERROR
|
||||
int "IRQ_SPORT0_ERROR"
|
||||
default 7
|
||||
config IRQ_SPORT1_ERROR
|
||||
int "IRQ_SPORT1_ERROR"
|
||||
default 7
|
||||
config IRQ_UART0_ERROR
|
||||
int "IRQ_UART0_ERROR"
|
||||
default 7
|
||||
config IRQ_UART1_ERROR
|
||||
int "IRQ_UART1_ERROR"
|
||||
default 7
|
||||
config IRQ_RTC
|
||||
int "IRQ_RTC"
|
||||
default 8
|
||||
config IRQ_PPI
|
||||
int "IRQ_PPI"
|
||||
default 8
|
||||
config IRQ_SPORT0_RX
|
||||
int "IRQ_SPORT0_RX"
|
||||
default 9
|
||||
config IRQ_SPORT0_TX
|
||||
int "IRQ_SPORT0_TX"
|
||||
default 9
|
||||
config IRQ_SPORT1_RX
|
||||
int "IRQ_SPORT1_RX"
|
||||
default 9
|
||||
config IRQ_SPORT1_TX
|
||||
int "IRQ_SPORT1_TX"
|
||||
default 9
|
||||
config IRQ_TWI
|
||||
int "IRQ_TWI"
|
||||
default 10
|
||||
config IRQ_SPI
|
||||
int "IRQ_SPI"
|
||||
default 10
|
||||
config IRQ_UART0_RX
|
||||
int "IRQ_UART0_RX"
|
||||
default 10
|
||||
config IRQ_UART0_TX
|
||||
int "IRQ_UART0_TX"
|
||||
default 10
|
||||
config IRQ_UART1_RX
|
||||
int "IRQ_UART1_RX"
|
||||
default 10
|
||||
config IRQ_UART1_TX
|
||||
int "IRQ_UART1_TX"
|
||||
default 10
|
||||
config IRQ_OPTSEC
|
||||
int "IRQ_OPTSEC"
|
||||
default 11
|
||||
config IRQ_CNT
|
||||
int "IRQ_CNT"
|
||||
default 11
|
||||
config IRQ_MAC_RX
|
||||
int "IRQ_MAC_RX"
|
||||
default 11
|
||||
config IRQ_PORTH_INTA
|
||||
int "IRQ_PORTH_INTA"
|
||||
default 11
|
||||
config IRQ_MAC_TX
|
||||
int "IRQ_MAC_TX/NFC"
|
||||
default 11
|
||||
config IRQ_PORTH_INTB
|
||||
int "IRQ_PORTH_INTB"
|
||||
default 11
|
||||
config IRQ_TMR0
|
||||
int "IRQ_TMR0"
|
||||
default 12
|
||||
config IRQ_TMR1
|
||||
int "IRQ_TMR1"
|
||||
default 12
|
||||
config IRQ_TMR2
|
||||
int "IRQ_TMR2"
|
||||
default 12
|
||||
config IRQ_TMR3
|
||||
int "IRQ_TMR3"
|
||||
default 12
|
||||
config IRQ_TMR4
|
||||
int "IRQ_TMR4"
|
||||
default 12
|
||||
config IRQ_TMR5
|
||||
int "IRQ_TMR5"
|
||||
default 12
|
||||
config IRQ_TMR6
|
||||
int "IRQ_TMR6"
|
||||
default 12
|
||||
config IRQ_TMR7
|
||||
int "IRQ_TMR7"
|
||||
default 12
|
||||
config IRQ_PORTG_INTA
|
||||
int "IRQ_PORTG_INTA"
|
||||
default 12
|
||||
config IRQ_PORTG_INTB
|
||||
int "IRQ_PORTG_INTB"
|
||||
default 12
|
||||
config IRQ_MEM_DMA0
|
||||
int "IRQ_MEM_DMA0"
|
||||
default 13
|
||||
config IRQ_MEM_DMA1
|
||||
int "IRQ_MEM_DMA1"
|
||||
default 13
|
||||
config IRQ_WATCH
|
||||
int "IRQ_WATCH"
|
||||
default 13
|
||||
config IRQ_PORTF_INTA
|
||||
int "IRQ_PORTF_INTA"
|
||||
default 13
|
||||
config IRQ_PORTF_INTB
|
||||
int "IRQ_PORTF_INTB"
|
||||
default 13
|
||||
config IRQ_SPI_ERROR
|
||||
int "IRQ_SPI_ERROR"
|
||||
default 7
|
||||
config IRQ_NFC_ERROR
|
||||
int "IRQ_NFC_ERROR"
|
||||
default 7
|
||||
config IRQ_HDMA_ERROR
|
||||
int "IRQ_HDMA_ERROR"
|
||||
default 7
|
||||
config IRQ_HDMA
|
||||
int "IRQ_HDMA"
|
||||
default 7
|
||||
config IRQ_USB_EINT
|
||||
int "IRQ_USB_EINT"
|
||||
default 10
|
||||
config IRQ_USB_INT0
|
||||
int "IRQ_USB_INT0"
|
||||
default 10
|
||||
config IRQ_USB_INT1
|
||||
int "IRQ_USB_INT1"
|
||||
default 10
|
||||
config IRQ_USB_INT2
|
||||
int "IRQ_USB_INT2"
|
||||
default 10
|
||||
config IRQ_USB_DMA
|
||||
int "IRQ_USB_DMA"
|
||||
default 10
|
||||
|
||||
help
|
||||
Enter the priority numbers between 7-13 ONLY. Others are Reserved.
|
||||
This applies to all the above. It is not recommended to assign the
|
||||
highest priority number 7 to UART or any other device.
|
||||
|
||||
endmenu
|
||||
|
||||
endmenu
|
||||
|
||||
endif
|
||||
@@ -0,0 +1,9 @@
|
||||
#
|
||||
# arch/blackfin/mach-bf527/Makefile
|
||||
#
|
||||
|
||||
extra-y := head.o
|
||||
|
||||
obj-y := ints-priority.o dma.o
|
||||
|
||||
obj-$(CONFIG_CPU_FREQ) += cpu.o
|
||||
@@ -0,0 +1,7 @@
|
||||
#
|
||||
# arch/blackfin/mach-bf532/boards/Makefile
|
||||
#
|
||||
|
||||
obj-y += eth_mac.o
|
||||
obj-$(CONFIG_BFIN527_EZKIT) += ezkit.o
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user