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[PATCH] powerpc: Add MPC834x SYS board to arch/powerpc
Add the first MPC83xx board that uses a flat device tree to arch/powerpc. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
This commit is contained in:
Kumar Gala
committed by
Paul Mackerras
Paul Mackerras
parent
eed3200108
commit
7d13d21ae8
File diff suppressed because it is too large
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@@ -230,8 +230,7 @@ EXPORT_SYMBOL(__down_interruptible);
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EXPORT_SYMBOL(cpm_install_handler);
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EXPORT_SYMBOL(cpm_free_handler);
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#endif /* CONFIG_8xx */
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#if defined(CONFIG_8xx) || defined(CONFIG_40x) || defined(CONFIG_85xx) ||\
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defined(CONFIG_83xx)
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#if defined(CONFIG_8xx) || defined(CONFIG_40x)
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EXPORT_SYMBOL(__res);
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#endif
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@@ -7,6 +7,7 @@ choice
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config MPC834x_SYS
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bool "Freescale MPC834x SYS"
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select DEFAULT_UIMAGE
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help
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This option enables support for the MPC 834x SYS evaluation board.
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@@ -0,0 +1,243 @@
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/*
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* arch/powerpc/platforms/83xx/mpc834x_sys.c
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*
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* MPC834x SYS board specific routines
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*
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* Maintainer: Kumar Gala <galak@kernel.crashing.org>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/config.h>
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#include <linux/stddef.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/errno.h>
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#include <linux/reboot.h>
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#include <linux/pci.h>
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#include <linux/kdev_t.h>
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#include <linux/major.h>
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#include <linux/console.h>
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#include <linux/delay.h>
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#include <linux/seq_file.h>
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#include <linux/root_dev.h>
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#include <linux/module.h>
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#include <linux/fsl_devices.h>
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#include <asm/system.h>
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#include <asm/pgtable.h>
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#include <asm/page.h>
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#include <asm/atomic.h>
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#include <asm/time.h>
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#include <asm/io.h>
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#include <asm/machdep.h>
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#include <asm/ipic.h>
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#include <asm/bootinfo.h>
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#include <asm/pci-bridge.h>
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#include <asm/mpc83xx.h>
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#include <asm/irq.h>
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#include <mm/mmu_decl.h>
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#include <asm/prom.h>
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#include <asm/udbg.h>
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#include <sysdev/fsl_soc.h>
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#include "mpc83xx.h"
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#ifndef CONFIG_PCI
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unsigned long isa_io_base = 0;
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unsigned long isa_mem_base = 0;
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#endif
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#ifdef CONFIG_PCI
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extern int mpc83xx_pci2_busno;
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static int
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mpc83xx_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
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{
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static char pci_irq_table[][4] =
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/*
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* PCI IDSEL/INTPIN->INTLINE
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* A B C D
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*/
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{
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{PIRQA, PIRQB, PIRQC, PIRQD}, /* idsel 0x11 */
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{PIRQC, PIRQD, PIRQA, PIRQB}, /* idsel 0x12 */
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{PIRQD, PIRQA, PIRQB, PIRQC}, /* idsel 0x13 */
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{0, 0, 0, 0},
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{PIRQA, PIRQB, PIRQC, PIRQD}, /* idsel 0x15 */
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{PIRQD, PIRQA, PIRQB, PIRQC}, /* idsel 0x16 */
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{PIRQC, PIRQD, PIRQA, PIRQB}, /* idsel 0x17 */
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{PIRQB, PIRQC, PIRQD, PIRQA}, /* idsel 0x18 */
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{0, 0, 0, 0}, /* idsel 0x19 */
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{0, 0, 0, 0}, /* idsel 0x20 */
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};
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const long min_idsel = 0x11, max_idsel = 0x20, irqs_per_slot = 4;
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return PCI_IRQ_TABLE_LOOKUP;
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}
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static int
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mpc83xx_exclude_device(u_char bus, u_char devfn)
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{
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if (bus == 0 && PCI_SLOT(devfn) == 0)
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return PCIBIOS_DEVICE_NOT_FOUND;
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if (mpc83xx_pci2_busno)
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if (bus == (mpc83xx_pci2_busno) && PCI_SLOT(devfn) == 0)
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return PCIBIOS_DEVICE_NOT_FOUND;
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return PCIBIOS_SUCCESSFUL;
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}
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#endif /* CONFIG_PCI */
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/* ************************************************************************
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*
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* Setup the architecture
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*
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*/
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static void __init
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mpc834x_sys_setup_arch(void)
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{
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struct device_node *np;
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if (ppc_md.progress)
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ppc_md.progress("mpc834x_sys_setup_arch()", 0);
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np = of_find_node_by_type(NULL, "cpu");
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if (np != 0) {
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unsigned int *fp = (int *) get_property(np, "clock-frequency", NULL);
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if (fp != 0)
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loops_per_jiffy = *fp / HZ;
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else
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loops_per_jiffy = 50000000 / HZ;
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of_node_put(np);
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}
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#ifdef CONFIG_PCI
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for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
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add_bridge(np);
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ppc_md.pci_swizzle = common_swizzle;
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ppc_md.pci_map_irq = mpc83xx_map_irq;
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ppc_md.pci_exclude_device = mpc83xx_exclude_device;
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#endif
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#ifdef CONFIG_ROOT_NFS
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ROOT_DEV = Root_NFS;
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#else
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ROOT_DEV = Root_HDA1;
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#endif
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}
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void __init
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mpc834x_sys_init_IRQ(void)
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{
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u8 senses[8] = {
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0, /* EXT 0 */
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IRQ_SENSE_LEVEL, /* EXT 1 */
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IRQ_SENSE_LEVEL, /* EXT 2 */
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0, /* EXT 3 */
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#ifdef CONFIG_PCI
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IRQ_SENSE_LEVEL, /* EXT 4 */
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IRQ_SENSE_LEVEL, /* EXT 5 */
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IRQ_SENSE_LEVEL, /* EXT 6 */
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IRQ_SENSE_LEVEL, /* EXT 7 */
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#else
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0, /* EXT 4 */
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0, /* EXT 5 */
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0, /* EXT 6 */
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0, /* EXT 7 */
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#endif
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};
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ipic_init(get_immrbase() + 0x00700, 0, 0, senses, 8);
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/* Initialize the default interrupt mapping priorities,
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* in case the boot rom changed something on us.
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*/
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ipic_set_default_priority();
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}
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#if defined(CONFIG_I2C_MPC) && defined(CONFIG_SENSORS_DS1374)
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extern ulong ds1374_get_rtc_time(void);
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extern int ds1374_set_rtc_time(ulong);
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static int __init
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mpc834x_rtc_hookup(void)
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{
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struct timespec tv;
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ppc_md.get_rtc_time = ds1374_get_rtc_time;
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ppc_md.set_rtc_time = ds1374_set_rtc_time;
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tv.tv_nsec = 0;
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tv.tv_sec = (ppc_md.get_rtc_time)();
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do_settimeofday(&tv);
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return 0;
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}
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late_initcall(mpc834x_rtc_hookup);
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#endif
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static void
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mpc83xx_restart(char *cmd)
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{
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#define RST_OFFSET 0x00000900
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#define RST_PROT_REG 0x00000018
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#define RST_CTRL_REG 0x0000001c
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__be32 __iomem *reg;
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// map reset register space
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reg = ioremap(get_immrbase() + 0x900, 0xff);
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local_irq_disable();
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/* enable software reset "RSTE" */
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out_be32(reg + (RST_PROT_REG >> 2), 0x52535445);
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/* set software hard reset */
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out_be32(reg + (RST_CTRL_REG >> 2), 0x52535445);
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for(;;);
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}
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static long __init
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mpc83xx_time_init(void)
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{
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#define SPCR_OFFSET 0x00000110
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#define SPCR_TBEN 0x00400000
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__be32 __iomem *spcr = ioremap(get_immrbase() + SPCR_OFFSET, 4);
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__be32 tmp;
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tmp = in_be32(spcr);
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out_be32(spcr, tmp|SPCR_TBEN);
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iounmap(spcr);
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return 0;
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}
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void __init
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platform_init(void)
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{
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/* setup the PowerPC module struct */
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ppc_md.setup_arch = mpc834x_sys_setup_arch;
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ppc_md.init_IRQ = mpc834x_sys_init_IRQ;
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ppc_md.get_irq = ipic_get_irq;
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ppc_md.restart = mpc83xx_restart;
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ppc_md.time_init = mpc83xx_time_init;
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ppc_md.set_rtc_time = NULL;
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ppc_md.get_rtc_time = NULL;
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ppc_md.calibrate_decr = generic_calibrate_decr;
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ppc_md.progress = udbg_progress;
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if (ppc_md.progress)
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ppc_md.progress("mpc834x_sys_init(): exit", 0);
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return;
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}
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@@ -0,0 +1,23 @@
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/*
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* arch/powerppc/platforms/83xx/mpc834x_sys.h
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*
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* MPC834X SYS common board definitions
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*
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* Maintainer: Kumar Gala <galak@kernel.crashing.org>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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*/
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#ifndef __MACH_MPC83XX_SYS_H__
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#define __MACH_MPC83XX_SYS_H__
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#define PIRQA MPC83xx_IRQ_EXT4
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#define PIRQB MPC83xx_IRQ_EXT5
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#define PIRQC MPC83xx_IRQ_EXT6
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#define PIRQD MPC83xx_IRQ_EXT7
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#endif /* __MACH_MPC83XX_SYS_H__ */
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@@ -0,0 +1,14 @@
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#ifndef __MPC83XX_H__
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#define __MPC83XX_H__
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#include <linux/init.h>
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#include <linux/device.h>
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/*
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* Declaration for the various functions exported by the
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* mpc83xx_* files. Mostly for use by mpc83xx_setup
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*/
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extern int add_bridge(struct device_node *dev);
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#endif /* __MPC83XX_H__ */
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@@ -0,0 +1,99 @@
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/*
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* FSL SoC setup code
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*
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* Maintained by Kumar Gala (see MAINTAINERS for contact information)
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/config.h>
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#include <linux/stddef.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/errno.h>
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#include <linux/pci.h>
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#include <linux/delay.h>
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#include <linux/irq.h>
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#include <linux/module.h>
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#include <asm/system.h>
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#include <asm/atomic.h>
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#include <asm/io.h>
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#include <asm/pci-bridge.h>
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#include <asm/prom.h>
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#include <sysdev/fsl_soc.h>
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#undef DEBUG
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#ifdef DEBUG
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#define DBG(x...) printk(x)
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#else
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#define DBG(x...)
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#endif
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int mpc83xx_pci2_busno;
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#ifdef CONFIG_PCI
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int __init add_bridge(struct device_node *dev)
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{
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int len;
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struct pci_controller *hose;
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struct resource rsrc;
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int *bus_range;
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int primary = 1, has_address = 0;
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phys_addr_t immr = get_immrbase();
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DBG("Adding PCI host bridge %s\n", dev->full_name);
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/* Fetch host bridge registers address */
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has_address = (of_address_to_resource(dev, 0, &rsrc) == 0);
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/* Get bus range if any */
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bus_range = (int *) get_property(dev, "bus-range", &len);
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if (bus_range == NULL || len < 2 * sizeof(int)) {
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printk(KERN_WARNING "Can't get bus-range for %s, assume"
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" bus 0\n", dev->full_name);
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}
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hose = pcibios_alloc_controller();
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if (!hose)
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return -ENOMEM;
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hose->arch_data = dev;
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hose->set_cfg_type = 1;
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hose->first_busno = bus_range ? bus_range[0] : 0;
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hose->last_busno = bus_range ? bus_range[1] : 0xff;
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/* MPC83xx supports up to two host controllers one at 0x8500 from immrbar
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* the other at 0x8600, we consider the 0x8500 the primary controller
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*/
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/* PCI 1 */
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if ((rsrc.start & 0xfffff) == 0x8500) {
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setup_indirect_pci(hose, immr + 0x8300, immr + 0x8304);
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}
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/* PCI 2*/
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if ((rsrc.start & 0xfffff) == 0x8600) {
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setup_indirect_pci(hose, immr + 0x8380, immr + 0x8384);
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primary = 0;
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hose->bus_offset = hose->first_busno;
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mpc83xx_pci2_busno = hose->first_busno;
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}
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printk(KERN_INFO "Found MPC83xx PCI host bridge at 0x%08lx. "
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"Firmware bus number: %d->%d\n",
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rsrc.start, hose->first_busno, hose->last_busno);
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DBG(" ->Hose at 0x%p, cfg_addr=0x%p,cfg_data=0x%p\n",
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hose, hose->cfg_addr, hose->cfg_data);
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/* Interpret the "ranges" property */
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/* This also maps the I/O region and sets isa_io/mem_base */
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pci_process_bridge_OF_ranges(hose, dev, primary);
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return 0;
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}
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#endif
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